📄 rtl8139.c
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/* rtl8139.c - etherboot driver for the Realtek 8139 chipset ported from the linux driver written by Donald Becker by Rainer Bawidamann (Rainer.Bawidamann@informatik.uni-ulm.de) 1999 This software may be used and distributed according to the terms of the GNU Public License, incorporated herein by reference. changes to the original driver: - removed support for interrupts, switching to polling mode (yuck!) - removed support for the 8129 chip (external MII)*//*********************************************************************//* Revision History *//*********************************************************************//* 06 Apr 2001 ken_yap@users.sourceforge.net (Ken Yap) Following email from Hyun-Joon Cha, added a disable routine, otherwise NIC remains live and can crash the kernel later. 4 Feb 2000 espenlaub@informatik.uni-ulm.de (Klaus Espenlaub) Shuffled things around, removed the leftovers from the 8129 support that was in the Linux driver and added a bit more 8139 definitions. Moved the 8K receive buffer to a fixed, available address outside the 0x98000-0x9ffff range. This is a bit of a hack, but currently the only way to make room for the Etherboot features that need substantial amounts of code like the ANSI console support. Currently the buffer is just below 0x10000, so this even conforms to the tagged boot image specification, which reserves the ranges 0x00000-0x10000 and 0x98000-0xA0000. My interpretation of this "reserved" is that Etherboot may do whatever it likes, as long as its environment is kept intact (like the BIOS variables). Hopefully fixed rtl_poll() once and for all. The symptoms were that if Etherboot was left at the boot menu for several minutes, the first eth_poll failed. Seems like I am the only person who does this. First of all I fixed the debugging code and then set out for a long bug hunting session. It took me about a week full time work - poking around various places in the driver, reading Don Becker's and Jeff Garzik's Linux driver and even the FreeBSD driver (what a piece of crap!) - and eventually spotted the nasty thing: the transmit routine was acknowledging each and every interrupt pending, including the RxOverrun and RxFIFIOver interrupts. This confused the RTL8139 thoroughly. It destroyed the Rx ring contents by dumping the 2K FIFO contents right where we wanted to get the next packet. Oh well, what fun. 18 Jan 2000 mdc@thinguin.org (Marty Connor) Drastically simplified error handling. Basically, if any error in transmission or reception occurs, the card is reset. Also, pointed all transmit descriptors to the same buffer to save buffer space. This should decrease driver size and avoid corruption because of exceeding 32K during runtime. 28 Jul 1999 (Matthias Meixner - meixner@rbg.informatik.tu-darmstadt.de) rtl_poll was quite broken: it used the RxOK interrupt flag instead of the RxBufferEmpty flag which often resulted in very bad transmission performace - below 1kBytes/s.*/#include "etherboot.h"#include "nic.h"#include "pci.h"#include "cards.h"#include "timer.h"#define RTL_TIMEOUT (1*TICKS_PER_SEC)/* PCI Tuning Parameters Threshold is bytes transferred to chip before transmission starts. */#define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */#define RX_FIFO_THRESH 4 /* Rx buffer level before first PCI xfer. */#define RX_DMA_BURST 4 /* Maximum PCI burst, '4' is 256 bytes */#define TX_DMA_BURST 4 /* Calculate as 16<<val. */#define NUM_TX_DESC 4 /* Number of Tx descriptor registers. */#define TX_BUF_SIZE ETH_FRAME_LEN /* FCS is added by the chip */#define RX_BUF_LEN_IDX 0 /* 0, 1, 2 is allowed - 8,16,32K rx buffer */#define RX_BUF_LEN (8192 << RX_BUF_LEN_IDX)#undef DEBUG_TX#undef DEBUG_RX/* Symbolic offsets to registers. */enum RTL8139_registers { MAC0=0, /* Ethernet hardware address. */ MAR0=8, /* Multicast filter. */ TxStatus0=0x10, /* Transmit status (four 32bit registers). */ TxAddr0=0x20, /* Tx descriptors (also four 32bit). */ RxBuf=0x30, RxEarlyCnt=0x34, RxEarlyStatus=0x36, ChipCmd=0x37, RxBufPtr=0x38, RxBufAddr=0x3A, IntrMask=0x3C, IntrStatus=0x3E, TxConfig=0x40, RxConfig=0x44, Timer=0x48, /* general-purpose counter. */ RxMissed=0x4C, /* 24 bits valid, write clears. */ Cfg9346=0x50, Config0=0x51, Config1=0x52, TimerIntrReg=0x54, /* intr if gp counter reaches this value */ MediaStatus=0x58, Config3=0x59, MultiIntr=0x5C, RevisionID=0x5E, /* revision of the RTL8139 chip */ TxSummary=0x60, MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68, NWayExpansion=0x6A, DisconnectCnt=0x6C, FalseCarrierCnt=0x6E, NWayTestReg=0x70, RxCnt=0x72, /* packet received counter */ CSCR=0x74, /* chip status and configuration register */ PhyParm1=0x78,TwisterParm=0x7c,PhyParm2=0x80, /* undocumented */ /* from 0x84 onwards are a number of power management/wakeup frame * definitions we will probably never need to know about. */};enum ChipCmdBits { CmdReset=0x10, CmdRxEnb=0x08, CmdTxEnb=0x04, RxBufEmpty=0x01, };/* Interrupt register bits, using my own meaningful names. */enum IntrStatusBits { PCIErr=0x8000, PCSTimeout=0x4000, CableLenChange= 0x2000, RxFIFOOver=0x40, RxUnderrun=0x20, RxOverflow=0x10, TxErr=0x08, TxOK=0x04, RxErr=0x02, RxOK=0x01,};enum TxStatusBits { TxHostOwns=0x2000, TxUnderrun=0x4000, TxStatOK=0x8000, TxOutOfWindow=0x20000000, TxAborted=0x40000000, TxCarrierLost=0x80000000,};enum RxStatusBits { RxMulticast=0x8000, RxPhysical=0x4000, RxBroadcast=0x2000, RxBadSymbol=0x0020, RxRunt=0x0010, RxTooLong=0x0008, RxCRCErr=0x0004, RxBadAlign=0x0002, RxStatusOK=0x0001,};enum MediaStatusBits { MSRTxFlowEnable=0x80, MSRRxFlowEnable=0x40, MSRSpeed10=0x08, MSRLinkFail=0x04, MSRRxPauseFlag=0x02, MSRTxPauseFlag=0x01,};enum MIIBMCRBits { BMCRReset=0x8000, BMCRSpeed100=0x2000, BMCRNWayEnable=0x1000, BMCRRestartNWay=0x0200, BMCRDuplex=0x0100,};enum CSCRBits { CSCR_LinkOKBit=0x0400, CSCR_LinkChangeBit=0x0800, CSCR_LinkStatusBits=0x0f000, CSCR_LinkDownOffCmd=0x003c0, CSCR_LinkDownCmd=0x0f3c0,};/* Bits in RxConfig. */enum rx_mode_bits { RxCfgWrap=0x80, AcceptErr=0x20, AcceptRunt=0x10, AcceptBroadcast=0x08, AcceptMulticast=0x04, AcceptMyPhys=0x02, AcceptAllPhys=0x01,};static int ioaddr;static unsigned int cur_rx,cur_tx;/* The RTL8139 can only transmit from a contiguous, aligned memory block. */static unsigned char tx_buffer[TX_BUF_SIZE] __attribute__((aligned(4)));/* I know that this is a MEGA HACK, but the tagged boot image specification * states that we can do whatever we want below 0x10000 - so we do! *//* But we still give the user the choice of using an internal buffer just in case - Ken */#ifdef USE_LOWMEM_BUFFER#define rx_ring ((unsigned char *)(0x10000 - (RX_BUF_LEN + 16)))#elsestatic unsigned char rx_ring[RX_BUF_LEN+16] __attribute__((aligned(4)));#endifstruct nic *rtl8139_probe(struct nic *nic, unsigned short *probeaddrs, struct pci_device *pci);static int read_eeprom(int location);static void rtl_reset(struct nic *nic);static void rtl_transmit(struct nic *nic, const char *destaddr, unsigned int type, unsigned int len, const char *data);static int rtl_poll(struct nic *nic);static void rtl_disable(struct nic*);struct nic *rtl8139_probe(struct nic *nic, unsigned short *probeaddrs, struct pci_device *pci){ int i; int speed10, fullduplex; /* There are enough "RTL8139" strings on the console already, so * be brief and concentrate on the interesting pieces of info... */ printf(" - "); /* Mask the bit that says "this is an io addr" */ ioaddr = probeaddrs[0] & ~3; adjust_pci_device(pci); /* Bring the chip out of low-power mode. */ outb(0x00, ioaddr + Config1); if (read_eeprom(0) != 0xffff) { unsigned short *ap = (unsigned short*)nic->node_addr; for (i = 0; i < 3; i++) *ap++ = read_eeprom(i + 7); } else { unsigned char *ap = (unsigned char*)nic->node_addr; for (i = 0; i < ETH_ALEN; i++) *ap++ = inb(ioaddr + MAC0 + i); } speed10 = inb(ioaddr + MediaStatus) & MSRSpeed10; fullduplex = inw(ioaddr + MII_BMCR) & BMCRDuplex; printf("ioaddr %#hX, addr %! %sMbps %s-duplex\n", ioaddr, nic->node_addr, speed10 ? "10" : "100", fullduplex ? "full" : "half"); rtl_reset(nic); nic->reset = rtl_reset; nic->poll = rtl_poll; nic->transmit = rtl_transmit; nic->disable = rtl_disable; return nic;}/* Serial EEPROM section. *//* EEPROM_Ctrl bits. */
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