📄 main.c
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/******************************************************************
* main.c: Main Routine for AVR web server
*
* Copyright (c) 2001 Atmel Corporation.
* All Rights Reserved.
*
* You are autorized to use, copy and distribute this software only at
* a single site (the term "site" meaning a single company location).
* This copyright notice must be included in any copy, modification
* or portion of this software merged into another program.
*
* This software is licenced solely for use with Atmel AVR micro
* controller family. The software may not be modified to execute on
* any other microcontroller architectures
*
* This software is provided "as is"; Without warranties either express
* or implied, including any warranty regarding merchantability,
* fitness for a particular purpose or noninfringement.
*
* In no event shall Atmel or its suppliers be liable for any special,
* indirect,incidential or concequential damages resulting from the
* use or inability to use this software.
*
* Revision history:
*
* January 17, 2001: Version 1.0 Created by JB
* July 13, 2001 Version 1.2 JB
* - Changed to IAR compiler V2.25
* - Renamed flash file functions to avoid conflict with
* standard file I/O names
* - Bug fixes in HTTP
* - Speed optimization in TCP
*
*
*******************************************************************/
#define ENABLE_BIT_DEFINITIONS
#include "comp_a90.h"
#include "main.h"
#include "ethernet.h"
#include "ffile.h"
#include "tcp.h"
#include "ftpd.h"
#include "httpd.h"
#include "config.h"
#include "udp.h"
#include "dhcp.h"
#include "smtp.h"
#include "ymodem.h"
#include "script.h"
#include <iom103.h>
#include <ina90.h>
#include <stdio.h>
#include <string.h>
extern void *__RSTACK_in_external_ram;
unsigned char dhcpEnable;
// __low_level_init is called directly from C_Startup
char __low_level_init()
{
__require (__RSTACK_in_external_ram);
DDRB = 0xF7; // SPI Port initialisation
PORTB |= 0x0d; // all outputs high, inputs have pullups (LED is off)
DDRE = 0x00;
PORTE |= 0x08;
SPCR= 0x50;
MCUCR |= 0x80; //Enable external SRAM, without wait state
TIMSK = 0x01; //Enable timer interrupt
// TCCR0 = 0x07;
EIMSK = 0x10; // Enable external interrupt 4
EIFR = 0x00; // Clear interrupt flag.
EICR = 0x03; // Program interrupt on positiv edge
return 1;
}
void main (void)
{
if(!(PINE & 0x08)) // if PortE pin 3 is pulled low during power-up - Format dataflash, debug only
{
fformat();
}
ffinit();
initYmodem(); // low level Ymodem hardware initialization
if(!config())
{
defaultConfig();
}
initEthernet();
TCPinit();
_SEI();
if(dhcpEnable)
{
DHCP();
}
httpdInit();
PORTB |= 0xf0; //Enable LED1-4
//Enable interrupts
TCCR0 = 0x07;
for (;;)
{
if(dhcpEnable)
{
DHCP();
}
httpd(); // Listen for http requests.
ftpd(); // Check FTP requests
}
}
/*
To send segments with application data, the timer
interrupt is used. Everytime a timer overflow occurs,
the microcontroller checks for unsent data.
*/
#pragma vector = TIMER0_OVF_vect
__interrupt void TIMER0_OVF_interrupt (void)
{
checkDHCP();
checkTCP();
checkYmodem();
TCNT0 = 0x00;
}
/*
When an interrupt request is received from the
ethernet controller, the Interrupt Status Queue
is read and receiveEvent is called if a frame is
received.
*/
#pragma vector = INT4_vect
__interrupt void INT4_interrupt (void)
{
int i;
while (i = *ISQ)
{
if ( (i & 0x04) != 0 ) //If this is a valid receive event..
{
receiveEvent();
}
} // Read untill interrupt status queue is zero
// to reactivate interrupt from ethernet controller
}
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