ice.c

一个简易调试器（支持ARM7TDMI）

/*
 * target/arm7tdmi/ice.c: implements ARM7TDMI EmbeddedICE-RT logic
 *
 * Copyright (C) 2003 2004, Rongkai zhan <[e-mail]>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */

/* $Id$ */

#include <unistd.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include "jtager.h"
#include "jtag.h"
#include "target.h"

ice_register_t arm7tdmi_ice_regs[] = {
	{"dbgctl", "debug control register", ARM7TDMI_ICE_DBGCTL, 6, 0},
	{"dbgstat", "debug status register", ARM7TDMI_ICE_DBGSTAT, 5, 0},
	{"abtstat", "abort status register", ARM7TDMI_ICE_ABTSTAT, 1, 0},
	/* two DCC registers */
	{"dcc-ctl", "DCC control register", ARM7TDMI_ICE_DCC_CTL, 6, 0},
	{"dcc-data", "DCC data register", ARM7TDMI_ICE_DCC_DATA, 32, 0},
	/* watchpoint 0 */
	{"wp0-addrvalue", "watchpoint 0 address value register",
	 ARM7TDMI_ICE_WP0_ADDRVALUE, 32, 0},
	{"wp0-addrmask", "watchpoint 0 address mask register",
	 ARM7TDMI_ICE_WP0_ADDRMASK, 32, 0},
	{"wp0-datavalue", "watchpoint 0 data value register",
	 ARM7TDMI_ICE_WP0_DATAVALUE, 32, 0},
	{"wp0-datamask", "watchpoint 0 data mask register",
	 ARM7TDMI_ICE_WP0_DATAMASK, 32, 0},
	{"wp0-ctlvalue", "watchpoint 0 control value register",
	 ARM7TDMI_ICE_WP0_CTLVALUE, 9, 0},
	{"wp0-ctlmask", "watchpoint 0 control mask register",
	 ARM7TDMI_ICE_WP0_CTLMASK, 8, 0},
	/* watchpoint 1 */
	{"wp1-addrvalue", "watchpoint 1 address value register",
	 ARM7TDMI_ICE_WP1_ADDRVALUE, 32, 0},
	{"wp1-addrmask", "watchpoint 1 address mask register",
	 ARM7TDMI_ICE_WP1_ADDRMASK, 32, 0},
	{"wp1-datavalue", "watchpoint 1 data value register",
	 ARM7TDMI_ICE_WP1_DATAVALUE, 32, 0},
	{"wp1-datamask", "watchpoint 1 data mask register",
	 ARM7TDMI_ICE_WP1_DATAMASK, 32, 0},
	{"wp1-ctlvalue", "watchpoint 1 control value register",
	 ARM7TDMI_ICE_WP1_CTLVALUE, 9, 0},
	{"wp1-ctlmask", "watchpoint 1 control mask register",
	 ARM7TDMI_ICE_WP1_CTLMASK, 8, 0},	
	/* the last one is an invalid one, just for end */
	{NULL, NULL, 0xffffffff, 0, 0}
};

static int arm7tdmi_ice_regaddr_check(u32 reg_addr)
{
	if ((reg_addr == ARM7TDMI_ICE_DBGCTL) ||
		(reg_addr == ARM7TDMI_ICE_DBGSTAT) ||
		(reg_addr == ARM7TDMI_ICE_ABTSTAT) ||
		(reg_addr == ARM7TDMI_ICE_DCC_CTL) ||
		(reg_addr == ARM7TDMI_ICE_DCC_DATA) ||
		(reg_addr == ARM7TDMI_ICE_WP0_ADDRVALUE) ||
		(reg_addr == ARM7TDMI_ICE_WP0_ADDRMASK) ||
		(reg_addr == ARM7TDMI_ICE_WP0_DATAVALUE) ||
		(reg_addr == ARM7TDMI_ICE_WP0_DATAMASK) ||
		(reg_addr == ARM7TDMI_ICE_WP0_CTLVALUE) ||
		(reg_addr == ARM7TDMI_ICE_WP0_CTLMASK) ||
		(reg_addr == ARM7TDMI_ICE_WP1_ADDRVALUE) ||
		(reg_addr == ARM7TDMI_ICE_WP1_ADDRMASK) ||
		(reg_addr == ARM7TDMI_ICE_WP1_DATAVALUE) ||
		(reg_addr == ARM7TDMI_ICE_WP1_DATAMASK) ||
		(reg_addr == ARM7TDMI_ICE_WP1_CTLVALUE) ||
		(reg_addr == ARM7TDMI_ICE_WP1_CTLMASK))
		return 0;
	else
		return -ERR_TARGET_NONEXISTED_ICE_REG;
} /* end of arm7tdmi_ice_regaddr_check(...) */

/*
 * Get ARM7TDMI ICE register by address.
 */
static ice_register_t * arm7tdmi_ice_reg_get(u32 reg_addr)
{
	ice_register_t *reg;
	int i = 0;
	int found = 0;
	
	if (arm7tdmi_ice_regaddr_check(reg_addr))
		return NULL;

	while (1) {
		reg = &arm7tdmi_target.ice_regs[i];
		if (reg->name == NULL)
			break;
		if (reg->addr == reg_addr) {
			found = 1;
			break;
		}
		i ++;
	}
	
	if (found == 0)
		reg = NULL;
	return reg;
} /* end of arm7tdmi_ice_reg_get(...) */

/*
 * NOTE: we assume that the caller has selected the ARM7TDMI
 * EmbeddedICE-RT as current scan chain path, and has maken it
 * in the internal test mode.
 */
int arm7tdmi_ice_read(u32 reg_addr, u32 *reg_val)
{
	u32 testdata[2];
	u32 readout[2];
	u32 mask = 0xffffffff;
	ice_register_t *reg;
	int bitnr = arm7tdmi_target.sc[2].bitnr; /* the bit number of sc2 */
	int retval;

	reg = arm7tdmi_ice_reg_get(reg_addr);
	if (reg == NULL)
		return -ERR_TARGET_NONEXISTED_ICE_REG;

	if (target->active_sc != 2) {
		retval = jtag_select_scanchain(2);
		if (retval)
			return retval;
	}
	retval = jtag_write_ireg(JTAG_INTEST);
	if (retval)
		return retval;

	testdata[0] = 0x0;
	testdata[1] = 0x0 | (reg_addr & 0x1f);

	/* repeat two times to read the specified ICE register */
	retval = jtag_rw_dreg(bitnr, testdata, readout);
	if (retval)
		return retval;
	retval = jtag_rw_dreg(bitnr, testdata, readout);
	if (retval)
		return retval;
	
	/* mask */
	mask >>= (32 - reg->bitnr);
	*reg_val = readout[0];
	*reg_val &= mask;
	
	reg->value = *reg_val; /* update our copy */
	return retval;
} /* end of arm7tdmi_ice_read(...) */

/*
 * NOTE: we assume that the caller has selected the ARM7TDMI
 * EmbeddedICE-RT as current scan chain path, and has maken it
 * in the internal test mode.
 */
int arm7tdmi_ice_write(u32 reg_addr, u32 reg_val)
{
	u32 testdata[2];
	u32 mask = 0xffffffff;
	ice_register_t *reg;
	/* the bit length of ARM7TDMI EmbeddedICE - scan chain 2 */
	int bitnr = arm7tdmi_target.sc[2].bitnr;
	int retval;

	reg = arm7tdmi_ice_reg_get(reg_addr);
	if (reg == NULL)
		return -ERR_TARGET_NONEXISTED_ICE_REG;

	if (target->active_sc != 2) {
		retval = jtag_select_scanchain(2);
		if (retval)
			return retval;
	}
	retval = jtag_write_ireg(JTAG_INTEST);
	if (retval)
		return retval;

	/* mask */
	mask >>= (32 - reg->bitnr);
	testdata[0] = reg_val;
	testdata[0] &= mask;

	/* ICE register address */
	testdata[1] = 0x00000020 | (reg_addr & 0x0000001f);

	/* write in */
	retval = jtag_rw_dreg(bitnr, testdata, NULL);
	if (!retval)
		reg->value = reg_val; /* update our copy */
	
	return retval;
} /* end of arm7tdmi_ice_write(...) */

int arm7tdmi_ice_set_breakpt(void)
{
	int retval;
	
	retval = jtag_select_scanchain(2);
	if (retval)
		return retval;
	retval = jtag_write_ireg(JTAG_INTEST);
	if (retval)
		return retval;

	/* disable WP0 and WP1, first */
	arm7tdmi_ice_write(ARM7TDMI_ICE_WP0_CTLVALUE, 0x0f0);
	arm7tdmi_ice_write(ARM7TDMI_ICE_WP1_CTLVALUE, 0x0f0);

	/*
	 * Use WP0 to set a instruction breakpoint
	 */
	/* WP0 address mask = ignore */
	arm7tdmi_ice_write(ARM7TDMI_ICE_WP0_ADDRMASK, 0xFFFFFFFF);
	/* WP0 data mask = ignore */
	arm7tdmi_ice_write(ARM7TDMI_ICE_WP0_DATAMASK, 0xFFFFFFFF);
	/* the control mask register with nOPC = 0, and all others bits to 1 */
	arm7tdmi_ice_write(ARM7TDMI_ICE_WP0_CTLMASK, 0x0F7);
	/* the control value register with nOPC = 0 */
	arm7tdmi_ice_write(ARM7TDMI_ICE_WP0_CTLVALUE, 0x1F0);
	
	jtag_write_ireg(JTAG_RESTART);	
	return 0;
} /* end of arm7tdmi_ice_set_breakpt(...) */

int arm7tdmi_ice_clear_breakpt(void)
{
	jtag_select_scanchain(2);
	jtag_write_ireg(JTAG_INTEST);
	arm7tdmi_ice_write(ARM7TDMI_ICE_WP0_CTLVALUE, 0x0f0);
	return 0;
} /* end of arm7tdmi_ice_clear_breakpt() */