📄 ivec.h
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/***
*** Copyright (C) 1985-1999 Intel Corporation. All rights reserved.
***
*** The information and source code contained herein is the exclusive
*** property of Intel Corporation and may not be disclosed, examined
*** or reproduced in whole or in part without explicit written authorization
*** from the company.
***
****/
/*
* Definition of a C++ class interface to MMX(TM) instruction intrinsics.
*
*/
#ifndef _IVEC_H_INCLUDED
#define _IVEC_H_INCLUDED
#ifndef RC_INVOKED
#if !defined __cplusplus
#error ERROR: This file is only supported in C++ compilations!
#endif /* !defined __cplusplus */
#if defined (_M_CEE_PURE)
#error ERROR: This file is not supported in the pure mode!
#else /* defined (_M_CEE_PURE) */
#include <mmintrin.h>
#ifndef _VEC_ASSERT
#include <crtdefs.h>
#ifdef NDEBUG
#define _VEC_ASSERT(_Expression) ((void)0)
#else /* NDEBUG */
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
_CRTIMP void __cdecl _wassert(_In_z_ const wchar_t * _Message, _In_z_ const wchar_t *_File, _In_ unsigned _Line);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#define _VEC_ASSERT(_Expression) (void)( (!!(_Expression)) || (_wassert(_CRT_WIDE(#_Expression), _CRT_WIDE(__FILE__), __LINE__), 0) )
#endif /* NDEBUG */
#endif /* _VEC_ASSERT */
/*
* Define _SILENCE_IVEC_C4799 to disable warning C4799 inside this header.
* Be careful that any code that uses these functions properly executes EMMS
* or _m_empty() after using any MMX instruction and before using the x87 NDP.
*/
#if defined (_SILENCE_IVEC_C4799)
#pragma warning(push)
#pragma warning(disable: 4799)
#endif /* defined (_SILENCE_IVEC_C4799) */
/*
* Define _ENABLE_VEC_DEBUG to enable std::ostream inserters for debug output
*/
#if defined (_ENABLE_VEC_DEBUG)
#include <iostream>
#endif /* defined (_ENABLE_VEC_DEBUG) */
class I8vec8; /* 8 elements, each element a signed or unsigned char data type */
class Is8vec8; /* 8 elements, each element a signed char data type */
class Iu8vec8; /* 8 elements, each element an unsigned char data type */
class I16vec4; /* 4 elements, each element a signed or unsigned short */
class Is16vec4; /* 4 elements, each element a signed short */
class Iu16vec4; /* 4 elements, each element an unsigned short */
class I32vec2; /* 2 elements, each element a signed or unsigned long */
class Is32vec2; /* 2 elements, each element a signed long */
class Iu32vec2; /* 2 elements, each element a unsigned long */
class I64vec1; /* 1 element, a __m64 data type - Base I64vec1 class */
#define _MM_8UB(element,vector) (*((unsigned char*)&##vector + ##element))
#define _MM_8B(element,vector) (*((signed char*)&##vector + ##element))
#define _MM_4UW(element,vector) (*((unsigned short*)&##vector + ##element))
#define _MM_4W(element,vector) (*((short*)&##vector + ##element))
#define _MM_2UDW(element,vector) (*((unsigned int*)&##vector + ##element))
#define _MM_2DW(element,vector) (*((int*)&##vector + ##element))
#define _MM_QW (*((__int64*)&vec))
/* M64 Class:
* 1 element, a __m64 data type
* Contructors & Logical Operations
*/
class M64
{
protected:
__m64 vec;
public:
M64() { }
M64(__m64 mm) { vec = mm; }
M64(__int64 mm) { _MM_QW = mm; }
M64(int i) { vec = _m_from_int(i); }
operator __m64() const { return vec; }
/* Logical Operations */
M64& operator&=(const M64 &a) { return *this = (M64) _m_pand(vec,a); }
M64& operator|=(const M64 &a) { return *this = (M64) _m_por(vec,a); }
M64& operator^=(const M64 &a) { return *this = (M64) _m_pxor(vec,a); }
};
inline M64 operator&(const M64 &a, const M64 &b) { return _m_pand( a,b); }
inline M64 operator|(const M64 &a, const M64 &b) { return _m_por(a,b); }
inline M64 operator^(const M64 &a, const M64 &b) { return _m_pxor(a,b); }
inline M64 andnot(const M64 &a, const M64 &b) { return _m_pandn(a,b); }
/* I64vec1 Class:
* 1 element, a __m64 data type
* Contains Operations which can operate on any __m64 data type
*/
class I64vec1 : public M64
{
public:
I64vec1() { }
I64vec1(__m64 mm) : M64(mm) { }
explicit I64vec1(int i) : M64(i) { }
explicit I64vec1(__int64 mm) : M64(mm) { }
I64vec1& operator= (const M64 &a) { return *this = (I64vec1) a; }
I64vec1& operator&=(const M64 &a) { return *this = (I64vec1) _m_pand(vec,a); }
I64vec1& operator|=(const M64 &a) { return *this = (I64vec1) _m_por(vec,a); }
I64vec1& operator^=(const M64 &a) { return *this = (I64vec1) _m_pxor(vec,a); }
/* Shift Logical Operations */
I64vec1 operator<<(const M64 &a) { return _m_psllq(vec, a); }
I64vec1 operator<<(int count) { return _m_psllqi(vec, count); }
I64vec1& operator<<=(const M64 &a) { return *this = (I64vec1) _m_psllq(vec, a); }
I64vec1& operator<<=(int count) { return *this = (I64vec1) _m_psllqi(vec, count); }
I64vec1 operator>>(const M64 &a) { return _m_psrlq(vec, a); }
I64vec1 operator>>(int count) { return _m_psrlqi(vec, count); }
I64vec1& operator>>=(const M64 &a) { return *this = (I64vec1) _m_psrlq(vec, a); }
I64vec1& operator>>=(int count) { return *this = (I64vec1) _m_psrlqi(vec, count); }
};
/* I32vec2 Class:
* 2 elements, each element either a signed or unsigned int
*/
class I32vec2 : public M64
{
public:
I32vec2() { }
I32vec2(__m64 mm) : M64(mm) { }
explicit I32vec2(int i) : M64 (i) { }
explicit I32vec2(__int64 i): M64(i) {}
/* Assignment Operator */
I32vec2& operator= (const M64 &a) { return *this = (I32vec2) a; }
/* Logical Assignment Operators */
I32vec2& operator&=(const M64 &a) { return *this = (I32vec2) _m_pand(vec,a); }
I32vec2& operator|=(const M64 &a) { return *this = (I32vec2) _m_por(vec,a); }
I32vec2& operator^=(const M64 &a) { return *this = (I32vec2) _m_pxor(vec,a); }
/* Addition & Subtraction Assignment Operators */
I32vec2& operator +=(const I32vec2 &a) { return *this = (I32vec2) _m_paddd(vec,a); }
I32vec2& operator -=(const I32vec2 &a) { return *this = (I32vec2) _m_psubd(vec,a); }
/* Shift Logical Operators */
I32vec2 operator<<(const I32vec2 &a) { return _m_pslld(vec,a); }
I32vec2 operator<<(int count) { return _m_pslldi(vec,count); }
I32vec2& operator<<=(const I32vec2 &a) { return *this = (I32vec2) _m_pslld(vec,a); }
I32vec2& operator<<=(int count) { return *this = (I32vec2) _m_pslldi(vec,count); }
};
/* Compare For Equality */
inline I32vec2 cmpeq(const I32vec2 &a, const I32vec2 &b) { return _m_pcmpeqd(a,b); }
inline I32vec2 cmpneq(const I32vec2 &a, const I32vec2 &b) { return _m_pandn(_m_pcmpeqd(a,b), M64(0xffffffffffffffffi64)); }
/* Unpacks */
inline I32vec2 unpack_low(const I32vec2 &a, const I32vec2 &b) {return _m_punpckldq(a,b); }
inline I32vec2 unpack_high(const I32vec2 &a, const I32vec2 &b) {return _m_punpckhdq(a,b); }
/* Is32vec2 Class:
* 2 elements, each element a signed int
*/
class Is32vec2 : public I32vec2
{
public:
Is32vec2() { }
Is32vec2(__m64 mm) : I32vec2(mm) { }
Is32vec2(signed int i0, signed int i1)
{
_MM_2DW(0,vec) = i1;
_MM_2DW(1,vec) = i0;
}
explicit Is32vec2(int i) : I32vec2 (i) {}
explicit Is32vec2(__int64 i): I32vec2(i) {}
/* Assignment Operator */
Is32vec2& operator= (const M64 &a) { return *this = (Is32vec2) a; }
/* Logical Assignment Operators */
Is32vec2& operator&=(const M64 &a) { return *this = (Is32vec2) _m_pand(vec,a); }
Is32vec2& operator|=(const M64 &a) { return *this = (Is32vec2) _m_por(vec,a); }
Is32vec2& operator^=(const M64 &a) { return *this = (Is32vec2) _m_pxor(vec,a); }
/* Addition & Subtraction Assignment Operators */
Is32vec2& operator +=(const I32vec2 &a) { return *this = (Is32vec2) _m_paddd(vec,a); }
Is32vec2& operator -=(const I32vec2 &a) { return *this = (Is32vec2) _m_psubd(vec,a); }
/* Shift Logical Operators */
Is32vec2 operator<<(const M64 &a) { return _m_pslld(vec,a); }
Is32vec2 operator<<(int count) { return _m_pslldi(vec,count); }
Is32vec2& operator<<=(const M64 &a) { return *this = (Is32vec2) _m_pslld(vec,a); }
Is32vec2& operator<<=(int count) { return *this = (Is32vec2) _m_pslldi(vec,count); }
/* Shift Arithmetic Operations */
Is32vec2 operator>>(const M64 &a) { return _m_psrad(vec, a); }
Is32vec2 operator>>(int count) { return _m_psradi(vec, count); }
Is32vec2& operator>>=(const M64 &a) { return *this = (Is32vec2) _m_psrad(vec, a); }
Is32vec2& operator>>=(int count) { return *this = (Is32vec2) _m_psradi(vec, count); }
#if defined (_ENABLE_VEC_DEBUG)
/* Output for Debug */
friend std::ostream& operator<< (std::ostream &os, const Is32vec2 &a)
{
os << " [1]:" << _MM_2DW(1,a)
<< " [0]:" << _MM_2DW(0,a);
return os;
}
#endif /* defined (_ENABLE_VEC_DEBUG) */
/* Element Access for Debug, No data modified */
const int& operator[](int i)const
{
_VEC_ASSERT(static_cast<unsigned int>(i) < 2); /* Only 2 elements to access */
return _MM_2DW(i,vec);
}
/* Element Access and Assignment for Debug */
int& operator[](int i)
{
_VEC_ASSERT(static_cast<unsigned int>(i) < 2); /* Only 2 elements to access */
return _MM_2DW(i,vec);
}
};
/* Compares */
inline Is32vec2 cmpeq(const Is32vec2 &a, const Is32vec2 &b) { return _m_pcmpeqd(a,b); }
inline Is32vec2 cmpneq(const Is32vec2 &a, const Is32vec2 &b) { return _m_pandn(_m_pcmpeqd(a,b), M64(0xffffffffffffffffi64)); }
inline Is32vec2 cmpgt(const Is32vec2 &a, const Is32vec2 &b) { return _m_pcmpgtd(a,b); }
inline Is32vec2 cmplt(const Is32vec2 &a, const Is32vec2 &b) { return _m_pcmpgtd(b,a); }
inline Is32vec2 cmple(const Is32vec2 &a, const Is32vec2 &b) { return _m_pandn(_m_pcmpgtd(a,b), M64(0xffffffffffffffffi64)); }
inline Is32vec2 cmpge(const Is32vec2 &a, const Is32vec2 &b) { return _m_pandn(_m_pcmpgtd(b,a), M64(0xffffffffffffffffi64)); }
/* Unpacks & Pack */
inline Is32vec2 unpack_low(const Is32vec2 &a, const Is32vec2 &b) { return _m_punpckldq(a,b); }
inline Is32vec2 unpack_high(const Is32vec2 &a, const Is32vec2 &b) { return _m_punpckhdq(a,b); }
/* Iu32vec2 Class:
* 2 elements, each element unsigned int
*/
class Iu32vec2 : public I32vec2
{
public:
Iu32vec2() { }
Iu32vec2(__m64 mm) : I32vec2(mm) { }
Iu32vec2(unsigned int ui0, unsigned int ui1)
{
_MM_2UDW(0,vec) = ui1;
_MM_2UDW(1,vec) = ui0;
}
explicit Iu32vec2(int i) : I32vec2 (i) { }
explicit Iu32vec2(__int64 i) : I32vec2 (i) { }
/* Assignment Operator */
Iu32vec2& operator= (const M64 &a) { return *this = (Iu32vec2) a; }
/* Logical Assignment Operators */
Iu32vec2& operator&=(const M64 &a) { return *this = (Iu32vec2) _m_pand(vec,a); }
Iu32vec2& operator|=(const M64 &a) { return *this = (Iu32vec2) _m_por(vec,a); }
Iu32vec2& operator^=(const M64 &a) { return *this = (Iu32vec2) _m_pxor(vec,a); }
/* Addition & Subtraction Assignment Operators */
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