if_wlp_wavelan.h

WaveLAN无线网卡Linux驱动程序

/*
 * Copyright (c) 1997 Carnegie Mellon University.            All Rights
 * Reserved.
 * 
 * Permission to use, copy, modify, and distribute this software and its
 * documentation is hereby granted (including for commercial or for-profit
 * use), provided that both the copyright notice and this permission notice
 * appear in all copies of the software, derivative works, or modified
 * versions, and any portions thereof, and that both notices appear in
 * supporting documentation, and that credit is given to Carnegie Mellon
 * University in all publications reporting on direct or indirect use of this
 * code or its derivatives.
 * 
 * THIS IMPLEMENTATION IS EXPERIMENTAL AND MAY HAVE BUGS, SOME OF WHICH MAY HAVE
 * SERIOUS CONSEQUENCES.  CARNEGIE MELLON PROVIDES THIS SOFTWARE IN ITS "AS
 * IS" CONDITION, AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL CARNEGIE MELLON
 * UNIVERSITY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * Carnegie Mellon encourages (but does not require) users of this software to
 * return any improvements or extensions that they make, and to grant
 * Carnegie Mellon the rights to redistribute these changes without
 * encumbrance.
 * 
 * 
 */

#ifndef __IF_WLP_WAVELAN_H__
#define __IF_WLP_WAVELAN_H__


#if NCARD > 0

#include <sys/select.h>
#include <pccard/cardinfo.h>
#include <pccard/driver.h>
#include <pccard/slot.h>

#endif /* NCARD */

extern u_char ether_wavelan_snaphdr[8];
extern u_char ether_bridge_multiaddr[ETHER_ADDR_LEN];
extern u_char ether_beacon_multiaddr[ETHER_ADDR_LEN];
extern char*  RoamModeString[4];

struct wlp_softc;
struct ifstats;

/*
 * ======================================================================
 * ioctl()'s
 * ======================================================================
 */
#define SIOCSIFNWID	_IOW ('i', 61, struct ifreq)
#define SIOCGIFNWID	_IOWR('i', 62, struct ifreq)
#define SIOCSSIGTHRESH	_IOW ('i', 63, struct ifreq)

#ifdef KERNEL
/*
 * ======================================================================
 * Function Prototypes (if_wlp_wavelan.c)
 * ======================================================================
 */
int     wlpprobe(struct isa_device *, struct pccard_devinfo*);
int     wlpconfig(struct wlp_softc *);
int     wavelan_ioctl(struct ifnet*, int, caddr_t);
void	wavelan_stats(struct wlp_softc*, struct ifstats*);
void    SetNWID(struct wlp_softc*, int, int);

/*
 * ======================================================================
 * WaveLAN Hardware
 * ======================================================================
 */
/* Port 0 - Intel 82593 */
/* Port 1 - Host Adapter Command / Status Register */

#define P1_ROM_WEN		0x80	/* Write Enable */
#define P1_RX_DMA_RESET		0x40
#define P1_TX_DMA_RESET		0x20
#define P1_PWR_STAT		0x10	/* Power State of the modem */
#define P1_NO_CLK		0x10	/* No clock */
#define P1_LOF			0x08	/* Lock out flag */
#define P1_MMI_BUSY		0x04
#define P1_UNUSED1		0x02
#define P1_UNUSED2		0x01

/*
 * Port 2 - Program I/O Register Low - Receive Pointer Latched Low
 */

#define P2_PIOL			0xFF	/* 8 bits (write) */
#define P2_RPLL			0xFF	/* 8 bits (write) */

/*
 * Port 3 - Program I/O Register High - Receive Pointer Latched High
 */

#define P3_SEL_TX		0x20	/* (write) */
#define P3_PIOH			0x1F	/* 5 bits (write) */
#define P3_RPLH			0x1F	/* 5 bits (read) */

/* Port 4 - Program I/O Port */

/* Port 5 - unused */

/* Port 6 - Modem Management Regiseter */

#define P6_MMI_ADDR		0x7E	/* 6 bits (write) */
#define P6_MMI_WR		0x01	/* (write) */

/* Port 7 - Modem Management Data Port */

/* ======================================================================
   Modem Command Registers
   ====================================================================== */
#define RF_SECURITY_KEY_1		0x00
#define RF_SECURITY_KEY_2		0x01
#define RF_SECURITY_KEY_3		0x02
#define RF_SECURITY_KEY_4		0x03
#define RF_SECURITY_KEY_5		0x04
#define RF_SECURITY_KEY_6		0x05
#define RF_SECURITY_KEY_7		0x06
#define RF_SECURITY_KEY_8		0x07
#define RF_SECURITY_CTRL		0x08
/* 0x09 is reserved */
#define RF_SECURITY_IO_INVERT		0x0A
/* 0x0B - 0x0F is reserved */

#define RF_DSP_LOOP			0x10
#define RF_DSP_JAB_EN			0x11
#define RF_DSP_FREEZE			0x12
#define RF_DSP_RX_ANTENNA		0x13

#define RF_INTER_FRAME_SPACE		0x14
#define RF_MODEM_DELAY			0x15
#define RF_JAM_TIME			0x16
/* 0x17 is reserved */

#define RF_SIGNAL_LEVEL_THRESHOLD	0x18
/* 0x19 is reserved */
/* 0x1A is reserved */
#define RF_QUALITY_THRESHOLD		0x1B
#define RF_NWID_CODE_REGISTER_L		0x1C
#define RF_NWID_CODE_REGISTER_H		0x1D
#define RF_MODE_SELECT			0x1E

#define RF_EECTRL			0x20
#define RF_EEADDR			0x21
#define RF_EEDATAL			0x22
#define RF_EEDATAH			0x23
#define RF_ANALCTRL			0x24

/* ======================================================================
   Modem Status Registers
   ====================================================================== */
/* 0x00 - 0x08 are reserved */
#define RF_SECURITY_OPTION_ID		0x09
#define RF_SECURITY_IO_INVERT		0x0A
/* 0x0B - 0x0F are reserved */

#define RF_TX_RX			0x10
#define RF_MODEM_DSP_ID			0x11
#define RF_CORRECT_NWIDL		0x14
#define RF_CORRECT_NWIDH		0x15
#define RF_INCORRECT_NWIDL		0x16
#define RF_INCORRECT_NWIDH		0x17
/* #define RF_SIGNAL_LEVEL_THRESHOLD	0x18 */
#define RF_SIGNAL_LEVEL			0x19
#define RF_SILENCE_LEVEL		0x1A
#define RF_SIGNAL_QUALITY		0x1B
/* 0x1C - 0x1F are reserved */

/* #define RF_EECTRL			0x20 */
/* 0x21 is reserved */
/* #define RF_EEDATAL			0x22 */
/* #define RF_EEDATAH			0x23 */

/* ======================================================================
   Fields for the various modem registers...
   ====================================================================== */
#define RF_EECTRL_READ		0x06
#define RF_EECTRL_WREN		0x04	/* write enable */
#define RF_EECTRL_WRITE		0x05
#define RF_EECTRL_WRALL		0x04	/* write all */
#define RF_EECTRL_WDS		0x04	/* write disable */

#define RF_EECTRL_PRREAD	0x06
#define RF_EECTRL_PREN		0x04	/* protection enable */
#define RF_EECTRL_PRCLEAR	0x07
#define RF_EECTRL_PRWRITE	0x05
#define RF_EECTRL_PRDS		0x04

/*
 * Values that can be read...
 */
#define RF_EECTRL_ID24		0xF0
#define RF_EECTRL_DWLD		0x08
#define RF_EECTRL_EEBUSY	0x04

#define RF_EEADDR		0x21
#define RF_EEADDR_WEN		0xC0	/* write enable */
#define RF_EEADDR_WDS		0x00	/* write disable */

#define RF_EEDATAL		0x22

#define RF_EEDATAH		0x23

#define RF_ANALCTRL		0x24
#define RF_ANANCTRL_EXTANT	0x01	/* external antenna */

/*
 * Chip ID's for the 2.4 gHz product
 */
#define RF_X24STAT_CHIPID_X24		0xA0
#define RF_X24STAT_CHIPID_ARIADNE	0xB0

/* ======================================================================
   Contents of the PSA
   ====================================================================== */
#define READ_PSA(attrmem, x)	\
	((u_int8_t) *(attrmem + PSA_OFFSET + ((x) << 1)))

#define PSA_OFFSET		0xE00
#define PSA_UMAC_ADDRESS       	0x10
#define PSA_LMAC_ADDRESS       	0x16
#define PSA_MAC_ADDRESS_SELECT	0x1C
#define PSA_COMPAT_NUMBER	0x1D
#define PSA_THRESHOLD_PRESET	0x1E
#define PSA_FEATURE_SELECT	0x1F
#define PSA_SUBBAND_NUMBER	0x20
#define PSA_QUALITY_THRESHOLD	0x21
#define PSA_RESERVED1		0x22
#define PSA_NWID		0x23
#define PSA_NWID_SELECT		0x25
#define PSA_SECURITY_SELECT	0x26
#define PSA_ENCRYPTION_KEY	0x27
#define PSA_RESERVED2		0x2F
#define PSA_CALL_CODE		0x30
#define PSA_NWID_PREFIX		0x38
#define PSA_RESERVED3		0x3A
#define PSA_CONFIG_STATUS	0x3C
#define PSA_CRC16		0x3D
#define PSA_CRC_STATUS		0x3F

/*
 * ======================================================================
 * Macros
 * ======================================================================
 */
#if 0

#define MMIRead(reg, val)					\
  {								\
    while( IORead1(0x01) & P1_MMI_BUSY );			\
    IOWrite1(0x06, ((reg) << 1) & ~P6_MMI_WR);			\
    IOWrite1(0x07, 0x00);	/* starts read/write cycle */	\
								\
    while( IORead1(0x01) & P1_MMI_BUSY );			\
    (val) = IORead1(0x07);					\
}

#define MMIWrite(reg, val)					\
  {								\
    while( IORead1(0x01) & P1_MMI_BUSY );			\
    IOWrite1(0x06, ((reg) << 1) | P6_MMI_WR);			\
    IOWrite1(0x07, (val));					\
  }

#endif

#define WLP_ResetTXDMA()						\
  IOWrite1(0x01, P1_TX_DMA_RESET | P1_PWR_STAT); DELAY (1000);		\
  IOWrite1(0x01, P1_PWR_STAT); DELAY (1000)

#define WLP_ResetRXDMA()						\
  IOWrite1(0x02, (0x00 & P2_PIOL));					\
  IOWrite1(0x03, ((0x00 >> 8) & P3_PIOH));				\
									\
  IOWrite1(0x01, P1_RX_DMA_RESET | P1_PWR_STAT); DELAY (1000);		\
  IOWrite1(0x01, P1_PWR_STAT); DELAY (1000)

#define WLP_PointTXBUF(x)						\
  IOWrite1(0x02, ((x) & P2_PIOL));					\
  IOWrite1(0x03, (((x) >> 8) & P3_PIOH) | P3_SEL_TX)

#define WLP_PointRXBUF(x)						\
  IOWrite1(0x02, ((x) & P2_PIOL));					\
  IOWrite1(0x03, (((x) >> 8) & P3_PIOH))

#endif /* KERNEL */


/* ======================================================================
   Data Structures
   ====================================================================== */
struct wavelan_stats {
	u_int16_t       nwid;
	u_int16_t       domid;
	u_int16_t       roam;
	u_int16_t       mode;
	u_int16_t       beaconkey;
	u_int32_t       soreq_cnt;	/* Number of Sign-on Requests */
	u_int32_t       soreq_failed;	/* Number of Failed Sign-on Requests */
	u_int32_t       beacon_cnt;	/* Number of Beacons Received */
	u_int32_t       beacon_kept;	/* Number of Beacons Processed */

	u_char          ap_name[32];	/* Access Point Name */
	u_int16_t       ap_noise;
	u_int16_t       ap_interval;
	u_int16_t       ap_timeout;
	u_int32_t       ap_signal;
#define SIGL_SHIFT 16
#define SILL_SHIFT  8
#define SIGQ_SHIFT  0
	u_int32_t       ap_thresh;
#define STOPC_SHIFT 16
#define REGC_SHIFT   8
#define FASTC_SHIFT  0

	/* Modem Statistics */
	u_int16_t       nwid_correct;
	u_int16_t       nwid_incorrect;
	u_int8_t        signal_threshold;
	u_int32_t	signal_stats;
};

#endif				/* __IF_WLP_WAVELAN_H__ */