init_5410.inc

这是在C5000系列DSP上实现UART（异步串口）TL16c550芯片的汇编语言实现代码

;==============================================================================
;
;		This inc file can initialization TMS320VC5410 & TMS320VC5416
;		device's CPU and peripheral registers.
;
;		author:   tangjiguang.
;     	date:     2004.3.16
;
;==============================================================================


;==============================================================================
;     ST0
;==============================================================================
INIT_ARP           	.set 000b<<13		;Auxiliary register pointer
INIT_TC   			.set 1b<<12			;Test/control flag
INIT_C             	.set 1b<<11			;Carry bit
INIT_OVA           	.set 0b<<10			;Overflow flag for accumulator A
INIT_OVB           	.set 0b<<9			;Overflow flag for accumulator B
INIT_DP            	.set 000000000b<<0	;Data memory page pointer

INIT_ST0           	.set INIT_ARP    |INIT_TC     |INIT_C    |INIT_OVA    |INIT_OVB    |INIT_DP

;==============================================================================
;     ST1
;==============================================================================
INIT_BRAF   		.set 0b<<15		;Block repeat active flag
INIT_CPL			.set 0b<<14		;Compiler mode 
INIT_XF   		    .set 1b<<13		;XF status
INIT_HM				.set 0b<<12		;Hold mode
INIT_INTM   		.set 0b<<11		;Interrupt mode
									;disable all the maskable interrupt
INIT_ST1_RESERVED	.set 0b<<10		;Always read as 0
INIT_OVM   			.set 1b<<9		;Overflow mode
INIT_SXM			.set 1b<<8		;Sign extension mode
INIT_C16   			.set 0b<<7		;Dual 16 bits/double precision arithmetic mode
INIT_FRCT			.set 1b<<6		;Fracional mode
INIT_CMPT   		.set 0b<<5		;Compatibility
INIT_ASM			.set 00000b<<0	;Accumulator shift mode

INIT_ST1_HIGH      	.set INIT_BRAF     |INIT_CPL      |INIT_XF   |INIT_HM    |INIT_INTM    |INIT_ST1_RESERVED
INIT_ST1_LOW       	.set INIT_OVM      |INIT_SXM      |INIT_C16  |INIT_FRCT  |INIT_CMPT    |INIT_ASM
INIT_ST1           	.set INIT_ST1_HIGH |INIT_ST1_LOW

;==============================================================================
;	  PMST
;==============================================================================
INIT_IPTR          	.set 111111111b<<7	;Interrupt vector pointer
INIT_MPMC        	.set 1b<<6			;Microprocessor/microcomputer mode
INIT_OVLY          	.set 1b<<5			;RAM overlay
										;load the program on chip ram
INIT_AVIS          	.set 0b<<4			;Address visibility mode
INIT_DROM          	.set 0b<<3			;Data ROM
INIT_CLKOFF        	.set 0b<<2			;CLOCKOUT off
INIT_SMUL	     	.set 0b<<1			;Saturation on multiplication
INIT_SST			.set 0b<<0			;Saturation on store

INIT_PMST_HIGH     	.set INIT_IPTR       |INIT_MPMC     |INIT_OVLY   |INIT_AVIS   |INIT_DROM
INIT_PMST_LOW      	.set INIT_CLKOFF     |INIT_SMUL     |INIT_SST 
INIT_PMST          	.set INIT_PMST_HIGH  |INIT_PMST_LOW

;==============================================================================
;      IMR
;==============================================================================
INIT_IMR_RESERVED   .set 00b<<14	;Reserved
INIT_DMAC5			.set 0b<<13		;DMA channel 5 interrupt
INIT_DMAC4			.set 0b<<12 	;DMA channel 4 interrupt 
INIT_BXINT1			.set 0b<<11		;McBSP #1 transmit interrupt(default)
INIT_BRINT1			.set 0b<<10		;McBSP #1 receive interrupt(default)
INIT_HPINT			.set 0b<<9		;HPI interrupt
INIT_INT3			.set 0b<<8		;External user interrupt #3
INIT_BXINT2			.set 0b<<7		;McBSP #2 transmit interrupt(default)
INIT_BRINT2			.set 0b<<6		;McBSP #2 receive interrupt(default)
INIT_BXINT0			.set 0b<<5		;McBSP #0 transmit interrupt(default)
INIT_BRINT0			.set 0b<<4		;McBSP #0 receive interrupt(default)
INIT_TINT0			.set 0b<<3		;Timer0 interrupt
INIT_INT2			.set 0b<<2		;External user interrupt #2
INIT_INT1			.set 1b<<1		;External user interrupt #1
INIT_INT0			.set 0b<<0		;External user interrupt #0

INIT_IMR_HIGH		.set INIT_IMR_RESERVED |INIT_DMAC5   |INIT_DMAC4   |INIT_BXINT1  |INIT_BRINT1
INIT_IMR_MID		.set INIT_HPINT        |INIT_INT3    |INIT_BXINT2  |INIT_BRINT2  |INIT_BXINT0   |INIT_BRINT0
INIT_IMR_LOW		.set INIT_BRINT0       |INIT_TINT0   |INIT_INT2    |INIT_INT1    |INIT_INT0
INIT_IMR			.set INIT_IMR_HIGH     |INIT_IMR_MID |INIT_IMR_LOW

;==============================================================================
;      SWWSR:Software Wait_State Register
;==============================================================================
INIT_XPA	      	.set 0b<<15		;Extended program address control
INIT_IO				.set 010b<<12	;I/O space
INIT_DATAHI			.set 010b<<9	;Data space(8000-FFFFh)
INIT_DATALO			.set 010b<<6	;Data space(0000-7FFFh)
INIT_PROGHI			.set 010b<<3	;Program space(xx8000-xxFFFFh)	
INIT_PROGLO			.set 010b<<0	;Program space(xx0000-xx7FFFh)

INIT_SWWSR			.set INIT_XPA    |INIT_IO    |INIT_DATAHI    |INIT_DATALO    |INIT_PROGHI    |INIT_PROGLO

;==============================================================================
;      BSCR:Bank-Switching Control Register
;==============================================================================
INIT_CONSEC			.set 0b<<15			;Consecutive bank switching bit specifies
										;the bank-switching mode
INIT_DIVFCT			.set 00b<<13		;CLKOUT output divide factor
INIT_IACKOFF		.set 0b<<12			;IACK signal output off enable bit controls the 
										;IACK signal output off function
INIT_BSCR_RESERVED1	.set 000000000b<<3 	;Reserved
INIT_HBH			.set 0b<<2			;For C5416:HPI data bus holder enable bit
INIT_BH				.set 0b<<1			;For C5416:Bus holder enable bit
INIT_BSCR_RESERVED2	.set 0b<<0			;Reserved

INIT_BSCR_HIGH		.set INIT_CONSEC     |INIT_DIVFCT    |INIT_IACKOFF         |INIT_BSCR_RESERVED1
INIT_BSCR_LOW		.set INIT_HBH        |INIT_BH        |INIT_BSCR_RESERVED2
INIT_BSCR			.set INIT_BSCR_HIGH  |INIT_BSCR_LOW

;==============================================================================
;      SWCR:Software Wait-State Control Register
;==============================================================================
INIT_SWCR_RESERVED	.set 000000000000000b<<1;Reserved
INIT_SWSM			.set 0b<<0				;Software Wait-State multiplier bit

INIT_SWCR			.set INIT_SWCR_RESERVED   |INIT_SWSM

;==============================================================================
;      CLKMD:Clock Mode Register
;==============================================================================
INIT_PLLMUL			.set 0001b<<12		;PLL mulitplier
INIT_PLLDIV			.set 0b<<11			;PLL diveder
INIT_PLLCOUNT		.set 00000000b<<3	;PLL counter value
INIT_PLLON_OFF		.set 1b<<2			;PLL on/off
INIT_PLLNDIV		.set 1b<<1			;PLL clock generator select
INIT_PLLSTATUS		.set 1b<<0			;PLL status

INIT_CLKMD_HIGH     .set INIT_PLLMUL     |INIT_PLLDIV    |INIT_PLLCOUNT     
INIT_CLKMD_LOW      .set INIT_PLLON_OFF  |INIT_PLLNDIV   |INIT_PLLSTATUS
INIT_CLKMD          .set INIT_CLKMD_HIGH |INIT_CLKMD_LOW