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📄 div_clk.fit

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💻 FIT
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-- MAX+plus II Compiler Fit File      
-- Version 10.2 07/10/2002            
-- Compiled: 08/27/2007 16:38:33      

-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "div_clk"
BEGIN

    DEVICE = "EPM7032SLC44-5";

    "clkin"                        : INPUT_PIN  = 43     ;
    "clkout0"                      : OUTPUT_PIN = 37     ; -- LC21
    "clkout1"                      : OUTPUT_PIN = 36     ; -- LC22
    "clkout2"                      : OUTPUT_PIN = 41     ; -- LC17
    "clkout3"                      : OUTPUT_PIN = 40     ; -- LC18
    "clkout4"                      : OUTPUT_PIN = 39     ; -- LC19
    "clkout5"                      : OUTPUT_PIN = 34     ; -- LC23
    "clkout6"                      : OUTPUT_PIN = 33     ; -- LC24

END;

INTERNAL_INFO "div_clk"
BEGIN
	DEVICE = EPM7032SLC44-5;
	LC24    : LORAX = "G33R0";
	LC23    : LORAX = "G32R0,PA12R0C1";
	LC19    : LORAX = "G15R0,PA3R0C1";
	LC18    : LORAX = "G14R0,PA5R0C1";
	LC17    : LORAX = "G13R0,PA7R0C1";
	LC22    : LORAX = "G31R0,PA14R0C1";
	LC21    : LORAX = "G30R0,PA16R0C1";
END;

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