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📄 audiostream.c

📁 driver wdk
💻 C
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123 
	pDE->Recovering[nChannel]=FALSE;
	return 0;
}

static int StartAudioRPS(PDEVICE_EXTENSION pDE, int Channel)
{
    int rpsIndex;
	KIRQL OldIrql;
	int nError=0;
	int i;
	for(i=0; i<2; i++){
		nError=0;
		while(1){
			if(!WaitRPS(pDE))
				nError=1;
			KeAcquireSpinLock(&pDE->RPSLock, &OldIrql);
			if(nError==0 && (Ave2kReadRegister(pDE, MC1)&0x1000)){
				KeReleaseSpinLock(&pDE->RPSLock, OldIrql);
				continue;
			}
			break;
		}
		//KdPrint(("read MC1=%x before loop(Ch%d)\n", Ave2kReadRegister(pDE, MC1), Channel));
		Ave2kWriteRegister(pDE, RPS_TOV0, 0);
		Ave2kWriteRegister(pDE, RPS_PAGE0, 0);
		Ave2kWriteRegister(pDE, MC1, 0x10000000); //Disable EPS0 first
		pDE->RPS[0].PhysicalAddress=MmGetPhysicalAddress(&pDE->RPS[0].RPSBuffer[0]).u.LowPart;
		Ave2kWriteRegister(pDE, RPS_ADDR0, pDE->RPS[0].PhysicalAddress);
		//Fill the RPS sequence
		rpsIndex=0;
		if(Channel ==0){
			pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_PAUSE|RE_GPIO_0;
			pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_PAUSE|RE_GPIO_0|MASK_26;
			//pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_JUMP|RE_GPIO_0;
		}
		else{
			pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_PAUSE|RE_GPIO_1;
			pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_PAUSE|RE_GPIO_1|MASK_26;
			//pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_JUMP|RE_GPIO_1;
		}
		//pDE->RPS[0].RPSBuffer[rpsIndex]=pDE->RPS[0].PhysicalAddress+(rpsIndex-1)*sizeof(ULONG);
		//rpsIndex++;

		if(Channel == 0){ 	   //first DSP, use audio channel 2
			pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_WR_REG|(1<<8)|(MC1/4);
			pDE->RPS[0].RPSBuffer[rpsIndex++]=0x00040004; //enable A2 input DMA 
			pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_WR_REG|(1<<8)|(IER/4);
			pDE->IERValue |= 0X8008; //A2_in: bit 15
			pDE->RPS[0].RPSBuffer[rpsIndex++]=pDE->IERValue;
		}
		else{					//second DSP, use audio channel 1
			pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_WR_REG|(1<<8)|(MC1/4);
			pDE->RPS[0].RPSBuffer[rpsIndex++]=0x00010001; //enable A1 input DMA 
			pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_WR_REG|(1<<8)|(IER/4);
			pDE->IERValue |= 0X2010; //A1_in: bit 13;
			pDE->RPS[0].RPSBuffer[rpsIndex++]=pDE->IERValue;
		}
		pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_STOP;
		ASSERT(RPSBUFFERSIZE >= rpsIndex);
		//KdPrint(("Enable RPS(Ch%d)\n", Channel));
		Ave2kWriteRegister(pDE, MC1, 0x10001000); //Enable EPS0
		//KdPrint(("Release spin lock\n"));
		KeReleaseSpinLock(&pDE->RPSLock, OldIrql);
		if(WaitRPS(pDE)){
			KdPrint(("Device %d/%d: RPS success at pass %d\n",pDE->NtDeviceNumber+1, Channel, i));
			return 1;
		}
	}
	pDE->ExStat[Channel]|=EXSTAT_RUNFAIL;
	return 0;
}
BOOLEAN DisableAllDataChannel(PDEVICE_EXTENSION pDE)
{
	int i;
	int Limit=1;
	if(pDE->Double)
		Limit=2;
	for(i=0; i<Limit; i++){
		if(pDE->DataReceiving[i]){
			DisableAudio(pDE,(UCHAR)i, TRUE);
			pDE->DataReceiving[i] = FALSE;
		}
	}
	return TRUE;
}

#if PUT_AUDIO_TO_CHANNEL==1
#define A1MASTER  0
#define A2MASTER  0
#elif PUT_AUDIO_TO_CHANNEL==2
#define A1MASTER  0
#define A2MASTER  0
#else
   #if USING_AUDIO_CHANNEL==1
		#define A1MASTER  0
		#define A2MASTER  0
   #else
		#define A1MASTER  0
		#define A2MASTER  0
   #endif	     
#endif

#define I2C_TRANSFER	0x8c
#define I2C_STATUS	0x90
#define GPIO_CTRL 	0xe0
#define AUDIO_CFG1	0xf4
#define AUDIO_CFG2	0xf8
#define MC1		0xfc
#define MC2		0x100

#define TSL1_1		0x180
#define TSL1_2		0x184
#define TSL1_3		0x188
#define TSL1_4		0x18c
#define TSL1_5		0x190
#define TSL1_6		0x194
#define TSL1_7		0x198
#define TSL1_8		0x19c

#define TSL2_1		0x1c0
#define TSL2_2		0x1c4
#define TSL2_3		0x1c8
#define TSL2_4		0x1cc
#define TSL2_5		0x1d0
#define TSL2_6		0x1d4
#define TSL2_7		0x1d8
#define TSL2_8		0x1dc

#define EAP_YES		0x02000200
#define EAP_NO		0x02000000

#define GP3_HIGH	0x50000000
#define GP3_LOW		0x40000000
#define GP2_HIGH	0x00500000
#define GP2_LOW		0x00400000
#define GP1_HIGH	0x00005000
#define GP1_LOW		0x00004000
#define GP0_HIGH	0x00000050
#define GP0_LOW		0x00000040
//MC1 bits
#define EI2C		0x0100
//MC2 bits
#define UPLD_IIC	0x0001

void ConfigAudio(PDEVICE_EXTENSION pDE)
{
  unsigned long lAudioMode=3;
  unsigned long lMaxLevel;
  unsigned long lWS0,lWS1,lWS2,lWS3,lWS4;
  unsigned long lAudioConfig1,lAudioConfig2;

  lMaxLevel=pDE->lMaxLevel;
  Ave2kWriteRegister(pDE, MC1, EAP_YES); //Enable audio port pins
//  Reg[MC1]=EAP_YES;
  if(A1MASTER){
    lWS0=(WS_CTRL_OTSL1<<2)|WS_SYNC_I2S;
    lAudioConfig2=(CLK_SRC_DIV4<<27)|BCLK1_OE_YES;	//64fs
  }
  else{//changed PCB and future PCB
    lWS0=(WS_CTRL_INPUT<<2)|WS_SYNC_I2S;
    lAudioConfig2 = (CLK_SRC1_BCLK1<<27)|BCLK1_OE_NO;
  }
	if(pDE->BoardVersion==REVD1){
		lWS4=(WS_CTRL_OTSL2<<2)|WS_SYNC_I2S;
		lAudioConfig2 |=(CLK_SRC_DIV6<<22)|BCLK2_OE_YES;
	}
	else{
		lWS4=(WS_CTRL_INPUT<<2)|WS_SYNC_I2S;
		lAudioConfig2 |=(CLK_SRC2_BCLK2<<22)|BCLK2_OE_NO;
	}
	lWS1=lWS2=lWS3=(WS_CTRL_3STATE<<2)|WS_SYNC_I2S;
  lAudioConfig1=(lAudioMode<<29)|(lMaxLevel<<22)|A1_SWAP_YES|A2_SWAP_YES| \
	   (lWS0<<16)|(lWS1<<12)|(lWS2<<8)|(lWS3<<4)|(lWS4);
  Ave2kWriteRegister(pDE,AUDIO_CFG1,lAudioConfig1);
  Ave2kWriteRegister(pDE,AUDIO_CFG2,lAudioConfig2);

//#endif

//#else
//#pragma message("Using audio channel 2")
//#if PUT_AUDIO_TO_CHANNEL==2
//  #pragma message("Put sound to channel 2")
//  Ave2kWriteRegister(pDE,TSL2_1,(0l<<27)|(2l<<11)|(1l<<10)|(3l<<2));
//  Ave2kWriteRegister(pDE,TSL2_2,(0l<<27)|(2l<<11)|(1l<<10)|(3l<<2));
//  Ave2kWriteRegister(pDE,TSL2_3,(0l<<27)|(2l<<11)|(0l<<10)|(3l<<2));
//  Ave2kWriteRegister(pDE,TSL2_4,(0l<<27)|(2l<<11)|(0l<<10)|(3l<<2));
//  Ave2kWriteRegister(pDE,TSL2_5,(1l<<27)|(2l<<11)|(1l<<10)|(3l<<2));
//  Ave2kWriteRegister(pDE,TSL2_6,(1l<<27)|(2l<<11)|(1l<<10)|(3l<<2));
//  Ave2kWriteRegister(pDE,TSL2_7,(1l<<27)|(2l<<11)|(0l<<10)|(3l<<2));
//  Ave2kWriteRegister(pDE,TSL2_8,(1l<<27)|(2l<<11)|(0l<<10)|(3l<<2)|(1l<<8)|EOS);
//#else  //put data to this channel
//  #pragma message("Put data to channel 2")
	if(! pDE->Double){
		Ave2kWriteRegister(pDE,TSL1_1,(0l<<31)|(1l<<24)|(1l<<22)|(3l<<15));//send into feedback buffer
		Ave2kWriteRegister(pDE,TSL1_2,(0l<<31)|(1l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_3,(0l<<31)|(1l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_4,(0l<<31)|(1l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_5,(1l<<31)|(1l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_6,(1l<<31)|(1l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_7,(1l<<31)|(1l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_8,(1l<<31)|(1l<<24)|(0l<<23)|(1l<<21)|(3l<<15)|EOS);

		Ave2kWriteRegister(pDE,TSL2_1,(0l<<27)|(2l<<11)|(0l<<10)|(3l<<2));
		Ave2kWriteRegister(pDE,TSL2_2,(0l<<27)|(2l<<11)|(1l<<10)|(3l<<2));
		Ave2kWriteRegister(pDE,TSL2_3,(0l<<27)|(2l<<11)|(1l<<10)|(3l<<2));
		Ave2kWriteRegister(pDE,TSL2_4,(0l<<27)|(2l<<11)|(0l<<10)|(3l<<2));
		Ave2kWriteRegister(pDE,TSL2_5,(1l<<27)|(2l<<11)|(0l<<10)|(3l<<2));
		Ave2kWriteRegister(pDE,TSL2_6,(1l<<27)|(2l<<11)|(1l<<10)|(3l<<2));
		Ave2kWriteRegister(pDE,TSL2_7,(1l<<27)|(2l<<11)|(1l<<10)|(3l<<2));
		Ave2kWriteRegister(pDE,TSL2_8,(1l<<27)|(2l<<11)|(0l<<10)|(3l<<2)|(1l<<8)|EOS);
  }
  else{
		Ave2kWriteRegister(pDE,TSL1_1,(0l<<31)|(2l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_2,(0l<<31)|(2l<<24)|(1l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_3,(0l<<31)|(2l<<24)|(1l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_4,(0l<<31)|(2l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_5,(1l<<31)|(2l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_6,(1l<<31)|(2l<<24)|(1l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_7,(1l<<31)|(2l<<24)|(1l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_8,(1l<<31)|(2l<<24)|(0l<<23)|(1l<<21)|(3l<<15)|EOS);

		Ave2kWriteRegister(pDE,TSL2_1,(0l<<27)|(1l<<11)|(0l<<10)|(3l<<2));
		Ave2kWriteRegister(pDE,TSL2_2,(0l<<27)|(1l<<11)|(1l<<10)|(3l<<2));
		Ave2kWriteRegister(pDE,TSL2_3,(0l<<27)|(1l<<11)|(1l<<10)|(3l<<2));
		Ave2kWriteRegister(pDE,TSL2_4,(0l<<27)|(1l<<11)|(0l<<10)|(3l<<2));
		Ave2kWriteRegister(pDE,TSL2_5,(1l<<27)|(1l<<11)|(0l<<10)|(3l<<2));
		Ave2kWriteRegister(pDE,TSL2_6,(1l<<27)|(1l<<11)|(1l<<10)|(3l<<2));
		Ave2kWriteRegister(pDE,TSL2_7,(1l<<27)|(1l<<11)|(1l<<10)|(3l<<2));
		Ave2kWriteRegister(pDE,TSL2_8,(1l<<27)|(1l<<11)|(0l<<10)|(3l<<2)|(1l<<8)|EOS);
  }
//#endif

//#if (USING_AUDIO_CHANNEL==1)
  Ave2kWriteRegister(pDE,0x94,pDE->DataCommonBuffer2.DMAAddress/* LogicalAddress.u.LowPart*//*DisplayParameter.PhysicalAddress*/);
  Ave2kWriteRegister(pDE,0x98,
	  pDE->DataCommonBuffer2.DMAAddress + pDE->DataCommonBuffer2.Length);
  //Set up interrupt limit : 2^10 = 1024
  Ave2kWriteRegister(pDE, PAGE_A1_IN, (0x5<<4)/*|0x8*/ );           //	bit 7-4, bit3: enable protection violation handling
//#else
  Ave2kWriteRegister(pDE,0xac,pDE->DataCommonBuffer1.DMAAddress/* LogicalAddress.u.LowPart*//*DisplayParameter.PhysicalAddress*/);
  Ave2kWriteRegister(pDE,0xb0,
	  pDE->DataCommonBuffer1.DMAAddress + pDE->DataCommonBuffer1.Length);
  //Set up interrupt limit : 2^10 = 1024
  Ave2kWriteRegister(pDE, PAGE_A2_IN, (0x5<<4)/*|0x8*/ );           //	bit 7-4, bit3: enable protection violation handling
//#endif
	pDE->bDataTSLRunnning=TRUE;
	pDE->nMaxAudio=0;
}
void DisableDataTSL(PDEVICE_EXTENSION pDE)
{
	int nAudioCfg1;
	if(pDE->Double)
		return;
	nAudioCfg1=Ave2kReadRegister(pDE, AUDIO_CFG1);
	nAudioCfg1 &= 0x1fffffff;
	nAudioCfg1 |= 1<<29;//let only TSL1 run
	Ave2kWriteRegister(pDE, AUDIO_CFG1, nAudioCfg1);
	Ave2kReadRegister(pDE, LEVEL_REP);//read it to clear it
	pDE->bDataTSLRunnning=FALSE;
}
void SetAudioMaxLevel(PDEVICE_EXTENSION pDE, int nThreshold)
{
	int nAudioCfg1=Ave2kReadRegister(pDE, AUDIO_CFG1);
	pDE->lMaxLevel=((nThreshold*255)/200)&0x7f;
	nAudioCfg1 &= 0xe03fffff;
	nAudioCfg1 |= pDE->lMaxLevel<<22;
	Ave2kWriteRegister(pDE, AUDIO_CFG1, nAudioCfg1);
}
void ShiftAudio(PDEVICE_EXTENSION pDE, int nChannel)
{
	unsigned long lAudioMode;
	unsigned long lMaxLevel=127;
	unsigned long lWS0,lWS1,lWS2,lWS3,lWS4;
	unsigned long lAudioConfig1,lAudioConfig2;
	KIRQL OldIrql;
	
	int rpsIndex;
	ULONG t;
	//t=Ave2kReadRegister(pDE, 0x144);
	Ave2kWriteRegister(pDE, MC1, EAP_YES); //Enable audio port pins
	//  Reg[MC1]=EAP_YES;
	if(A1MASTER){
		lWS0=(WS_CTRL_OTSL1<<2)|WS_SYNC_I2S;
	}
	else{//changed PCB and future PCB
		lWS0=(WS_CTRL_INPUT<<2)|WS_SYNC_I2S;
	}
	if(pDE->BoardVersion==REVD1){
		lWS4=(WS_CTRL_OTSL2<<2)|WS_SYNC_I2S;
	}
	else{
		lWS4=(WS_CTRL_INPUT<<2)|WS_SYNC_I2S;
	}
	lWS1=lWS2=lWS3=(WS_CTRL_3STATE<<2)|WS_SYNC_I2S;
	if(nChannel==0)
		lAudioMode=2;
	else
		lAudioMode=1;
	lAudioConfig1=(lMaxLevel<<22)|A1_SWAP_YES|A2_SWAP_YES| \
	   (lWS0<<16)|(lWS1<<12)|(lWS2<<8)|(lWS3<<4)|(lWS4);
	Ave2kWriteRegister(pDE, AUDIO_CFG1, lAudioConfig1);
	lAudioConfig1|=(lAudioMode<<29);
	if(nChannel==0){
		if(! pDE->Double){
			Ave2kWriteRegister(pDE,TSL2_1,(0l<<27)|(2l<<11)|(0l<<10)|(3l<<2));
			Ave2kWriteRegister(pDE,TSL2_2,(0l<<27)|(2l<<11)|(1l<<10)|(3l<<2));
			Ave2kWriteRegister(pDE,TSL2_3,(0l<<27)|(2l<<11)|(0l<<10)|(3l<<2));
			Ave2kWriteRegister(pDE,TSL2_4,(0l<<27)|(2l<<11)|(0l<<10)|(3l<<2));
			Ave2kWriteRegister(pDE,TSL2_5,(1l<<27)|(2l<<11)|(0l<<10)|(3l<<2));
			Ave2kWriteRegister(pDE,TSL2_6,(1l<<27)|(2l<<11)|(0l<<10)|(3l<<2));
			Ave2kWriteRegister(pDE,TSL2_7,(1l<<27)|(2l<<11)|(0l<<10)|(3l<<2));
			Ave2kWriteRegister(pDE,TSL2_8,(1l<<27)|(2l<<11)|(0l<<10)|(3l<<2)|(1l<<8)|EOS);
		}
		else{
			Ave2kWriteRegister(pDE,TSL2_1,(0l<<27)|(1l<<11)|(0l<<10)|(3l<<2));
			Ave2kWriteRegister(pDE,TSL2_2,(0l<<27)|(1l<<11)|(1l<<10)|(3l<<2));
			Ave2kWriteRegister(pDE,TSL2_3,(0l<<27)|(1l<<11)|(0l<<10)|(3l<<2));
			Ave2kWriteRegister(pDE,TSL2_4,(0l<<27)|(1l<<11)|(0l<<10)|(3l<<2));
			Ave2kWriteRegister(pDE,TSL2_5,(1l<<27)|(1l<<11)|(0l<<10)|(3l<<2));
			Ave2kWriteRegister(pDE,TSL2_6,(1l<<27)|(1l<<11)|(0l<<10)|(3l<<2));
			Ave2kWriteRegister(pDE,TSL2_7,(1l<<27)|(1l<<11)|(0l<<10)|(3l<<2));
			Ave2kWriteRegister(pDE,TSL2_8,(1l<<27)|(1l<<11)|(0l<<10)|(3l<<2)|(1l<<8)|EOS);
		}
	}
	else{
		Ave2kWriteRegister(pDE,TSL1_1,(0l<<31)|(2l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_2,(0l<<31)|(2l<<24)|(1l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_3,(0l<<31)|(2l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_4,(0l<<31)|(2l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_5,(1l<<31)|(2l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_6,(1l<<31)|(2l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_7,(1l<<31)|(2l<<24)|(0l<<23)|(3l<<15));
		Ave2kWriteRegister(pDE,TSL1_8,(1l<<31)|(2l<<24)|(0l<<23)|(1l<<21)|(3l<<15)|EOS);
	}
	Ave2kWriteRegister(pDE, AUDIO_CFG1, lAudioConfig1);
	ave2kMicroDelay(pDE, 20);
	Ave2kWriteRegister(pDE, AUDIO_CFG1, lAudioConfig1&0x1fffffff);
#if 0	
	KeAcquireSpinLock(&pDE->RPSLock, &OldIrql);
	pDE->RPS[0].PhysicalAddress=MmGetPhysicalAddress(&pDE->RPS[0].RPSBuffer[0]).u.LowPart;
	Ave2kWriteRegister(pDE, RPS_ADDR0, pDE->RPS[0].PhysicalAddress);
	Ave2kWriteRegister(pDE, RPS_TOV0, (1<<30)|700);
	//Fill the RPS sequence
	rpsIndex=0;
	pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_WR_REG|(1<<8)|(AUDIO_CFG1/4);
	pDE->RPS[0].RPSBuffer[rpsIndex++]=lAudioConfig1; 
	pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_PAUSE;
	pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_WR_REG|(1<<8)|(AUDIO_CFG1/4);
	pDE->RPS[0].RPSBuffer[rpsIndex++]=lAudioConfig1&0X1FFFFFFF;
	pDE->RPS[0].RPSBuffer[rpsIndex++]=CMD_STOP;
	Ave2kWriteRegister(pDE, MC1, 0x10001000); //Enable EPS0
	WaitRPS(pDE);
	KeReleaseSpinLock(&pDE->RPSLock, OldIrql);
	t=Ave2kReadRegister(pDE, 0x144);
#endif
	ConfigAudio(pDE);
}
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