brd_init.s03

embed in keil

;===================================================================================|
;                                                                                   |
;                            Board Initialisation File                              |
;                                                                                   |
;  Filename   :  Brd_Init.s03                                                       |
;                                                                                   |
;  Description:  This file contains start-up and initialization code specific to    |
;                the project board. This code must be executed prior to branching   |
;                to "main()" functions, in the operational modules written in 'C'.  |
;                                                                                   |
;                This file includes basic system diagnostics used to determine the  |
;                hardware configuration, as well as the resources in place.         |
;                                                                                   |
;  Author     :  Antonio Fuentes  ([e-mail])                     |
;                                                                                   |
;  Date       :  August, 2001                                                       |
;===================================================================================|
;===================================================================================|
;  Name     : INIT_BOARD                                                            |
;                                                                                   |
;  Purpose  : Specific initializations to set up the board to a working level.      |
;                                                                                   |
;             This module is called by CSTARTUP, in library CL8051L.R03             |
;===================================================================================|
         MODULE   INIT_BOARD   ;Name of this module
         RSEG     CODE         ;Relocatable segment 

;<---[ "include" files: ]----------------------------------------------------------->

$sfr8052.inc                   ;Generic defines for the chip 8032 family derivatives
$brd_defs.inc                  ;Specific defines for system board

;<---[ Symbols available to other modules: ]---------------------------------------->

         PUBLIC  Init_Board    ;Start-up code

;<---[ References external to this module: ]---------------------------------------->


;<---[ Initialisation costants: ]--------------------------------------------------->

; Note: processor speed, in this application, is 24 MHz

t0rld    define    (65536 - (24000000 * T0_RLD / (12 * 1000)))  
t1rld    define    (65536 - (24000000 * T1_RLD / (12 * 1000)))  
t2rld    define    (65536 - (24000000 / (BAUD_RATE * 32)))

;<---------------------------------------------------------------------------------->
; Beginning of program. Set up processor control parameters 
    
Init_Board:

         mov    IE,       #00h            ;Disable all interrupts
         mov    P1,       #00010111b      ;Clear P1, excepto I2C , ADC_RC and WDI
         mov    PCON,     #00h            ;Clear "Power Control Register"
         mov    SCON,     #01010000b      ;UART: 8 bits, Variable Data Rate (Mode 1)
         mov    TCON,     #00h            ;Clear Timer Control Word
         mov    TMOD,     #01010001b      ;TIMER#0 y COUNTER#1: 16-bit timer/counter;
         mov    T2CON,    #00110000b      ;Use TIMER#2 as a baud rate generator
         mov    RCAP2H,   #HIGH t2rld     ;Load reload value high in RLDCAP Reg. T2
         mov    RCAP2L,   #LOW  t2rld     ;Load reload value low in RLDCAP Reg. T2
         mov    TH2,      RCAP2H          ;Load #2 (high and low), so that the first
         mov    TL2,      RCAP2L          ;..transmission has correct speed
         setb   TR2                       ;Start Timer #2 as a baud rate generator
         setb   ES                        ;Enable Serial interrupt
         setb   PS                        ;Set up serial port interrupt to high priority

; UART active: 9600 bauds, 8-bit characters, 1 stop bit, no parity

; Initialise internal memory: registers, bits, etc, up to the stack:

         mov    R0, #00h                  ;Use R0 as internal pointer
         clr    a                         ;Clear Accumulator
ir_00:   cjne   R0, #60h, ir_01           ;Internal stack starts at 60h
         sjmp   ir_02                     ;Done: continue
ir_01:   mov    @R0, a                    ;Clear current location
         inc    R0                        ;Increment pointer
         sjmp   ir_00                     ;Loop over the cycle         
ir_02:   mov    TH0_BUFF, #HIGH t0rld     ;Store timer #0 reload value (high)
         mov    TH0,      TH0_BUFF        ;Load timer #0 reload value
         mov    TL0_BUFF, #LOW t0rld      ;Store timer #0 reload value (low)
         mov    TL0,      TL0_BUFF        ;Load timer 30 reload value
         mov    TH1,      #00h            ;Clear Timer #1 high
         mov    TL1,      #00h            ;Clear Timer #1 low
      
         setb   EX0                       ;Enable external interrupt INT0
         setb   EX1                       ;Enable external interrupt INT1
         setb   IT0                       ;Define INT0 as "edge-triggered"
         setb   IT1                       ;Define INT1 as "edge-triggered"
         setb   ET0                       ;Enable TIMER #0 interrupt
         setb   ET1                       ;Enable TIMER #1 interrupt
         setb   TR1                       ;Start Timer #1
       ; setb   TR0                       ;Start Timer #0
         setb   EA                        ;Enable all interrupts, so that in this phase,
                                          ;.. Timer#0 may refresh the "Watchdog"

; The serial port is handled by means of pointers stored in the registers of bank #3.
; The pointer to the receive buffer is stored in the pair R0-R1. The pointer to the 
; next byte to be transmitted is stored in pair R2-R3, and the pointer ro the top of
; the block to be transmitted is stored in R4-R5 (exclusive).        
         
         mov    Bk3_r0, #HIGH RCV_BUFF    ;Use the pair R0-R1 (bank #3), as a pointer
         mov    Bk3_r1, #LOW  RCV_BUFF    ;..to the receive buffer

; Clear internal stack from stack pointer to the top of the stack
        
         mov    R0, SP                    ;Copy "Stack Pointer"
ib_02:   inc    R0                        ;Point to next location
         cjne   R0, #0FFh, ib_00          ;If not at the top, carry on
         sjmp   ib_01                     ;Done: continue procedure
ib_00:   mov    @R0, a                    ;Clear stack location
         sjmp   ib_02                     ;Loop over the cycle
ib_01:   mov    @R0, a                    ;Clear last location

; Next we'll verify board hardware resources:

         ret                              ;End of initialisations   

         END