📄 tt.alu.bare.s
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# SPIM S20 MIPS simulator.# A torture test for the ALU instructions in the bare SPIM simulator.# Copyright (C) 1990-2000 James Larus, larus@cs.wisc.edu.# ALL RIGHTS RESERVED.## SPIM is distributed under the following conditions:## You may make copies of SPIM for your own use and modify those copies.## All copies of SPIM must retain my name and copyright notice.## You may not sell SPIM or distributed SPIM in conjunction with a commerical# product or service without the expressed written consent of James Larus.## THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR# IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR# PURPOSE.## $Header: /u/faculty/larus/Software/larus/SPIM/Tests/RCS/tt.alu.bare.s,v 1.5 1994/01/19 21:30:43 larus Exp $# Adapted by Anne Rogers <amr@blueline.Princeton.EDU> from tt.le.s.# Run -bare -notrap.# IMPORTANT!!!# This file only works on little-endian machines.## Test ALU instructions.# WARNING: This code is not relocatable. DO NOT add instructions without# changing test code for JAL, JALR, BGEZAL, BLTZAL. Add new "data" statements# only at after "Passed all tests\n". .datasaved_ret_pc: .word 0 # Holds PC to return from mainsm: .asciiz "Failed " .text# Standard startup code. Invoke the routine main with no arguments. .globl __start__start: jal main addu $0 $0 $0 # Nop addiu $2 $0 10 syscall # syscall 10 (exit) addu $0 $0 $0 # Nop addu $0 $0 $0 # Nop addu $0 $0 $0 # Nop addu $0 $0 $0 # Nop .globl mainmain: lui $4 0x1000 sw $31 0($4)## Try modifying R0# addi $0 $0 1## Now, test each instruction# .dataadd_: .asciiz "Testing ADD\n" .text addi $2 $0 4 # syscall 4 (print_str)# la $a0 add_ lui $a0, 0x1000 ori $a0 $a0 0xd syscall addi $2 $0 1 addi $3 $0 -1 add $4 $0 $0 bne $4 $0 fail addu $0 $0 $0 # Nop add $4 $0 $2 bne $4 $2 fail addu $0 $0 $0 # Nop add $4 $4 $3 bne $4 $0 fail addu $0 $0 $0 # Nop .dataaddi_: .asciiz "Testing ADDI\n" .text addi $2 $0 4 # syscall 4 (print_str)# la $a0 addi_ lui $a0, 0x1000 ori $a0 $a0 0x1a syscall addi $2 $0 1 addi $4 $0 0 bne $4 $0 fail addu $0 $0 $0 # Nop addi $4 $0 1 bne $4 $2 fail addu $0 $0 $0 # Nop addi $4 $4 -1 bne $4 $0 fail .dataaddiu_: .asciiz "Testing ADDIU\n" .text addi $2 $0 4 # syscall 4 (print_str)# la $a0 addiu_ lui $a0, 0x1000 ori $a0 $a0 0x28 syscall addi $2 $0 1 addiu $4 $0 0 bne $4 $0 fail addu $0 $0 $0 # Nop addiu $4 $0 1 bne $4 $2 fail addu $0 $0 $0 # Nop addiu $4 $4 -1 bne $4 $0 fail addu $0 $0 $0 # Nop lui $2 0x3fff ori $2 $2 0xffff addiu $2 $2 101 .dataaddu_: .asciiz "Testing ADDU\n" .text addi $2 $0 4 # syscall 4 (print_str)# la $a0 addu_ lui $a0, 0x1000 ori $a0 $a0 0x37 syscall addi $2 $0 1 addi $3 $0 -1 addu $4 $0 $0 bne $4 $0 fail addu $0 $0 $0 # Nop addu $4 $0 $2 bne $4 $2 fail addu $0 $0 $0 # Nop addu $4 $4 $3 bne $4 $0 fail addu $0 $0 $0 # Nop lui $2 0x3fff ori $2 $2 0xffff addu $2 $2 $2 .dataand_: .asciiz "Testing AND\n" .text addi $2 $0 4 # syscall 4 (print_str)# la $a0 and_ lui $a0, 0x1000 ori $a0 $a0 0x37 syscall addi $2 $0 1 addi $3 $0 -1 and $4 $0 $0 bne $4 $0 fail addu $0 $0 $0 # Nop and $4 $2 $2 beq $4 $0 fail addu $0 $0 $0 # Nop and $4 $2 $3 bne $4 $2 fail .dataandi_: .asciiz "Testing ANDI\n" .text addi $2 $0 4 # syscall 4 (print_str)# la $a0 andi_ lui $a0, 0x1000 ori $a0 $a0 0x52 syscall addi $2 $0 1 addi $3 $0 -1 addi $5 $0 -1 andi $4 $0 0 bne $4 $0 fail addu $0 $0 $0 # Nop and $4 $2 1 beq $4 $0 fail addu $0 $0 $0 # Nop and $4 $2 $5 bne $4 $2 fail addu $0 $0 $0 # Nop and $4 $3 $5 bne $4 $3 fail addu $0 $0 $0 # Nop .databeq_: .asciiz "Testing BEQ\n" .text add $v0 $0 4 # syscall 4 (print_str)# la $a0 beq_ lui $a0, 0x1000 ori $a0 $a0 0x60 syscall add $2 $0 -1 add $3 $0 1 beq $0 $0 l1# j fail addu $0 $0 $0 # Nop l1: beq $2 $2 l2# j fail addu $0 $0 $0 # Nop l2: beq $3 $2 fail addu $0 $0 $0 # Nop addi $2 $0 3l2_1: sub $2 $2 $3 bne $2 $0 l2_1 addu $0 $0 $0 # Nop .databgez_: .asciiz "Testing BGEZ\n" .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 bgez_ lui $a0, 0x1000 ori $a0 $a0 0x6d syscall addi $2 $0 -1 addi $3 $0 1 bgez $0 l3 addu $0 $0 $0 # Nop j faill3: bgez $3 l4 addu $0 $0 $0 # Nop j faill4: bgez $2 fail addu $0 $0 $0 # Nop .databgtz_: .asciiz "Testing BGTZ\n" .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 bgtz_ lui $a0, 0x1000 ori $a0 $a0 0x7b syscall addi $2 $0 -1 addi $3 $0 1 bgtz $0 fail addu $0 $0 $0 # Nopl7: bgtz $3 l8 addu $0 $0 $0 # Nop j faill8: bgtz $2 fail addu $0 $0 $0 # Nop .datablez_: .asciiz "Testing BLEZ\n" .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 blez_ lui $a0, 0x1000 ori $a0 $a0 0x89 syscall addi $2 $0 -1 addi $3 $0 1 blez $0 l9 addu $0 $0 $0 # Nop j faill9: blez $2 l10 addu $0 $0 $0 # Nop j faill10: blez $3 fail addu $0 $0 $0 # Nop .databltz_: .asciiz "Testing BLTZ\n" .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 bltz_ lui $a0, 0x1000 ori $a0 $a0 0x97 syscall addi $2 $0 -1 addi $3 $0 1 bltz $0 fail addu $0 $0 $0 # Nopl11: bltz $2 l12 addu $0 $0 $0 # Nop j faill12: bltz $3 fail addu $0 $0 $0 # Nop .databne_: .asciiz "Testing BNE\n" .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 bne_ lui $a0, 0x1000 ori $a0 $a0 0xa5 syscall addi $2 $0 -1 addi $3 $0 1 bne $0 $0 fail addu $0 $0 $0 # Nop bne $2 $2 fail addu $0 $0 $0 # Nop bne $3 $2 l16 addu $0 $0 $0 # Nopl16: addu $0 $0 $0 # Nop .dataj_: .asciiz "Testing J\n" .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 j_ lui $a0, 0x1000 ori $a0 $a0 0xb2 syscall j l17 j faill17: addu $0 $0 $0 # Nop .datalb_: .asciiz "Testing LB\n"# lb2_: .asciiz "Expect a address error exceptions:\n "lbd_: .byte 1, -1, 0, 128lbd1_: .word 0x76543210, 0xfedcba98 .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 lb_ lui $a0, 0x1000 ori $a0 $a0 0xbd syscall# la $2 lbd_ lui $2, 0x1000 ori $2 $2 0xc9 lb $3 0($2) addu $4 $0 1 bne $3 $4 fail lb $3 1($2) addi $4 $0 -1 bne $3 $4 fail lb $3 2($2) addu $0 $0 $0 # Nop bne $3 $0 fail lb $3 3($2) lui $4 0xffff ori $4 0xff80 bne $3 $4 fail# la $t0 lbd1_ lui $t0, 0x1000 ori $t0 $t0 0xd0 lb $t1 0($t0) addi $4 $0 0x10 bne $t1 $4 fail lb $t1 1($t0) addi $4 $0 0x32 bne $t1 $4 fail lb $t1 2($t0) addi $4 $0 0x54 bne $t1 $4 fail lb $t1 3($t0) addi $4 $0 0x76 bne $t1 $4 fail lb $t1 4($t0) lui $4 0xffff addi $4 $0 0xff98 bne $t1 $4 fail lb $t1 5($t0) lui $4 0xffff addi $4 $0 0xffba bne $t1 $4 fail lb $t1 6($t0) lui $4 0xffff addi $4 $0 0xffdc bne $t1 $4 fail lb $t1 7($t0) lui $4 0xffff addi $4 $0 0xfffe bne $t1 $4 fail# li $v0 4 # syscall 4 (print_str)# la $a0 lb2_# syscall## lb $3 1000000($sp) .datalbu_: .asciiz "Testing LBU\n" .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 lbu_ lui $a0, 0x1000 ori $a0 $a0 0xd8 syscall# la $2 lbd_ lui $2, 0x1000 ori $2 $2 0xc9 lbu $3 0($2) addi $4 $0 1 bne $3 $4 fail lbu $3 1($2) addi $4 $0 0xff bne $3 $4 fail lbu $3 2($2) addu $0 $0 $0 # Nop bne $3 $0 fail lbu $3 3($2) addu $4 $0 128 bne $3 $4 fail # la $t0 lbd1_ lui $t0, 0x1000 ori $t0 $t0 0xd0 lbu $t1 0($t0) addi $4 $0 0x10 bne $t1 $4 fail lbu $t1 1($t0) addi $4 $0 0x32 bne $t1 $4 fail lbu $t1 2($t0) addi $4 $0 0x54 bne $t1 $4 fail lbu $t1 3($t0) addi $4 $0 0x76 bne $t1 $4 fail lbu $t1 4($t0) addi $4 $0 0x98 bne $t1 $4 fail lbu $t1 5($t0) addi $4 $0 0xba bne $t1 $4 fail lbu $t1 6($t0) addi $4 $0 0xdc bne $t1 $4 fail lbu $t1 7($t0) addi $4 $0 0xfe bne $t1 $4 fail addu $0 $0 $0 # Nop# Causes an exception -- do later.# addi $v0 $0 4 # syscall 4 (print_str)# la $a0 lb2_# syscall## lbu $3 1000000($sp) .datalh_: .asciiz "Testing LH\n"#lh2_: .asciiz "Expect two address error exceptions:\n "lhd_: .half 1, -1, 0, 0x8000 .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 lh_ lui $a0, 0x1000 ori $a0 $a0 0xe5 syscall# la $2 lhd_ lui $2, 0x1000 ori $2 $2 0xf2 lh $3 0($2) addi $4 $0 1 bne $3 $4 fail lh $3 2($2) addi $4 $0 -1 bne $3 $4 fail lh $3 4($2) addi $4 $0 0 bne $3 $4 fail lh $3 6($2) lui $4 0xffff ori $4 $4 0x8000 bne $3 $4 fail addu $0 $0 $0 # Nop# addi $v0 $0 4 # syscall 4 (print_str)# la $a0 lh2_# syscall## lh $3 1000000($sp)# lh $3 1000001($sp) .datalhu_: .asciiz "Testing LHU\n" .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 lhu_ lui $a0, 0x1000 ori $a0 $a0 0xfa syscall# la $2 lhd_ lui $2, 0x1000 ori $2 $2 0xf2 lhu $3 0($2) addi $4 $0 1 bne $3 $4 fail lhu $3 2($2) ori $4 $0 0xffff bne $3 $4 fail lhu $3 4($2) addi $4 $0 0 bne $3 $4 fail lhu $3 6($2) ori $4 $0 0x8000 bne $3 $4 fail addu $0 $0 $0 #Nop# addi $v0 $0 4 # syscall 4 (print_str)# la $a0 lh2_# syscall## lhu $3 1000000($sp)# lhu $3 1000001($sp) .datalui_: .asciiz "Testing LUI\n" .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 lui_ lui $a0, 0x1000 ori $a0 $a0 0x107 syscall lui $2 0 bne $2 $0 fail lui $2 1 srl $2 $2 16 addiu $2 $2 -1 # Don't do compare directly since it uses LUI bne $2 $0 fail lui $2 1 andi $2 $2 0xffff bne $2 $0 fail lui $2 -1 srl $2 $2 16 addiu $2 $2 1 andi $2 $2 0xffff bne $2 $0 fail addu $0 $0 $0 #Nop .datalw_: .asciiz "Testing LW\n"lwd_: .word 1, -1, 0, 0x8000000 .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 lw_ lui $a0, 0x1000 ori $a0 $a0 0x114 syscall# la $2 lwd_ lui $2, 0x1000 ori $2 $2 0x120 lw $3 0($2) addi $4 $0 1 bne $3 $4 fail lw $3 4($2) addi $4 $0 -1 bne $3 $4 fail lw $3 8($2) addi $4 $0 0 bne $3 $4 fail lw $3 12($2) lui $4 0x800 ori $4 $4 0x0000 bne $3 $4 fail add $2 $2 12 lw $3 -12($2) addi $4 $0 1 bne $3 $4 fail lw $3 -8($2) addi $4 $0 -1 bne $3 $4 fail lw $3 -4($2) addi $4 $0 0 bne $3 $4 fail lw $3 0($2) lui $4 0x800 ori $4 $4 0x0000 bne $3 $4 fail addu $0 $0 $0 #Nop# addi $v0 $0 4 # syscall 4 (print_str)# la $a0 lh2_# syscall## lw $3 1000000($sp)# lw $3 1000001($sp) .datalwl_: .asciiz "Testing LWL\n" .align 2lwld_: .byte 0 1 2 3 4 5 6 7 .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 lwl_ lui $a0, 0x1000 ori $a0 $a0 0x130 syscall# la $2 lwld_ lui $2, 0x1000 ori $2 $2 0x140 addu $3 $0 $0 # Move $3 $0 lwl $3 0($2) addi $4 $0 0 bne $3 $4 fail addu $3 $0 $0 # Move $3 $0 lwl $3 1($2) lui $4 0x0100 ori $4 $4 0x0000 bne $3 $4 fail addi $3 $0 5 lwl $3 1($2) lui $4 0x0100 ori $4 $4 0x0005 bne $3 $4 fail addu $3 $0 $0 # Move $3 $0 lwl $3 2($2) lui $4 0x0201 ori $4 $4 0x0000 bne $3 $4 fail addi $3 $0 5 lwl $3 2($2) lui $4 0x0201 ori $4 $4 0x0005 bne $3 $4 fail addu $3 $0 $0 # Move $3 $0 lwl $3 3($2) lui $4 0x0302 ori $4 $4 0x0100 bne $3 $4 fail addi $3 $0 5 lwl $3 3($2) lui $4 0x0302 ori $4 $4 0x0100 bne $3 $4 fail addu $0 $0 $0 # Nop# addi $v0 $0 4 # syscall 4 (print_str)# la $a0 lh2_# syscall## lwl $3 1000000($sp)# lwl $3 1000001($sp) .datalwr_: .asciiz "Testing LWR\n" .align 2lwrd_: .byte 0 1 2 3 4 5 6 7 .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 lwr_ lui $a0, 0x1000 ori $a0 $a0 0x148 syscall# la $2 lwrd_ lui $2, 0x1000 ori $2 $2 0x158 lui $3 0x0000 ori $3 $3 0x0500 lwr $3 0($2) lui $4 0x0302 ori $4 $4 0x0100 bne $3 $4 fail addu $3 $0 $0 # Move $3 $0 lwr $3 1($2) lui $4 0x0003 ori $4 $4 0x0201 bne $3 $4 fail lui $3 0x5000 ori $3 $3 0x0000 lwr $3 1($2) lui $4 0x5003 ori $4 $4 0x0201 bne $3 $4 fail addu $3 $0 $0 # Move $3 $0 lwr $3 2($2) ori $4 $0 0x0302 bne $3 $4 fail lui $3 0x5000 ori $3 $3 0x0000 lwr $3 2($2) lui $4 0x5000 ori $4 $4 0x0302 bne $3 $4 fail addu $0 $0 $0 # Nop# addi $v0 $0 4 # syscall 4 (print_str)# la $a0 lh2_# syscall## lwr $3 1000000($sp)# lwr $3 1000001($sp) .datanor_: .asciiz "Testing NOR\n" .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 nor_ lui $a0, 0x1000 ori $a0 $a0 0x160 syscall addi $2 $0 1 addi $3 $0 -1 nor $4 $0 $0 addi $5 $0 -1 bne $4 $5 fail nor $4 $2 $2 lui $5 0xffff ori $5 $5 0xfffe bne $4 $5 fail nor $4 $2 $3 bne $4 $0 fail addu $0 $0 $0 #Nop .dataor_: .asciiz "Testing OR\n" .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 or_ lui $a0, 0x1000 ori $a0 $a0 0x16d syscall addi $2 $0 1 addi $3 $0 -1 or $4 $0 $0 bne $4 $0 fail or $4 $2 $2 addi $5 $0 1 bne $4 $5 fail or $4 $2 $3 addi $5 $0 -1 bne $4 $5 fail addu $0 $0 $0 #Nop .dataori_: .asciiz "Testing ORI\n" .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 ori_ lui $a0, 0x1000 ori $a0 $a0 0x179 syscall addi $2 $0 1 addi $3 $0 -1 ori $4 $0 0 bne $4 $0 fail ori $4 $2 1 addi $5 $0 1 bne $4 $5 fail ori $4 $3 -1 lui $5 0xffff ori $5 $5 0xffff bne $4 $5 fail addu $0 $0 $0 #Nop .datasb_: .asciiz "Testing SB\n"#sb2_: .asciiz "Expect a address error exceptions:\n " .align 2sbd_: .byte 0, 0, 0, 0 .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 sb_ lui $a0, 0x1000 ori $a0 $a0 0x186 syscall addi $3 $0, 1# la $2 sbd_ lui $2, 0x1000 ori $2 $2 0x194 sb $3 0($2) lw $4 0($2) ori $5 $0 0x1 bne $4 $5 fail addi $3 $0 2 sb $3 1($2) lw $4 0($2) ori $5 $0 0x201 bne $4 $5 fail addi $3 $0 3 sb $3 2($2) lw $4 0($2) lui $5 0x3 ori $5 $5 0x0201 bne $4 $5 fail addi $3 $0 4 sb $3 3($2) lw $4 0($2) lui $5 0x0403 ori $5 $5 0x0201 bne $4 $5 fail addu $0 $0 $0 #Nop# addi $v0 $0 4 # syscall 4 (print_str)# la $a0 sb2_# syscall## sb $3 1000000($sp)# RFE tested previously .datash_: .asciiz "Testing SH\n"#sh2_: .asciiz "Expect two address error exceptions:\n " .align 2shd_: .byte 0, 0, 0, 0 .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 sh_ lui $a0, 0x1000 ori $a0 $a0 0x198 syscall addi $3 $0, 1# la $2 shd_ lui $2, 0x1000 ori $2 $2 0x1a4 sh $3 0($2) lw $4 0($2) ori $5 $0 0x1 bne $4 $5 fail addi $3 $0 2 sh $3 2($2) lw $4 0($2) lui $5 0x2 ori $5 $5 0x0001 bne $4 $5 fail addu $0 $0 $0 #Nop# addi $v0 $0 4 # syscall 4 (print_str)# la $a0 sh2_# syscall## sh $3 1000000($sp)# sh $3 1000001($sp) .datasll_: .asciiz "Testing SLL\n" .text addi $v0 $0 4 # syscall 4 (print_str)# la $a0 sll_ lui $a0, 0x1000 ori $a0 $a0 0x1a8 syscall addi $2 $0 1 sll $3 $2 0 ori $4 $0 1 bne $3 $4 fail sll $3 $2 1 ori $4 $0 2 bne $3 $4 fail sll $3 $2 16 lui $4 0x1 ori $4 $4 0x0000 bne $3 $4 fail sll $3 $2 32 ori $4 $0 1 bne $3 $4 fail addu $0 $0 $0 # Nop
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