mdk_tut.texi

汇编语言编程源代码

OPCODE = 15, MOD = fspec. @code{rX <- V}.
@item LDi
Put in rIi the contents of cell no. M.
OPCODE = 8 + i, MOD = fspec. @code{rIi <- V}.
@item LDAN
Put in rA the contents of cell no. M, with opposite sign.
OPCODE = 16, MOD = fspec. @code{rA <- -V}.
@item LDXN
Put in rX the contents of cell no. M, with opposite sign.
OPCODE = 23, MOD = fspec. @code{rX <- -V}.
@item LDiN
Put in rIi the contents of cell no. M, with opposite sign.
OPCODE = 16 + i, MOD = fspec. @code{rIi <- -V}.
@end ftable

In all the above load instructions the @samp{MOD} field selects the
bytes of the memory cell with address @samp{M} which are loaded into the
requisite register (indicated by the @samp{OPCODE}).  For instance, the
word @w{@samp{+ 00 13 01 27 11}} represents the instruction

@example
LD3    13,1(3:3)
 ^      ^ ^  ^
 |      | |  |
 |      | |   --- MOD = 27 = 3*8 + 3
 |      |  --- INDEX = 1
 |       --- ADDRESS = 00 13
  --- OPCODE = 11
@end example
Let us suppose that, prior to this instruction execution, the state of
the MIX computer is the following:

@example
[rI1] = - 00 01
[rI3] = + 24 12
[12] = - 01 02 03 04 05
@end example
@noindent
As, in this case, @w{@samp{M = 13 + [rI1] = 12}}, we have

@example
V = [M](3:3) = (- 01 02 03 04 05)(3:3)
  = + 00 00 00 00 03
@end example
@noindent
(note that the specified subfield is left-padded with null bytes to
complete a word). Hence, the MIX state, after the instruction execution,
will be

@example
[rI1] = - 00 01
[rI3] = + 00 03
[12] = - 01 02 03 04 05
@end example

To further illustrate loading operators, the following table shows the
contents of @samp{rX} after different @samp{LDX} instructions:

@table @samp
@item LDX 12(0:0)     [rX] = - 00 00 00 00 00
@item LDX 12(0:1)     [rX] = - 00 00 00 00 01
@item LDX 12(3:5)     [rX] = + 00 00 03 04 05
@item LDX 12(3:4)     [rX] = + 00 00 00 03 04
@item LDX 12(0:5)     [rX] = - 01 02 03 04 05
@end table


@node Storing operators, Arithmetic operators, Loading operators, MIX instruction set
@comment  node-name,  next,  previous,  up
@subsubsection Storing operators
@cindex storing operators

The following instructions are the inverse of the load
operations: they are used to store a subfield of a register
into a memory location. Here, MOD represents the subfield of the memory
cell that is to be overwritten with bytes from a register. These bytes
are taken beginning by the rightmost side of the register.

@ftable @code
@item STA
Store rA. OPCODE = 24, MOD = fspec. @code{V <- rA}.
@item STX
Store rX. OPCODE = 31, MOD = fspec. @code{V <- rX}.
@item STi
Store rIi. OPCODE = 24 + i, MOD = fspec. @code{V <- rIi}.
@item STJ
Store rJ. OPCODE = 32, MOD = fspec. @code{V <- rJ}.
@item STZ
Store zero. OPCODE = 33, MOD = fspec. @code{V <- 0}.
@end ftable

By way of example, consider the instruction @samp{STA 1200(2:3)}. It
causes the MIX to fetch bytes no. 4 and 5 of register A and copy them to
bytes 2 and 3 of memory cell no. 1200 (remember that, for these
instructions, MOD specifies a subfield of @emph{the memory
address}). The other bytes of the memory cell retain their
values. Thus, if prior to the instruction execution we have

@example
[1200] = - 20 21 22 23 24
[rA] = + 01 02 03 04 05
@end example
@noindent
we will end up with

@example
[1200] = - 20 04 05 23 24
[rA] = + 01 02 03 04 05
@end example

As a second example, @samp{ST2 1000(0)} will set the sign of
@samp{[1000]} to that of @samp{[rI2]}.

@node Arithmetic operators, Address transfer operators, Storing operators, MIX instruction set
@comment  node-name,  next,  previous,  up
@subsubsection Arithmetic operators
@cindex arithmetic operators

The following instructions perform arithmetic operations between rA and
rX register and memory contents.

@ftable @code
@item ADD
Add and set OV if overflow. OPCODE = 1, MOD = fspec. 
@w{@code{rA <- rA +V}}.
@item SUB
Sub and set OV if overflow. OPCODE = 2, MOD = fspec.
@w{@code{rA <- rA - V}}.
@item MUL
Multiply V times rA and store the 10-bytes product in rAX.
OPCODE = 3, MOD = fspec. @w{@code{rAX <- rA x V}}.
@item DIV
rAX is considered a 10-bytes number, and it is divided by V.
OPCODE = 4, MOD = fspec. @w{@code{rA <- rAX / V}}, @code{rX} <- reminder.
@end ftable

In all the above instructions, @samp{[rA]} is one of the operands
of the binary arithmetic operation, the other being @samp{V} (that is,
the specified subfield of the memory cell with address @samp{M}), padded
with zero bytes on its left-side to complete a word. In multiplication
and division, the register @samp{X} comes into play as a right-extension
of the register @samp{A}, so that we are able to handle 10-byte numbers
whose more significant bytes are those of @samp{rA} (the sign of this
10-byte number is that of @samp{rA}: @samp{rX}'s sign is ignored).

Addition and substraction of MIX words can give rise to overflows, since
the result is stored in a register with room to only 5 bytes (plus
sign). When this occurs, the operation result modulo @w{1,073,741,823}
(the maximum value storable in a MIX word) is stored in @samp{rA}, and
the overflow toggle is set to TRUE.

@node Address transfer operators, Comparison operators, Arithmetic operators, MIX instruction set
@comment  node-name,  next,  previous,  up
@subsubsection Address transfer operators
@cindex address transfer operators

In these instructions, @samp{M} (the address of the instruction after
indexing) is used as a number instead of as the address of a memory
cell. Consequently, @samp{M} can have any valid word value (i.e., it's
not limited to the 0-3999 range of a memory address).

@ftable @code
@item ENTA
Enter @samp{M} in [rA]. OPCODE = 48, MOD = 2. @code{rA <- M}.
@item ENTX
Enter @samp{M} in [rX]. OPCODE = 55, MOD = 2. @code{rX <- M}.
@item ENTi
Enter @samp{M} in [rIi]. OPCODE = 48 + i, MOD = 2. @code{rIi <- M}.
@item ENNA
Enter @samp{-M} in [rA]. OPCODE = 48, MOD = 3. @code{rA <- -M}.
@item ENNX
Enter @samp{-M} in [rX]. OPCODE = 55, MOD = 3. @code{rX <- -M}.
@item ENNi
Enter @samp{-M} in [rIi]. OPCODE = 48 + i, MOD = 3. @code{rIi <- -M}.
@item INCA
Increase [rA] by @samp{M}. OPCODE = 48, MOD = 0. @code{rA <- rA + M}.
@item INCX
Increase [rX] by @samp{M}. OPCODE = 55, MOD = 0. @code{rX <- rX + M}.
@item INCi
Increase [rIi] by @samp{M}. OPCODE = 48 + i, MOD = 0. @code{rIi <- rIi + M}.
@item DECA
Decrease [rA] by @samp{M}. OPCODE = 48, MOD = 1. @code{rA <- rA - M}.
@item DECX
Decrease [rX] by @samp{M}. OPCODE = 55, MOD = 0. @code{rX <- rX - M}.
@item DECi
Decrease [rIi] by @samp{M}. OPCODE = 48 + i, MaOD = 0. @code{rIi <- rIi - M}.
@end ftable

In the above instructions, the subfield @samp{ADDRESS} acts as an
immediate (indexed) operand, and allow us to set directly the contents
of the MIX registers without an indirection to the memory cells (in a
real CPU this would mean that they are faster that the previously
discussed instructions, whose operands are fetched from memory). So, if
you want to store in @samp{rA} the value -2000 (- 00 00 00 31 16), you
can use the binary instruction @w{+ 31 16 00 03 48}, or, symbolically,

@example
ENNA 2000
@end example
@noindent
Used in conjuction with the store operations (@samp{STA}, @samp{STX},
etc.), these instructions also allow you to set memory cells contents to
concrete values.

Note that in these address transfer operators, the @samp{MOD} field is
not a subfield specificator, but serves to define (together with
@samp{OPCODE}) the concrete operation to be performed.

@node Comparison operators, Jump operators, Address transfer operators, MIX instruction set
@comment  node-name,  next,  previous,  up
@subsubsection Comparison operators
@cindex comparison operators

So far, we have learned how to move values around between the MIX
registers and its memory cells, and also how to perform arithmetic
operations using these values. But, in order to write non-trivial
programs, other functionalities are needed. One of the most common is
the ability to compare two values, which, combined with jumps, will
allow the execution of conditional statements.
The following instructions compare the value of a register with @samp{V}, and
set the @sc{cm} indicator to the result of the comparison (i.e. to
@samp{E}, @samp{G} or @samp{L}, equal, greater or lesser respectively).

@ftable @code
@item CMPA
Compare [rA] with V. OPCODE = 56, MOD = fspec.
@item CMPX
Compare [rX] with V. OPCODE = 63, MOD = fspec.
@item CMPi
Compare [rIi] with V. OPCODE = 56 + i, MOD = fspec.
@end ftable

As explained above, these instructions modify the value of the MIX
comparison indicator; but maybe you are asking yourself how do you use
this value: enter jump operators, in the next subsection.

@node Jump operators, Input-output operators, Comparison operators, MIX instruction set
@comment  node-name,  next,  previous,  up
@subsubsection Jump operators
@cindex jump operators

The MIX computer has an internal register, called the @dfn{location
counter}, which stores the address of the next instruction to be fetched
and executed by the virtual CPU. You cannot directly modify the contents
of this internal register with a load instruction: after fetching the
current instruction from memory, it is automatically increased in one
unit by the MIX. However, there is a set of instructions (which we call
jump instructions) which can alter the contents of the location counter
provided some condition is met. When this occurs, the value of the next
instruction address that would have been fetched in the absence of the
jump is stored in @samp{rJ} (except for @code{JSJ}), and the location
counter is set to the value of @samp{M} (so that the next instruction is
fetched from this new address). Later on, you can return to the point
when the jump occurred reading the address stored in @samp{rJ}.

The MIX computer provides the following jump instructions:
With these instructions you force a jump to the specified address. Use
@samp{JSJ} if you do not care about the return address.

@ftable @code
@item JMP
Unconditional jump. OPCODE = 39, MOD = 0.
@item JSJ
Unconditional jump, but rJ is not modified. OPCODE = 39, MOD = 1.
@end ftable

These instructions check the overflow toggle to decide whether to jump
or not.

@ftable @code
@item JOV
Jump if OV is set (and turn it off). OPCODE = 39, MOD = 2.
@item JNOV
Jump if OV is not set (and turn it off). OPCODE = 39, MOD = 3.
@end ftable

In the following instructions, the jump is conditioned to the contents of the
comparison flag:

@ftable @code
@item JL
Jump if @w{@code{[CM] = L}}. OPCODE = 39, MOD = 4.
@itemx JE
Jump if @w{@code{[CM] = E}}. OPCODE = 39, MOD = 5.
@itemx JG
Jump if @w{@code{[CM] = G}}. OPCODE = 39, MOD = 6.
@itemx JGE
Jump if @code{[CM]} does not equal @code{L}. OPCODE = 39, MOD = 7.
@itemx JNE
Jump if @code{[CM]} does not equal @code{E}. OPCODE = 39, MOD = 8.
@itemx JLE
Jump if @code{[CM]} does not equal @code{G}. OPCODE = 39, MOD = 9.
@end ftable

You can also jump conditioned to the value stored in the MIX registers,
using the following instructions:

@ftable @code
@item JAN
@itemx JAZ
@itemx JAP
@itemx JANN
@itemx JANZ
@itemx JANP
Jump if the content of rA is, respectively, negative, zero, positive,
non-negative, non-zero or non-positive. 
OPCODE = 40, MOD = 0, 1, 2, 3, 4, 5.
@item JXN
@itemx JXZ
@itemx JXP
@itemx JXNN
@itemx JXNZ
@itemx JXNP
Jump if the content of rX is, respectively, negative, zero, positive,
non-negative, non-zero or non-positive. 
OPCODE = 47, MOD = 0, 1, 2, 3, 4, 5.
@item JiN
@itemx JiZ
@itemx JiP
@itemx JiNN
@itemx JiNZ
@itemx JiNP
Jump if the content of rIi is, respectively, negative, zero, positive,
non-negative, non-zero or non-positive. 
OPCODE = 40 + i, MOD = 0, 1, 2, 3, 4, 5.