pplus_pci.c

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/*
 * arch/ppc/platforms/pplus_pci.c
 *
 * PCI setup for MCG PowerPlus
 *
 * Author: Randy Vinson <[e-mail]>
 *
 * Derived from original PowerPlus PReP work by
 * Cort Dougan, Johnnie Peters, Matt Porter, and
 * Troy Benjegerdes.
 *
 * Copyright 2001 MontaVista Software Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 *
 * You should have received a copy of the  GNU General Public License along
 * with this program; if not, write  to the Free Software Foundation, Inc.,
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/config.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/init.h>

#include <asm/sections.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/ptrace.h>
#include <asm/pci-bridge.h>
#include <asm/residual.h>
#include <asm/processor.h>
#include <asm/irq.h>
#include <asm/machdep.h>

#include <asm/open_pic.h>
#include <asm/pplus.h>

unsigned char *Motherboard_map_name;

/* Tables for known hardware */   

/* Motorola Mesquite */
static inline int
mesquite_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
	static char pci_irq_table[][4] =
	/*
	 * 	MPIC interrupts for various IDSEL values (MPIC IRQ0 =
	 * 	Linux IRQ16 (to leave room for ISA IRQs at 0-15).
	 *      PCI IDSEL/INTPIN->INTLINE
	 *         A   B   C   D
	 */
	{
		{ 18,  0,  0,  0 },     /* IDSEL 14 - Enet 0 */
		{  0,  0,  0,  0 },     /* IDSEL 15 - unused */
		{ 19, 19, 19, 19 },     /* IDSEL 16 - PMC Slot 1 */
		{  0,  0,  0,  0 },     /* IDSEL 17 - unused */
		{  0,  0,  0,  0 },     /* IDSEL 18 - unused */
		{  0,  0,  0,  0 },     /* IDSEL 19 - unused */
		{ 24, 25, 26, 27 },     /* IDSEL 20 - P2P bridge (to cPCI 1) */
		{  0,  0,  0,  0 },     /* IDSEL 21 - unused */
		{ 28, 29, 30, 31 }      /* IDSEL 22 - P2P bridge (to cPCI 2) */
	};

	const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4;
	return PCI_IRQ_TABLE_LOOKUP;
}

/* Motorola Sitka */
static inline int
sitka_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
	static char pci_irq_table[][4] =
	/*
	 * 	MPIC interrupts for various IDSEL values (MPIC IRQ0 =
	 * 	Linux IRQ16 (to leave room for ISA IRQs at 0-15).
	 *      PCI IDSEL/INTPIN->INTLINE
	 *         A   B   C   D
	 */
	{
		{ 18,  0,  0,  0 },     /* IDSEL 14 - Enet 0 */
		{  0,  0,  0,  0 },     /* IDSEL 15 - unused */
		{ 25, 26, 27, 28 },     /* IDSEL 16 - PMC Slot 1 */
		{ 28, 25, 26, 27 },     /* IDSEL 17 - PMC Slot 2 */
		{  0,  0,  0,  0 },     /* IDSEL 18 - unused */
		{  0,  0,  0,  0 },     /* IDSEL 19 - unused */
		{ 20,  0,  0,  0 }      /* IDSEL 20 - P2P bridge (to cPCI) */
	};

	const long min_idsel = 14, max_idsel = 20, irqs_per_slot = 4;
	return PCI_IRQ_TABLE_LOOKUP;
}

/* Motorola MTX */
static inline int
MTX_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
	static char pci_irq_table[][4] =
	/*
	 * 	MPIC interrupts for various IDSEL values (MPIC IRQ0 =
	 * 	Linux IRQ16 (to leave room for ISA IRQs at 0-15).
	 *      PCI IDSEL/INTPIN->INTLINE
	 *         A   B   C   D
	 */
	{
		{ 19,  0,  0,  0 },     /* IDSEL 12 - SCSI   */
		{ 0,   0,  0,  0 },     /* IDSEL 13 - unused */
		{ 18,  0,  0,  0 },     /* IDSEL 14 - Enet   */
		{  0,  0,  0,  0 },     /* IDSEL 15 - unused */
		{ 25, 26, 27, 28 },     /* IDSEL 16 - PMC Slot 1 */
		{ 26, 27, 28, 25 },     /* IDSEL 17 - PMC Slot 2 */
		{ 27, 28, 25, 26 }      /* IDSEL 18 - PCI Slot 3 */
	};

	const long min_idsel = 12, max_idsel = 18, irqs_per_slot = 4;
	return PCI_IRQ_TABLE_LOOKUP;
}

/* Motorola MTX Plus */
/* Secondary bus interrupt routing is not supported yet */
static inline int
MTXplus_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
	static char pci_irq_table[][4] =
	/*
	 * 	MPIC interrupts for various IDSEL values (MPIC IRQ0 =
	 * 	Linux IRQ16 (to leave room for ISA IRQs at 0-15).
	 *      PCI IDSEL/INTPIN->INTLINE
	 *         A   B   C   D
	 */
	{
		{ 19,  0,  0,  0 },     /* IDSEL 12 - SCSI   */
		{ 0,   0,  0,  0 },     /* IDSEL 13 - unused */
		{ 18,  0,  0,  0 },     /* IDSEL 14 - Enet 1 */
		{  0,  0,  0,  0 },     /* IDSEL 15 - unused */
		{ 25, 26, 27, 28 },     /* IDSEL 16 - PCI Slot 1P */
		{ 26, 27, 28, 25 },     /* IDSEL 17 - PCI Slot 2P */
		{ 27, 28, 25, 26 },     /* IDSEL 18 - PCI Slot 3P */
		{ 26,  0,  0,  0 },	/* IDSEL 19 - Enet 2 */
		{  0,  0,  0,  0 } 	/* IDSEL 20 - P2P Bridge */
	};

	const long min_idsel = 12, max_idsel = 20, irqs_per_slot = 4;
	return PCI_IRQ_TABLE_LOOKUP;
}

static inline int
Genesis2_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
	/* 2600
	 * Raven 31
	 * ISA   11
	 * SCSI	 12 - IRQ3
	 * Univ  13
	 * eth   14 - IRQ2
	 * VGA   15 - IRQ4
	 * PMC1  16 - IRQ9,10,11,12 = PMC1 A-D
	 * PMC2  17 - IRQ12,9,10,11 = A-D
	 * SCSI2 18 - IRQ11
	 * eth2  19 - IRQ10
	 * PCIX  20 - IRQ9,10,11,12 = PCI A-D
	 */

	/* 2400
	 * Hawk 31
	 * ISA	11
	 * Univ 13
	 * eth  14 - IRQ2
	 * PMC1 16 - IRQ9,10,11,12 = PMC A-D
	 * PMC2 17 - IRQ12,9,10,11 = PMC A-D
	 * PCIX 20 - IRQ9,10,11,12 = PMC A-D
	 */

	/* 2300
	 * Raven 31
	 * ISA   11
	 * Univ  13 
	 * eth   14 - IRQ2
	 * PMC1  16 - 9,10,11,12 = A-D
	 * PMC2  17 - 9,10,11,12 = B,C,D,A
	 */

	static char pci_irq_table[][4] =
	/*
	 * 	MPIC interrupts for various IDSEL values (MPIC IRQ0 =
	 * 	Linux IRQ16 (to leave room for ISA IRQs at 0-15).
	 *      PCI IDSEL/INTPIN->INTLINE
	 *         A   B   C   D
	 */
	{
		{ 19,  0,  0,  0 },     /* IDSEL 12 - SCSI   */
		{ 0,   0,  0,  0 },     /* IDSEL 13 - Universe PCI - VME */
		{ 18,  0,  0,  0 },     /* IDSEL 14 - Enet 1 */
		{  0,  0,  0,  0 },     /* IDSEL 15 - unused */
		{ 25, 26, 27, 28 },     /* IDSEL 16 - PCI/PMC Slot 1P */
		{ 28, 25, 26, 27 },     /* IDSEL 17 - PCI/PMC Slot 2P */
		{ 27, 28, 25, 26 },     /* IDSEL 18 - PCI Slot 3P */
		{ 26,  0,  0,  0 },	/* IDSEL 19 - Enet 2 */
		{ 25, 26, 27, 28 } 	/* IDSEL 20 - P2P Bridge */
	};

	const long min_idsel = 12, max_idsel = 20, irqs_per_slot = 4;
	return PCI_IRQ_TABLE_LOOKUP;
}

#define MOTOROLA_CPUTYPE_REG	0x800
#define MOTOROLA_BASETYPE_REG	0x803
#define MPIC_RAVEN_ID		0x48010000
#define	MPIC_HAWK_ID		0x48030000
#define	MOT_PROC2_BIT		0x800

static u_char pplus_openpic_initsenses[] __initdata = {
    1,	/* MVME2600_INT_SIO */
    0,	/* MVME2600_INT_FALCN_ECC_ERR */
    1,	/* MVME2600_INT_PCI_ETHERNET */
    1,	/* MVME2600_INT_PCI_SCSI */
    1,	/* MVME2600_INT_PCI_GRAPHICS */
    1,	/* MVME2600_INT_PCI_VME0 */
    1,	/* MVME2600_INT_PCI_VME1 */
    1,	/* MVME2600_INT_PCI_VME2 */
    1,	/* MVME2600_INT_PCI_VME3 */
    1,	/* MVME2600_INT_PCI_INTA */
    1,	/* MVME2600_INT_PCI_INTB */
    1,	/* MVME2600_INT_PCI_INTC */
    1,	/* MVME2600_INT_PCI_INTD */
    1,	/* MVME2600_INT_LM_SIG0 */
    1,	/* MVME2600_INT_LM_SIG1 */
};

int mot_entry = -1;
int prep_keybd_present = 1;
int mot_multi = 0;

int __init raven_init(void)
{
	unsigned short	devid;
	unsigned char	base_mod;

	/* set the MPIC base address */
	early_write_config_dword(0, 0, 0, PCI_BASE_ADDRESS_1, 0x3cfc0000);

	pplus_mpic_init(PREP_ISA_MEM_BASE);

	OpenPIC_InitSenses = pplus_openpic_initsenses;
	OpenPIC_NumInitSenses = sizeof(pplus_openpic_initsenses);

	ppc_md.get_irq = openpic_get_irq;

	/* This is a hack.  If this is a 2300 or 2400 mot board then there is
	 * no keyboard controller and we have to indicate that.
	 */

	early_read_config_word(0, 0, 0, PCI_VENDOR_ID, &devid);
	base_mod = inb(MOTOROLA_BASETYPE_REG);
	if ((devid == PCI_DEVICE_ID_MOTOROLA_HAWK) ||
	    (base_mod == 0xF9) ||
	    (base_mod == 0xFA) || (base_mod == 0xE1))
		prep_keybd_present = 0;

	return 1;
}

struct brd_info {
	int		cpu_type;	/* 0x100 mask assumes for Raven and Hawk boards that the level/edge are set */
					/* 0x200 if this board has a Hawk chip. */