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📄 config.help

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  Most products has a so called TEST button on PA1, if that's true  use 02 here.  Use 00 if there are no buttons on PA.  If the bitmask is <> 00 a button driver will be included in the gpio  driver. Etrax general I/O support must be enabled.CONFIG_ETRAX_PA_CHANGEABLE_DIR  This is a bitmask with information of what bits in PA that a user  can change direction on using ioctl's.  Bit set = changeable.  You probably want 00 here.CONFIG_ETRAX_PA_CHANGEABLE_BITS  This is a bitmask with information of what bits in PA that a user  can change change the value on using ioctl's.  Bit set = changeable.  You probably want 00 here.CONFIG_ETRAX_PB_CHANGEABLE_DIR  This is a bitmask with information of what bits in PB that a user  can change direction on using ioctl's.  Bit set = changeable.  You probably want 00 here.CONFIG_ETRAX_PB_CHANGEABLE_BITS  This is a bitmask with information of what bits in PB that a user  can change the value on using ioctl's.  Bit set = changeable.  You probably want 00 here.CONFIG_ETRAX_GPIO  Enables the Etrax general port device (major 120, minors 0 and 1).  You can use this driver to access the general port bits. It supports  these ioctl's:        #include <linux/etraxgpio.h>       fd = open("/dev/gpioa", O_RDWR); // or /dev/gpiob       ioctl(fd, _IO(ETRAXGPIO_IOCTYPE, IO_SETBITS), bits_to_set);       ioctl(fd, _IO(ETRAXGPIO_IOCTYPE, IO_CLRBITS), bits_to_clear);       val = ioctl(fd, _IO(ETRAXGPIO_IOCTYPE, IO_READBITS), NULL);  Remember that you need to setup the port directions appropriately in  the General configuration.CONFIG_ETRAX_SERIAL  Enables the ETRAX 100 serial driver for ser0 (ttyS0)  You probably want this enabled.CONFIG_ETRAX_SERIAL_FAST_TIMER  Select this to have the serial DMAs flushed at a higher rate than  normally, possible by using the fast timer API, the timeout is  approx. 4 character times.  If unsure, say N.CONFIG_ETRAX_SERIAL_FLUSH_DMA_FAST  Select this to have the serial DMAs flushed at a higher rate than  normally possible through a fast timer interrupt (currently at  15360 Hz).  If unsure, say N.CONFIG_ETRAX_SERIAL_RX_TIMEOUT_TICKS  Number of timer ticks between flush of receive fifo (1 tick = 10ms).  Try 0-3 for low latency applications.  Approx 5 for high load  applications (e.g. PPP).  Maybe this should be more adaptive some  day...CONFIG_ETRAX_SER0_DTR_RI_DSR_CD_ON_PB  Enables the status and control signals DTR, RI, DSR and CD on PB for  ser0.CONFIG_ETRAX_SERIAL_PORT1  Enables the ETRAX 100 serial driver for ser1 (ttyS1).CONFIG_ETRAX_SER1_DTR_RI_DSR_CD_ON_PB  Enables the status and control signals DTR, RI, DSR and CD on PB for  ser1.CONFIG_ETRAX_SERIAL_PORT2  Enables the ETRAX 100 serial driver for ser2 (ttyS2).CONFIG_ETRAX_SER2_DTR_RI_DSR_CD_ON_PA  Enables the status and control signals DTR, RI, DSR and CD on PA for  ser2.CONFIG_ETRAX_SERIAL_PORT3  Enables the ETRAX 100 serial driver for ser3 (ttyS3).CONFIG_ETRAX_RS485  Enables support for RS-485 serial communication.  For a primer on  RS-485, see <http://www.hw.cz/english/docs/rs485/rs485.html>.CONFIG_ETRAX_RS485_ON_PA  Control Driver Output Enable on RS485 tranceiver using a pin on PA  port:          Axis 2400/2401 uses PA 3.CONFIG_ETRAX_RS485_ON_PA_BIT  Control Driver Output Enable on RS485 tranceiver using a this bit  on PA port.CONFIG_ETRAX_SER0_DTR_ON_PB_BIT  Specify the pin of the PB port to carry the DTR signal for serial  port 0.CONFIG_ETRAX_SER0_RI_ON_PB_BIT  Specify the pin of the PB port to carry the RI signal for serial  port 0.CONFIG_ETRAX_SER0_DSR_ON_PB_BIT  Specify the pin of the PB port to carry the DSR signal for serial  port 0.CONFIG_ETRAX_SER0_CD_ON_PB_BIT  Specify the pin of the PB port to carry the CD signal for serial  port 0.CONFIG_ETRAX_SER1_DTR_ON_PB_BIT  Specify the pin of the PB port to carry the DTR signal for serial  port 1.CONFIG_ETRAX_SER1_RI_ON_PB_BIT  Specify the pin of the PB port to carry the RI signal for serial  port 1.CONFIG_ETRAX_SER1_DSR_ON_PB_BIT  Specify the pin of the PB port to carry the DSR signal for serial  port 1.CONFIG_ETRAX_SER1_CD_ON_PB_BIT  Specify the pin of the PB port to carry the CD signal for serial  port 1.CONFIG_ETRAX_SER2_DTR_ON_PA_BIT  Specify the pin of the PA port to carry the DTR signal for serial  port 2.CONFIG_ETRAX_SER2_RI_ON_PA_BIT  Specify the pin of the PA port to carry the RI signal for serial  port 2.CONFIG_ETRAX_SER2_DSR_ON_PA_BIT  Specify the pin of the PA port to carry the DTR signal for serial  port 2.CONFIG_ETRAX_SER2_CD_ON_PA_BIT  Specify the pin of the PA port to carry the CD signal for serial  port 2.CONFIG_ETRAX_RS485_DISABLE_RECEIVER  It's necessary to disable the serial receiver to avoid serial  loopback.  Not all products are able to do this in software only.  Axis 2400/2401 must disable receiver.CONFIG_ETRAX_I2C  Enables an I2C driver on PB0 and PB1 on ETRAX100.  EXAMPLE usage:        i2c_arg = I2C_WRITEARG(STA013_WRITE_ADDR, reg, val);       ioctl(fd, _IO(ETRAXI2C_IOCTYPE, I2C_WRITEREG), i2c_arg);       i2c_arg = I2C_READARG(STA013_READ_ADDR, reg);       val = ioctl(fd, _IO(ETRAXI2C_IOCTYPE, I2C_READREG), i2c_arg);CONFIG_ETRAX_I2C_USES_PB_NOT_PB_I2C  Select whether to use the special I2C mode in the PB I/O register or  not.  This option needs to be selected in order to use some drivers  that access the I2C I/O pins directly instead of going through the  I2C driver, like the DS1302 realtime-clock driver.  If you are  uncertain, choose Y here.CONFIG_ETRAX_I2C_EEPROM  Enables I2C EEPROM (non-volatile RAM) on PB0 and PB1 using the I2C  driver.  Select size option: Probed, 2k, 8k, 16k.  (Probing works for 2k and 8k but not that well for 16k)CONFIG_ETRAX_I2C_EEPROM_16KB  Use a 16kB EEPROM.CONFIG_ETRAX_I2C_EEPROM_2KB  Use a 2kB EEPROM.CONFIG_ETRAX_I2C_EEPROM_8KB  Use a 8kB EEPROM.CONFIG_ETRAX_I2C_EEPROM_PROBE  Specifies size or auto probe of the EEPROM size.  Options: Probed, 2k, 8k, 16k.  (Probing works for 2k and 8k but not that well for 16k)CONFIG_ETRAX_DS1302  Enables the driver for the DS1302 Real-Time Clock battery-backed  chip on some products.  The kernel reads the time when booting, and  the date can be set using ioctl(fd, RTC_SET_TIME, &rt) with rt a  rtc_time struct (see <file:include/asm-cris/rtc.h>) on the /dev/rtc  device, major 121.  You can check the time with cat /proc/rtc, but  normal time reading should be done using libc function time and  friends.CONFIG_ETRAX_DS1302_RST_ON_GENERIC_PORT  If your product has the RST signal line for the DS1302 RTC on the  Generic Port then say Y here, otherwise leave it as N in which  case the RST signal line is assumed to be connected to Port PB  (just like the SCL and SDA lines).CONFIG_ETRAX_DS1302_RSTBIT  This is the bit number for the RST signal line of the DS1302 RTC on  the selected port. If you have selected the generic port then it  should be bit 27, otherwise your best bet is bit 5.CONFIG_ETRAX_DS1302_SCLBIT  This is the bit number for the SCL signal line of the DS1302 RTC on  Port PB. This is probably best left at 3.CONFIG_ETRAX_DS1302_SDABIT  This is the bit number for the SDA signal line of the DS1302 RTC on  Port PB. This is probably best left at 2.CONFIG_ETRAX_IDE_CSP0_8_RESET  Configures the pin used to reset the IDE bus.CONFIG_ETRAX_IDE_DELAY  Sets the time to wait for disks to regain consciousness after reset.CONFIG_ETRAX_IDE_G27_RESET  Configures the pin used to reset the IDE bus.CONFIG_ETRAX_IDE_PB7_RESET  Configures the pin used to reset the IDE bus.CONFIG_ETRAX_USB_HOST  This option enables the host functionality of the ETRAX 100LX  built-in USB controller. In host mode the controller is designed  for CTRL and BULK traffic only, INTR traffic may work as well  however (depending on the requirements of timeliness).CONFIG_ETRAX_USB_HOST_PORT1  This option enables port 1 of the ETRAX 100LX USB root hub (RH).CONFIG_ETRAX_USB_HOST_PORT2  This option enables port 2 of the ETRAX 100LX USB root hub (RH).CONFIG_ETRAX_ETHERNET  This option enables the ETRAX 100LX built-in 10/100Mbit Ethernet  controller.CONFIG_ETRAX_SYNCHRONOUS_SERIAL  This option enables support for the ETRAX 100LX built-in  synchronous serial ports. These ports are used for continuous  streamed data like audio. The default setting is compatible  with the STA 013 MP3 decoder, but can easily be tuned to fit  any other audio encoder/decoder and SPI.CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT0  Enables the ETRAX 100LX synchronous serial port 0 (syncser0).CONFIG_ETRAX_SYNCHRONOUS_SERIAL0_DMA  Makes synchronous serial port 0 use DMA.CONFIG_ETRAX_SYNCHRONOUS_SERIAL_PORT1  Enables the ETRAX 100LX synchronous serial port 1 (syncser1).CONFIG_ETRAX_SYNCHRONOUS_SERIAL1_DMA  Makes synchronous serial port 1 use DMA.CONFIG_JULIETTE  The ARTPEC-1 is a video-compression chip used in the AXIS 2100  network camera, which is built around an ETRAX-100 board.  With this  option selected, the ETRAX kernel configures a DMA channel at boot  time to talk to the chip.CONFIG_ETRAX_AXISFLASHMAP  This option enables MTD mapping of flash devices.  Needed to use  flash memories.  If unsure, say Y.CONFIG_ETRAX_PTABLE_SECTOR  Byte-offset of the partition table in the first flash chip.  The default value is 64kB and should not be changed unless  you know exactly what you are doing. The only valid reason  for changing this is when the flash block size is bigger  than 64kB (e.g. when using two parallel 16 bit flashes).CONFIG_ETRAX_PARPORT  Say Y here to enable the ETRAX on-board parallel ports.CONFIG_ETRAX_PARALLEL_PORT0  Say Y here to enable parallel port 0.CONFIG_ETRAX_PARALLEL_PORT1  Say Y here to enable parallel port 1.

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