ch01.1.htm

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<HTML><HEAD>  <META NAME="GENERATOR" CONTENT="Adobe PageMill 2.0 Mac">  <TITLE>1.1 Objectives of this document</TITLE></HEAD><BODY><P><A NAME="anchor619381"></A><HR ALIGN=LEFT><A HREF="ch01.htm">Chapter&nbsp;&nbsp;start</A>&nbsp;&nbsp;<AHREF="ch01.2.htm">Next&nbsp;&nbsp;page</A></P><H2>1.1 Objectives of this document</H2><P><P CLASS="Body"><A NAME="pgfId=120"></A>The intent of this document isto serve as a complete specification of the Verilog Hardware DescriptionLanguage (HDL). This document contains:</P><UL>  <LI><A NAME="pgfId=121"></A>The formal syntax and semantics of all Verilog  HDL constructs.  <LI><A NAME="pgfId=123"></A>Simulation system tasks and functions, such  as text output display commands.  <LI><A NAME="pgfId=124"></A>Compiler directives such as text substitution  macros and simulation time scaling.  <LI><A NAME="pgfId=53"></A>The Programming Language Interface (PLI) binding  mechanism.  <LI><A NAME="pgfId=57"></A>The formal syntax and semantics of Access routines,  Task/Function routines, and Verilog Procedural Interface routines.  <LI><A NAME="pgfId=63"></A>Non-normative usage examples.  <LI><A NAME="pgfId=64"></A>Listings of header files for PLI.</UL><P><A HREF="ch01.htm">Chapter&nbsp;&nbsp;start</A>&nbsp;&nbsp;<A HREF="ch01.2.htm">Next&nbsp;&nbsp;page</A></BODY></HTML>

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