📄 testlcd.c
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#include "UtilFunc.h"
#include "stdio.h"
#include "stdlib.h"
#include "XsUartDrv.h"
#include "RegCtl.h"
#include "XsGpioDrv.h"
#include "SitsangBrdRegs.h"
#include "SitsangBrdDrv.h"
#include "XsClkMgrDrv.h"
#include "XsPwmDrv.h"
#ifdef AUTO_TEST
#include "package.h"
#endif
#include <string.h>
#include "systypes.h"
//#define LCD_GLOBALS 1
#include "xslcdcontroller.h"
#include "screen.h"
#define Frame_Buffer_P (0xa1000000-48) //0xa8100000
#define Frame_Descriptor_Addr 0xa1800000
//#define Frame_Buffer_P (0xa0100000-48) //0xa8100000
//#define Frame_Descriptor_Addr 0xa0180000
#define Maximum(a,b) ((a)>=(b)?(a):(b))
#define PIC1_SRC_BASE (0x02040000)
#define PIC2_SRC_BASE (0x02040000+640*480*2)
#define PIC1_RAM_BASE (0xa2100000)
#define PIC2_RAM_BASE (0xa2200000)
/*
*******************************************************************************
* LOCAL DEFINITIONS
*******************************************************************************
*/
#ifndef LCD_SIZE_TO_PAGES
#define LCD_PAGE_SIZE 8192
#define LCD_PAGE_MASK 0xFFF
#define LCD_PAGE_SHIFT 12
#define LCD_SIZE_TO_PAGES(a) ( ((a) >> LCD_PAGE_SHIFT) + ((a) & LCD_PAGE_MASK ? 1 : 0) )
#endif
unsigned GetMMUConf(void);
/* Include the picture array */
//#include "pic.c"
#define RAND_MAX1 65534
static unsigned long next = 1;
int rand()
{
return ((next = next * 1103515245 + 12345) % ((unsigned long)RAND_MAX1 + 1));
}
/*----------------------------------------------------------------------
* Standard LCD display. Setup from parameters.
*/
static
void setupLcd(Panel_Info_T * infoP)
{
int lines;
struct lcdregs * lcdP;
lcdP = (struct lcdregs *) LCD_BASE_PHYSICAL;
/* Set the color mode and panel type
*/
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,oum,1);//
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,qdm,1);//
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,cms,0);
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,sds,infoP->dualPanel);
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,pas,infoP->activeDisplay);
// temp disable int.
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,ldm,1);
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,sfm,1);
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,ium,1);
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,efm,1);
/* Little endian mode
*/
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,ble,0);
/* Four pixels per clock
*/
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,dpd,0);
/* Disable palette DMA
*/
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,pdd,0);
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,bm,1);
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,oum,0);
/* Pixels per line
*/
// temp panelWidth - 16
IOW_REG_FIELD(struct lccr1Bits,&lcdP->lccr1,ppl,infoP->panelWidth-1);
/* Horiz sync pulse width
*/
IOW_REG_FIELD(struct lccr1Bits,&lcdP->lccr1,hsw,infoP->horizSyncPW);
/* End of line wait
*/
IOW_REG_FIELD(struct lccr1Bits,&lcdP->lccr1,elw,infoP->horizELW);
/* Start of line wait
*/
IOW_REG_FIELD(struct lccr1Bits,&lcdP->lccr1,blw,infoP->horizBLW);
/* If dual panel we split the lines for vertical lines per panel as
* both run in parallel.
*/
if (infoP->dualPanel)
lines = infoP->panelHeight/2 + infoP->extraLines;
else
lines = infoP->panelHeight + infoP->extraLines;
IOW_REG_FIELD(struct lccr2Bits,&lcdP->lccr2,lpp,lines-1);
/* Vertical sync width
*/
IOW_REG_FIELD(struct lccr2Bits,&lcdP->lccr2,vsw,infoP->vertSyncPW);
/* End of frame wait
*/
IOW_REG_FIELD(struct lccr2Bits,&lcdP->lccr2,efw,infoP->vertEFW);
/* Start of frame wait
*/
IOW_REG_FIELD(struct lccr2Bits,&lcdP->lccr2,bfw,infoP->vertBFW);
/* AC bias for passive display
*/
IOW_REG_FIELD(struct lccr3Bits,&lcdP->lccr3,acb,infoP->acBiasCount);
IOW_REG_FIELD(struct lccr3Bits,&lcdP->lccr3,api,0);
/* Set vsync polarity
*/
IOW_REG_FIELD(struct lccr3Bits,&lcdP->lccr3,vsp,infoP->frameSyncPol);
/* Set hsync polarity
*/
IOW_REG_FIELD(struct lccr3Bits,&lcdP->lccr3,hsp,infoP->horizSyncPol);
/* Set PCLK edge polarity
*/
IOW_REG_FIELD(struct lccr3Bits,&lcdP->lccr3,pcp,infoP->clockPol);
/* Set enable polarity
*/
IOW_REG_FIELD(struct lccr3Bits,&lcdP->lccr3,oep,infoP->outputEnaPol);
//temp
IOW_REG_FIELD(struct lccr3Bits,&lcdP->lccr3,bpp,4);
// IOW_REG_FIELD(struct lccr3Bits,&lcdP->lccr3,dpc,1);
/* No offsets in LCD mode (single frame buffer)
*/
}
/*----------------------------------------------------------------------
* Allocate a frame buffer and initialize for color depth specified
*/
#define LCD_ROUND_PAGE(_a) (((unsigned)(_a)+(LCD_PAGE_SIZE-1))/LCD_PAGE_SIZE)
/*
*******************************************************************************
*
* FUNCTION: allocateFrameBuffer
*
* DESCRIPTION: computes and allocates memory for a frame buffer. This is a
* simpified version that just gets the buffer and does not
* attempt to initialize the buffer with any line drawing stuff.
*
* INPUT PARAMETERS: int bpp - bits per pixel
* int h - horizontal pixels
* int v - vertical pixels
* int extra - extra lines required to pad buffer
*
* RETURNS: DM_FrameBuffer_T * - a pointer to a frame buffer
*
* GLOBAL EFFECTS: none
*
* ASSUMPTIONS: none
*
* CALLS: none
*
* CALLED BY: none
*
* PROTOTYPE: none
*
*******************************************************************************
*/
void allocateFrameBuffer()
{
DM_FrameBuffer_T * frameBufferP;
LCDFrameDescriptorT *pFD;
UINT i;
UINT frameBufferSize;
int h = 640;
int v = 480;
struct lcdregs * lcdP;
// In the case of this display, using 16 bits
// per pixel means the palette RAM is not used.
// Acquire a frame buffer address from the memory manager. But first compute the
// frame buffer size.
frameBufferSize = (h * v * (16/8) + sizeof(DM_FrameBuffer_T));
// now move the pointer to the frame buffer to after the structure
frameBufferP = (DM_FrameBuffer_T*)Frame_Buffer_P;
frameBufferP->bufP = (unsigned short *)(frameBufferP + 1);
frameBufferP->pixelP = (unsigned short *)(frameBufferP + 1);
frameBufferP->numPage = frameBufferSize;
// Blank the buffer
for (i=0; i < h * v; i += 2) {
frameBufferP->pixelP[i] = (RGB565_COLOR_BLUE & 0xFFFF);
frameBufferP->pixelP[i+1] = (RGB565_COLOR_BLUE & 0xFFFF0000) >> 16;
}
//setup DMA
//pFD = (LCDFrameDescriptorT*)(Frame_Buffer_P + frameBufferSize);
pFD = (LCDFrameDescriptorT*)Frame_Descriptor_Addr;
pFD->FDADR = (UINT32)pFD;
pFD->FSADR = (UINT32)frameBufferP->pixelP;
pFD->FIDR = 0x555aaa58;
pFD->LDCMD = (UINT32)640*480*2;
lcdP = (struct lcdregs *) LCD_BASE_PHYSICAL;
lcdP->FDADR0 = (UINT32)pFD;
PrintfUartDef("Dump DMA descriptor at 0x%x\r\n", (UINT)pFD);
//Dump_Bin((UINT)pFD,4);
#ifdef AUTO_TEST
//FormatNormalMessage("FDADR0=0x%X, 0x%X, 0x%X, 0x%X", lcdP->FDADR0, lcdP->FSADR0, lcdP->FIDR0, lcdP->LDCMD0);
//FormatNormalMessage("Mem_FDADR0=0x%X, 0x%X, 0x%X, 0x%X", pFD->FDADR, pFD->FSADR, pFD->FIDR, pFD->LDCMD);
#endif
//PrintfUartDef("FDADR0=0x%X, 0x%X, 0x%X, 0x%X\r\n", lcdP->FDADR0, lcdP->FSADR0, lcdP->FIDR0, lcdP->LDCMD0);
//PrintfUartDef("Mem_FDADR0=0x%X, 0x%X, 0x%X, 0x%X\r\n", pFD->FDADR, pFD->FSADR, pFD->FIDR, pFD->LDCMD);
}
static void clearStatusReg(void)
{
struct lcdregs * lcdP = (struct lcdregs *) LCD_BASE_PHYSICAL;
IOW_REG_FIELD(struct lcsrBits,&lcdP->lcsr,ber,1);
IOW_REG_FIELD(struct lcsrBits,&lcdP->lcsr,abc,1);
IOW_REG_FIELD(struct lcsrBits,&lcdP->lcsr,iol,1);
IOW_REG_FIELD(struct lcsrBits,&lcdP->lcsr,iul,1);
IOW_REG_FIELD(struct lcsrBits,&lcdP->lcsr,iou,1);
IOW_REG_FIELD(struct lcsrBits,&lcdP->lcsr,iuu,1);
IOW_REG_FIELD(struct lcsrBits,&lcdP->lcsr,ool,1);
IOW_REG_FIELD(struct lcsrBits,&lcdP->lcsr,oul,1);
IOW_REG_FIELD(struct lcsrBits,&lcdP->lcsr,oou,1);
IOW_REG_FIELD(struct lcsrBits,&lcdP->lcsr,ouu,1);
}
/*----------------------------------------------------------------------
* Turn the display off and wait for it to complete its current frame.
*/
static void off()
{
struct lcdregs * lcdP;
int timeout,wasRunning;
lcdP = (struct lcdregs *) LCD_BASE_PHYSICAL;
timeout = 1000; // 1 second.
wasRunning = lcdP->lccr0.len;
IOW_REG_FIELD(struct lccr0Bits,&lcdP->lccr0,dis,0);
if (wasRunning) {
while(!lcdP->lcsr.lfd) {
Util_DelayUs(1000);
if (!timeout--) { // Workaround, also good practice anyways.
break;
}
}
}
}
void InitLcdGraphics ( )
{
unsigned DATA;
DM_FrameBuffer_T * Buffer;
struct lcdregs * lcdP = (struct lcdregs *) LCD_BASE_PHYSICAL;
int i;
//Toshiba LTM04C380K 4", (640*480)
Panel_Info_T Toshiba_LTM04C380K =
{640, // width
480, // height
0, // No extra lines
Panel_TypeLcd, // Panel type
0, // Single panel
1, // Active display
16, // bits per pixel
65,//3,//65, // horizontal sync pulse width
95,//139,//95, // horizontal end of line pixel clock wait count
1,//15,//0x1, // horizontal beginning of line pixel clock wait count
0, // Reserved
1,//3,//0x1, // vertical sync pulse width
0,//34,//0, // vertical end of frame line clock wait count
45,//5,//45, // vertical beginning of frame clock wait count
0, // Reserved
1, // frameSyncPol
1, // horizSyncPol
1, // clockPol
0, // outputEnablePol
0, // AC bias counter
0, // Reserved
};
Util_TestCpldLed();
Buffer = (DM_FrameBuffer_T*)Frame_Buffer_P;
///////////////////////
//LCD GPIO pin setting
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