📄 simp.lst
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;* Please contact the Author 'Wayne Peacock' *
;* <wpeacock@senet.com.au> before using the code*
;* or part there of in a commercial project. *
;************************************************
; Requires the following registers
;.def text = r0 ; Text MUST be 0
;.def data = r17
;.def temp = r16
; Zreg ;Pointer to Data
;************************************************
;* LCD Panel in 4 bit mode *
;* *
;* Pin Connections *
;* *7
;* PD0 --> D4 *
;* PD1 --> D5 *
;* PD2 --> D6 *
;* PD3 --> D7 *
;* *
;* PB0 --> E *
;* PB1 --> R/W (1 = READ, 0 = WRITE) *
;* PB2 --> RS (1 = DATA, 0 = CONTROL) *
;************************************************
;************************************************
;* LCD CONSTANTS *
;************************************************
.equ E = 0
.equ RS = 2
.equ RW = 1
.equ BF = 3 ; Busy Flag D7
;.equ LCDD = $11 ; (LCD Data Direction) DDRD
;.equ LCDP = $12 ; (LCD Data Port) PORTD
;.equ LCDI = $10 ; (LCD Data Input) PIND
;************************************************
;* Setup LCD Panel Port *
;* Input: None *
;* Returns: None *
;* Requires: data *
;************************************************
lcdinit:
; Clear LCD Pins
00004c 98c0 cbi PORTB,E ; LCD Enable Inactive
; Make Control Pins Output
00004d b317 in data, DDRB
00004e 6017 ori data, 0b00000111 ; Make all LCD pins outputs
00004f bb17 out DDRB, data
; Make Data pins Outputs
000050 b311 in data, DDRD
000051 601f ori data, 0b00001111
000052 bb11 out DDRD,data
; 4 Bit Mode
000053 7f10 andi data, 0b11110000 ; Clear Data Nibble
000054 6012 ori data, 0x02 ; One 4bit instruction (2 = 4bit)
000055 bb12 out PORTD, data ; Load command onto LCD Data Port
000056 98c1 cbi PORTB,RW ; Write Mode
000057 98c2 cbi PORTB,RS ; RS low (command)
000058 9ac0 sbi PORTB,E ; Enable --> high (50us to next instruction)
000059 0000 nop ; 375ns delay (Must be greater than 220ns)
00005a 0000 nop
00005b 0000 nop
00005c 0000 nop
00005d 98c0 cbi PORTB,E ; Enable Inactive
; Repeat Command to make sure panel got it!
;nop
;nop
;nop
00005e 0000 nop
00005f 0000 nop
000060 0000 nop
;cbi PORTB,RW ; Write Mode
;cbi PORTB,RS ; RS low (command)
;sbi PORTB,E ; Enable --> high (50us to next instruction)
000061 0000 nop ; 375ns delay (Must be greater than 220ns)
000062 0000 nop
000063 0000 nop
000064 0000 nop
000065 0000 nop
000066 0000 nop
;cbi PORTB,E ; Enable Inactive
000067 9508 ret
;************************************************
;* Command(char data) *
;* Input: data *
;* Returns: None *
;* Requires: temp *
;* *
;* 0x38 8 bits / 2Lines *
;* 0x0F Display On / Cursor Flashing *
;* 0x0C Display on - No Cursor *
;* 0x01 Clear Display *
;* 0xC0 Bottom Line *
;* 0x80 Top Line *
;************************************************
command:
000068 d033 rcall waitlcd ; Make sure it's ready
000069 98c2 cbi PORTB,RS ; RS low (command)
00006a d001 rcall lcdwr_0
00006b 9508 ret
lcdwr_0:
00006c 2e11 mov store, data ; Push data into store
00006d 9512 swap data
00006e 701f andi data, 0x0F
00006f b302 in temp, PORTD
000070 7f00 andi temp, 0b11110000 ; Clear Data Nibble
000071 2b01 or temp, data ; One 4bit instruction (2 = 4bit)
000072 bb02 out PORTD, temp ; Load command onto LCD Data Port
000073 98c1 cbi PORTB,RW ; Write Mode
000074 9ac0 sbi PORTB,E ; Enable --> high (50us to next instruction)
000075 0000 nop ; 375ns delay (Must be greater than 220ns)
000076 0000 nop
000077 0000 nop
000078 0000 nop
000079 0000 nop
00007a 0000 nop
00007b 98c0 cbi PORTB,E ; Enable Inactive
00007c 0000 nop
00007d 0000 nop
00007e 0000 nop
; second nibble to send
00007f 2d11 mov data, store
;swap data
000080 701f andi data, 0x0F
000081 b302 in temp, PORTD
000082 7f00 andi temp, 0b11110000 ; Clear Data Nibble
000083 2b01 or temp, data ; One 4bit instruction (2 = 4bit)
000084 bb02 out PORTD, temp ; Load command onto LCD Data Port
000085 0000 nop
000086 0000 nop
000087 9ac0 sbi PORTB,E ; Enable --> high (50us to next instruction)
000088 0000 nop ; 375ns delay (Must be greater than 220ns)
000089 0000 nop
00008a 0000 nop
00008b 0000 nop
00008c 0000 nop
00008d 0000 nop
00008e 98c0 cbi PORTB,E ; Enable Inactive
00008f 9508 ret
;************************************************
;* OneChar(char data) *
;* Input: data *
;* Returns: None *
;* Requires: temp *
;* *
;************************************************
onechar:
000090 d00b rcall waitlcd ; Make sure it's ready
000091 9ac2 sbi PORTB,RS ; RS high (data)
000092 dfd9 rcall lcdwr_0
000093 9508 ret
;************************************************
;* WriteData(*Zreg) 0x00 to End *
;* Input: Data at address of Z pointer *
;* Returns: None *
;* Requires: temp *
;* data *
;* text (Must be r0) *
;************************************************
writedata:
;lpm ; Load Program Memory (Get from Flash!)
000094 2000 tst text ; Check for more characters
000095 f029 breq wd2 ; End of Text
000096 d005 rcall waitlcd ; Wait for LCD ready
000097 9ac2 sbi PORTB,RS ; RS high (data)
000098 2d10 mov data, text
000099 dfd2 rcall lcdwr_0
;adiw ZL,1 ; Inc Z Pointer
00009a cff9 rjmp writedata ; Repeat until 00
00009b 9508 wd2: ret ; Finished here
;************************************************
;* Wait for LCD panel *
;* Input: None *
;* Output: None *
;* Requires: temp *
;************************************************
waitlcd:
; Make data pins input
00009c b301 in temp, DDRD
00009d 7f00 andi temp, 0b11110000 ; Make all Data LCD pins inputs
00009e bb01 out DDRD, temp
00009f 9ac1 sbi PORTB,RW ; Read Mode
0000a0 98c2 cbi PORTB,RS ; RS Low (command)
0000a1 9ac0 sbi PORTB,E ; Enable --> High
0000a2 0000 nop ; ns delay
0000a3 0000 nop
0000a4 9983 sbic PIND,BF ; Check for Busy flag, Skip if ready
0000a5 c00d rjmp wlcd2 ; Not ready!
0000a6 98c0 cbi PORTB,E ; Enable Inactive
; Second nibble
0000a7 0000 nop
0000a8 0000 nop
0000a9 9ac0 sbi PORTB,E ; Enable --> High
0000aa 0000 nop ; ns delay
0000ab 0000 nop
0000ac 0000 nop
0000ad 98c0 cbi PORTB,E ; Enable Inactive
; Make data pins output
0000ae 9891 cbi PORTD, RW ; Write Mode
0000af b301 in temp, DDRD
0000b0 600f ori temp, 0b00001111 ; Make all LCD pins outputs
0000b1 bb01 out DDRD, temp
0000b2 9508 ret
0000b3 98c0 wlcd2: cbi PORTB,E ; Enable Inactive
; Second nibble
0000b4 0000 nop
0000b5 0000 nop
0000b6 9ac0 sbi PORTB,E ; Enable --> High
0000b7 0000 nop ; ns delay
0000b8 0000 nop
0000b9 0000 nop
0000ba 98c0 cbi PORTB,E ; Enable Inactive
0000bb cfe0 rjmp waitlcd ; Repeat until ready
; End of File! .include "delay.asm"
;************************************************
;* Delay routines for AVR's *
;* *
;* Copyright 2001-2003 Wayne Peacock *
;* First Revision 6th Jan 2001 *
;* Version 1.01 *
;************************************************
;* Disclaimer: *
;* The Author takes no responsibility for the *
;* use of this code. Use at your own risk! *
;* *
;* This code or part there of is licensed only *
;* for private use and NOT for commercial use. *
;* *
;* Please contact the Author 'Wayne Peacock' *
;* <wpeacock@senet.com.au> before using the code*
;* or part there of in a commercial project. *
;************************************************
; Requires the following registers
;.def count1 = r26
;.def count2 = r27
wait_long:
0000bc efaf ldi count1, 0xff
0000bd c001 rjmp delay
;************************************************
;* 2ms Delay (8Mhz) *
;* *
;* Input: None *
;* Returns: None *
;* Requires: count1 *
;* count2 *
;************************************************
wait_2ms:
0000be e1a5 ldi count1, 0x15 ; 2ms delay
;************************************************
;* Delay (8Mhz) *
;* *
;* Input: count1 (1 = appox. 100us) *
;* Returns: None *
;* Requires: count2 *
;************************************************
0000bf efbf delay: ldi count2,0xff ; (1) 1 count appox. 100us
0000c0 95ba w01: dec count2 ; (1*255)
0000c1 f7f1 brne w01 ; (2*255)
0000c2 95aa dec count1 ; (1)
0000c3 f7d9 brne delay ; (2)
0000c4 9508 ret ; (4)
;************************************************
;* Delay (4Mhz) *
;* *
;* Input: count1 = n (delay = 5.25n+2us) *
;* Returns: None *
;* Requires: count2 *
;************************************************
delayX5us:
0000c5 e0b6 ldi count2,0x06 ; (1) 1 count appox. 5us
0000c6 95ba del01: dec count2 ; (1*255)
0000c7 f7f1 brne del01 ; (2*255)
0000c8 95aa dec count1 ; (1)
0000c9 f7d9 brne delayX5us ; (2)
0000ca 9508 ret ; (4)
;************************************************
;* Short Delay 2us (4Mhz) *
;* *
;************************************************
delay2us:
0000cb 0000 nop
0000cc 9508 ret
.include "DS1820sub1200.asm"
;************************************************
;* DS1820 subroutines for AVR's *
;* *
;* Simple Temp read for AT90S1200 *
;* No SRAM!! Less Instructions to use *
;* *
;* Copyright 2001-2003 Wayne Peacock *
;* First Revision 2th July 2001 *
;* Version 1.02 *
;* *
;************************************************
;* See Schematic for Hardware connections *
;* *
;* Disclaimer: *
;* The Author takes no responsibility for the *
;* use of this code. Use at your own risk! *
;* *
;* This code or part there of is licensed only *
;* for private use and NOT for commercial use. *
;* *
;* Please contact the Author 'Wayne Peacock' *
;* <wpeacock@senet.com.au> before using the code*
;* or part there of in a commercial project. *
;* *
;* Muliply/Divide routines are copied from the *
;* AVR200 Application Note (See Below) *
;************************************************
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