📄 init.s
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/* * init.S -- Startup code for loader.c, which runs in SRAM. * * Copyright (C) 2004 WangXin <SecureCRT@eyou.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */#define SRAM_BASE 0x10000000 /* in bootstrap mode */#define SRAM_SIZE 0x0000c000 /* EP7312 has 48kB */.text .global _start_start: mov r0, #0x80000000 /* I/O base */ mov r1, #0x100 /* UART enable bit in SYSCON[1|2] */ str r1, [r0, #0x100] /* enable UART1 in SYSCON1 */ add r2, r0, #0x1100 /* load address of SYSCON2 in r2 */ str r1, [r2] /* enable UART2 in SYSCON2 */ mov r1, #0x6 /* CLKCTL_73 in SYSCON3 */ add r2, r0, #0x2200 /* address of SYSCON3 in r2 */ str r1, [r2] /* set clock speed to 73.728 MHz */ mov r1, #0x81 /* 64KHz DRAM refresh period */ str r1, [r0, #0x200] /* set DRFPR */ mov r1, #0x500 /* CAS lat = 2, permanent enable, 16 bit wide, 64Mbit SDRAM */ add r1, r1, #0x22 add r2, r0, #0x2300 /* load address in r2 */ str r1, [r2] mov r1, #0x100 /* SDRAM refresh rate */ add r2, r0, #0x2340 /* load address in r2 */ str r1, [r2] mov r0, #0x80000000 mov r1, #0x50000 orr r1, r1, #4 str r1, [r0,#0x180] /* * Setup stack in SRAM */ mov sp, #SRAM_BASE add sp, sp, #SRAM_SIZE /* stack in SRAM */ mov r0, #0 ldr r1, =__bss_start /* clear bss */1: str r0, [r1], #4 cmp r1, sp blo 1b bl main /* see loader.c */2: b 2b
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