jack.h

LC72131 PLL C源程序

/*
#define SET_GPIO_R(dwPorts)       Gpio_Opr(SET_READ,dwPorts)
#define SET_GPIO_W(dwPorts)       Gpio_Opr(SET_WRITE,dwPorts)
#define SET_GPIO_HI(dwPorts)      Gpio_Opr(SET_HI,dwPorts)
#define SET_GPIO_LOW(dwPorts)     Gpio_Opr(SET_LOW,dwPorts)
#define GET_GPIO_DATA(dwPorts)    Gpio_Opr(GET_DATA,dwPorts)

#define TUNER_CE	(0x00100000) //TUNER -->CE
#define TUNER_CL	(0x00040000) //TUNER-->CLK
#define TUNER_DA	(0x00080000)//(0x00000000) TUNER-->DATA
#define TUNER_READ_DA	(0x00800000)//(0x00000000)
*/
#include <Gpio51.h>
#include <iic.h>
UINT16 mode1_send_data;	//p0~p15 
BYTE   mode1_ctl_data;

BYTE mode2_send_data0;	 
BYTE mode2_send_data1;	 
BYTE mode2_send_data2;	 




#define  inmode1_start 0x14 // input mode1 address
#define  inmode2_start 0x94 // input mode2 address
#define  outmode_start 0x54  //output mode address


// formulate: am: 0x2b2-->0x2b2, dec(0x2b2) * ref frequency(3) - IF(450) = 1620khz;
//            fm: 0x7b2-->0x7b2, dec(0x7b2) * ref frequency(25) * 2 - IF( 10700 ) = 87800khz
#define AM_FREQ_MAX  0x2b20 // 1620k, ref 3khz
#define AM_FREQ_MIN  0x1440 // 522k,  ref 3khz 
#define FM_FREQ_MIN  0x7b2  //87.8MHZ, ref 25khz 
#define FM_FREQ_MAX  0x942  //108Mhz, ref 25khz

/*
sbit    SNS=in1_data3^7; 
sbit    DVS=in1_data3^6;
sbit    CTE=in1_data3^5;
sbit    DNC=in1_data3^4;
sbit    R00=in1_data3^3;
sbit    R11=in1_data3^2;
sbit    R22=in1_data3^1;
sbit    R33=in1_data3^0;
*/
//#define SET_SNS(d)  ((d) ? (in1_data3|=(1<<7)) : (in1_data3&=~(1<<7)) )

#define SET_SNS(d)  ((d) ? (mode1_ctl_data|=(1<<7)) : (mode1_ctl_data&=~(1<<7)) )
#define SET_DVS(d)  ((d) ? (mode1_ctl_data|=(1<<6)) : (mode1_ctl_data&=~(1<<6)) )
#define SET_CTE(d)  ((d) ? (mode1_ctl_data|=(1<<5)) : (mode1_ctl_data&=~(1<<5)) )
#define SET_XS(d)   ((d) ? (mode1_ctl_data|=(1<<4)) : (mode1_ctl_data&=~(1<<4)) )
#define SET_R0(d)  ((d) ? (mode1_ctl_data|=(1<<3)) : (mode1_ctl_data&=~(1<<3)) )
#define SET_R1(d)  ((d) ? (mode1_ctl_data|=(1<<2)) : (mode1_ctl_data&=~(1<<2)) )
#define SET_R2(d)  ((d) ? (mode1_ctl_data|=(1<<1)) : (mode1_ctl_data&=~(1<<1)) )
#define SET_R3(d)  ((d) ? (mode1_ctl_data|=(1<<0)) : (mode1_ctl_data&=~(1<<0)) )



//  in2_data1:
/*
sbit    IOC1      = in2_data1^7;  output
sbit    IOC2      = in2_data1^6;  output
sbit    IO1       = in2_data1^5;  /ST_LED
sbit    IO2       = in2_data1^5;  /FM
sbit    BDSW1     = in2_data1^3;  /MW/LW
sbit    STSW      = in2_data1^2;  /MO/ST
sbit    BDSW2     = in2_data1^1;  /AM/FM
sbit    IFSW      = in2_data1^0;  IF(MUTE) REQ
*/      
#define STSW            (mode2_send_data0&(1<<2))

#define SET_IOC1(d)     ((d) ? (mode2_send_data0|=(1<<7)) : (mode2_send_data0&=~(1<<7)) )
#define SET_IOC2(d)     ((d) ? (mode2_send_data0|=(1<<6)) : (mode2_send_data0&=~(1<<6)) )
#define SET_IO1(d)      ((d) ? (mode2_send_data0|=(1<<5)) : (mode2_send_data0&=~(1<<5)) )
#define SET_IO2(d)      ((d) ? (mode2_send_data0|=(1<<4)) : (mode2_send_data0&=~(1<<4)) )
#define SET_BDSW1(d)    ((d) ? (mode2_send_data0|=(1<<3)) : (mode2_send_data0&=~(1<<3)) )
#define SET_STSW(d)     ((d) ? (mode2_send_data0|=(1<<2)) : mode2_send_data0&=~(1<<2)) )
#define SET_BDSW2(d)   	((d) ? (mode2_send_data0|=(1<<1)) : (mode2_send_data0&=~(1<<1)) )
#define SET_IFSW(d) 	((d) ? (mode2_send_data0|=(1<<0)) : (mode2_send_data0&=~(1<<0)) )


//  in2_data2:
/*
sbit    DNC       = in2_data2^7; //SDC0
sbit    DOC0      = in2_data2^6;
sbit    DOC1      = in2_data2^5;
sbit    DOC2      = in2_data2^4;
sbit    UL0       = in2_data2^3;
sbit    UL1       = in2_data2^2;
sbit    DZ0       = in2_data2^1;
sbit    DZ1       = in2_data2^0;
*/
#define SET_DNC(d)    ((d) ? (mode2_send_data1|=(1<<7)) : (mode2_send_data1&=~(1<<7)) )
#define SET_DOC0(d)   ((d) ? (mode2_send_data1|=(1<<6)) : (mode2_send_data1&=~(1<<6)) )
#define SET_DOC1(d)   ((d) ? (mode2_send_data1|=(1<<5)) : (mode2_send_data1&=~(1<<5)) )
#define SET_DOC2(d)   ((d) ? (mode2_send_data1|=(1<<4)) : (mode2_send_data1&=~(1<<4)) )
#define SET_UL0(d)    ((d) ? (mode2_send_data1|=(1<<3)) : (mode2_send_data1&=~(1<<3)) )
#define SET_UL1(d)    ((d) ? (mode2_send_data1|=(1<<2)) : (mode2_send_data1&=~(1<<2)) )
#define SET_DZ0(d)    ((d) ? (mode2_send_data1|=(1<<1)) : (mode2_send_data1&=~(1<<1)) )
#define SET_DZ1(d) 	  ((d) ? (mode2_send_data1|=(1<<0)) : (mode2_send_data1&=~(1<<0)) )


//  in2_data3:
/*
sbit    GT0       = in2_data3^7; 
sbit    GT1       = in2_data3^6;
sbit    TBC       = in2_data3^5; //SDC1
sbit    DLC       = in2_data3^4;
sbit    IFS       = in2_data3^3;
sbit    TEST0     = in2_data3^2;
sbit    TEST1     = in2_data3^1;
sbit    TEST2     = in2_data3^0;
*/
#define SET_GT0(d)    ((d) ? (mode2_send_data2|=(1<<7)) : (mode2_send_data2&=~(1<<7)) )
#define SET_GT1(d)    ((d) ? (mode2_send_data2|=(1<<6)) : (mode2_send_data2&=~(1<<6)) )
#define SET_TBC(d)    ((d) ? (mode2_send_data2|=(1<<5)) : (mode2_send_data2&=~(1<<5)) )
#define SET_DLC(d)    ((d) ? (mode2_send_data2|=(1<<4)) : (mode2_send_data2&=~(1<<4)) )
#define SET_IFS(d)    ((d) ? (mode2_send_data2|=(1<<3)) : (mode2_send_data2&=~(1<<3)) )
#define SET_TEST0(d) ((d) ? (mode2_send_data2|=(1<<2)) : (mode2_send_data2&=~(1<<2)) )
#define SET_TEST1(d) ((d) ? (mode2_send_data2|=(1<<1)) : (mode2_send_data2&=~(1<<1)) )
#define SET_TEST2(d) ((d) ? (mode2_send_data2|=(1<<0)) : (mode2_send_data2&=~(1<<0)) )

void jack_main(void);
void send_MSB(BYTE value);
void send_LSB(BYTE value);
void mode1_send_24bit_data(void);
void mode2_send_24bit_data(void);
void cmd_end(void);
void AM_FM_SELECT(void);
UINT32 read_24bit_outup_data(void);
void Amautosearch( BYTE autosearch_status );
void Fmautosearch( BYTE autosearch_status );
void Amautosearch( BYTE autosearch_status );
void init_ic(void);
void init_value(void);
void Amstepsearch( BYTE step_up_flag );
void Fmstepsearch( BYTE step_up_flag );