📄 fdctam32.cpp
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#include "StdAfx.h"
#include "..\Common.h"
//////////////////////////////////////////////////////////////////////////////
//
// fdctam32.c - AP922 MMX(3D-Now) forward-DCT
// ----------
// Intel Application Note AP-922 - fast, precise implementation of DCT
// http://developer.intel.com/vtune/cbts/appnotes.htm
// ----------
//
// This routine uses a 3D-Now/MMX enhancement to increase the
// accuracy of the fdct_col_4 macro. The dct_col function uses 3D-Now's
// PMHULHRW instead of MMX's PMHULHW(and POR). The substitution improves
// accuracy very slightly with performance penalty. If the target CPU
// does not support 3D-Now, then this function cannot be executed.
// fdctmm32.c contains the standard MMX implementation of AP-922.
//
// For a fast, precise MMX implementation of inverse-DCT
// visit http://www.elecard.com/peter
//
// v1.0 07/22/2000 (initial release)
// Initial release of AP922 MMX(3D-Now) forward_DCT.
// This code was tested with Visual C++ 6.0Pro + service_pack4 +
// processor_pack_beta! If you have the processor_pack_beta, you can
// remove the #include for amd3dx.h, and substitute the 'normal'
// assembly lines for the macro'd versions. Otherwise, this
// code should compile 'as is', under Visual C++ 6.0 Pro.
//
// liaor@iname.com http://members.tripod.com/~liaor
//////////////////////////////////////////////////////////////////////////////
//#include "amd3dx.h" // needed if you do not have PROCESSOR_PACK_BETA for VC++
#ifdef __BORLANDC__
#define EMIT db
#else
#define EMIT _emit
#endif
#define INP eax // pointer to (short *blk)
#define OUT ecx // pointer to output (temporary store space qwTemp[])
#define TABLE ebx // pointer to tab_frw_01234567[]
#define TABLEF ebx // pointer to tg_all_16
#define round_frw_row edx
//#define round_frw_col edx
#define x0 INP + 0*16
#define x1 INP + 1*16
#define x2 INP + 2*16
#define x3 INP + 3*16
#define x4 INP + 4*16
#define x5 INP + 5*16
#define x6 INP + 6*16
#define x7 INP + 7*16
#define y0 OUT + 0*16
#define y1 OUT + 1*16
#define y2 OUT + 2*16
#define y3 OUT + 3*16
#define y4 OUT + 4*16
#define y5 OUT + 5*16
#define y6 OUT + 6*16
#define y7 OUT + 7*16
//////////////////////////////////////////////////////////////////////
//
// constants for the forward DCT
// -----------------------------
//
// Be sure to check that your compiler is aligning all constants to QWORD
// (8-byte) memory boundaries! Otherwise the unaligned memory access will
// severely stall MMX execution.
//
//////////////////////////////////////////////////////////////////////
#define BITS_FRW_ACC 3 //; 2 or 3 for accuracy
#define SHIFT_FRW_COL BITS_FRW_ACC
#define SHIFT_FRW_ROW (BITS_FRW_ACC + 17)
#define RND_FRW_ROW (1 << (SHIFT_FRW_ROW-1))
#define RND_FRW_COL (1 << (SHIFT_FRW_COL-1))
const static __int64 one_corr = 0x0001000100010001;
const static long r_frw_row[2] = {RND_FRW_ROW, RND_FRW_ROW };
//const static short tg_1_16[4] = {13036, 13036, 13036, 13036 }; //tg * (2<<16) + 0.5
//const static short tg_2_16[4] = {27146, 27146, 27146, 27146 }; //tg * (2<<16) + 0.5
//const static short tg_3_16[4] = {-21746, -21746, -21746, -21746 }; //tg * (2<<16) + 0.5
//const static short cos_4_16[4] = {-19195, -19195, -19195, -19195 }; //cos * (2<<16) + 0.5
//const static short ocos_4_16[4] = {23170, 23170, 23170, 23170 }; //cos * (2<<15) + 0.5
//concatenated table, for forward DCT transformation
const static short tg_all_16[] = {
13036, 13036, 13036, 13036, // tg * (2<<16) + 0.5
27146, 27146, 27146, 27146, // tg * (2<<16) + 0.5
-21746, -21746, -21746, -21746, // tg * (2<<16) + 0.5
-19195, -19195, -19195, -19195, //cos * (2<<16) + 0.5
23170, 23170, 23170, 23170 }; //cos * (2<<15) + 0.5
#define tg_1_16 (TABLEF + 0)
#define tg_2_16 (TABLEF + 8)
#define tg_3_16 (TABLEF + 16)
#define cos_4_16 (TABLEF + 24)
#define ocos_4_16 (TABLEF + 32)
// These extra defines convert the above address expressions into REG, OFFSET.
// The amd3dx.h requires this {REG, OFFSET} format to use memory-operands with
// 3DNow instructions.
#define TG_ALL TABLEF
#define TG_1_16_OFFSET 0
#define TG_2_16_OFFSET 8
#define TG_3_16_OFFSET 16
#define COS_4_16_OFFSET 24
#define OCOS_4_16_OFFSET 32
// CONCATENATED IDCT COEFF TABLE, rows 0,1,2,3,4,5,6,7 (in order )
//
static const short tab_frw_01234567[] = { // forward_dct coeff table
//row0
16384, 16384, 21407, -8867, // w09 w01 w08 w00
16384, 16384, 8867, -21407, // w13 w05 w12 w04
16384, -16384, 8867, 21407, // w11 w03 w10 w02
-16384, 16384, -21407, -8867, // w15 w07 w14 w06
22725, 12873, 19266, -22725, // w22 w20 w18 w16
19266, 4520, -4520, -12873, // w23 w21 w19 w17
12873, 4520, 4520, 19266, // w30 w28 w26 w24
-22725, 19266, -12873, -22725, // w31 w29 w27 w25
//row1
22725, 22725, 29692, -12299, // w09 w01 w08 w00
22725, 22725, 12299, -29692, // w13 w05 w12 w04
22725, -22725, 12299, 29692, // w11 w03 w10 w02
-22725, 22725, -29692, -12299, // w15 w07 w14 w06
31521, 17855, 26722, -31521, // w22 w20 w18 w16
26722, 6270, -6270, -17855, // w23 w21 w19 w17
17855, 6270, 6270, 26722, // w30 w28 w26 w24
-31521, 26722, -17855, -31521, // w31 w29 w27 w25
//row2
21407, 21407, 27969, -11585, // w09 w01 w08 w00
21407, 21407, 11585, -27969, // w13 w05 w12 w04
21407, -21407, 11585, 27969, // w11 w03 w10 w02
-21407, 21407, -27969, -11585, // w15 w07 w14 w06
29692, 16819, 25172, -29692, // w22 w20 w18 w16
25172, 5906, -5906, -16819, // w23 w21 w19 w17
16819, 5906, 5906, 25172, // w30 w28 w26 w24
-29692, 25172, -16819, -29692, // w31 w29 w27 w25
//row3
19266, 19266, 25172, -10426, // w09 w01 w08 w00
19266, 19266, 10426, -25172, // w13 w05 w12 w04
19266, -19266, 10426, 25172, // w11 w03 w10 w02
-19266, 19266, -25172, -10426, // w15 w07 w14 w06,
26722, 15137, 22654, -26722, // w22 w20 w18 w16
22654, 5315, -5315, -15137, // w23 w21 w19 w17
15137, 5315, 5315, 22654, // w30 w28 w26 w24
-26722, 22654, -15137, -26722, // w31 w29 w27 w25,
//row4
16384, 16384, 21407, -8867, // w09 w01 w08 w00
16384, 16384, 8867, -21407, // w13 w05 w12 w04
16384, -16384, 8867, 21407, // w11 w03 w10 w02
-16384, 16384, -21407, -8867, // w15 w07 w14 w06
22725, 12873, 19266, -22725, // w22 w20 w18 w16
19266, 4520, -4520, -12873, // w23 w21 w19 w17
12873, 4520, 4520, 19266, // w30 w28 w26 w24
-22725, 19266, -12873, -22725, // w31 w29 w27 w25
//row5
19266, 19266, 25172, -10426, // w09 w01 w08 w00
19266, 19266, 10426, -25172, // w13 w05 w12 w04
19266, -19266, 10426, 25172, // w11 w03 w10 w02
-19266, 19266, -25172, -10426, // w15 w07 w14 w06
26722, 15137, 22654, -26722, // w22 w20 w18 w16
22654, 5315, -5315, -15137, // w23 w21 w19 w17
15137, 5315, 5315, 22654, // w30 w28 w26 w24
-26722, 22654, -15137, -26722, // w31 w29 w27 w25
//row6
21407, 21407, 27969, -11585, // w09 w01 w08 w00
21407, 21407, 11585, -27969, // w13 w05 w12 w04
21407, -21407, 11585, 27969, // w11 w03 w10 w02
-21407, 21407, -27969, -11585, // w15 w07 w14 w06,
29692, 16819, 25172, -29692, // w22 w20 w18 w16
25172, 5906, -5906, -16819, // w23 w21 w19 w17
16819, 5906, 5906, 25172, // w30 w28 w26 w24
-29692, 25172, -16819, -29692, // w31 w29 w27 w25,
//row7
22725, 22725, 29692, -12299, // w09 w01 w08 w00
22725, 22725, 12299, -29692, // w13 w05 w12 w04
22725, -22725, 12299, 29692, // w11 w03 w10 w02
-22725, 22725, -29692, -12299, // w15 w07 w14 w06,
31521, 17855, 26722, -31521, // w22 w20 w18 w16
26722, 6270, -6270, -17855, // w23 w21 w19 w17
17855, 6270, 6270, 26722, // w30 w28 w26 w24
-31521, 26722, -17855, -31521 // w31 w29 w27 w25
};
void fdct_am32( short *blk )
{
/*
static __int64 xt70[2]; // xt7xt6xt5xt4, xt3xt2xt1xt0
static long a0, a1, a2, a3, b0, b1, b2, b3;
static short *sptr, *optr, *tf; // tf = table_ptr
static short *xt = (short *) &xt70[0];
static int j;
*/
__asm {
////////////////////////////////////////////////////////////////////////
//
// The high-level pseudocode for the fdct_am32() routine :
//
// fdct_am32()
// {
// forward_dct_col03()// // dct_column transform on cols 0-3
// forward_dct_col47()// // dct_column transform on cols 4-7
// for ( j = 0// j < 8// j=j+1 )
// forward_dct_row1(j)// // dct_row transform on row #j
// }
//
// fdct_am32() and fdct_mm32() share the same base algorithm.
// fdct_am32() improves upon fdct_mm32() by using 3D-Now's PMULHRW.
// PMULHRW uses a rounding-policy for lsb generation (instead of
// pmulhw's less accurate truncation.) Output accuracy is very
// slightly improved, measurable by ieee1180 test.
mov INP, dword ptr [blk]// //// input data is row 0 of blk[]
//// transform the left half of the matrix (4 columns)
lea TABLEF, dword ptr [tg_all_16]//
mov OUT, INP//
// lea round_frw_col, dword ptr [r_frw_col]
// for ( i = 0// i < 2// i = i + 1)
// the for-loop is executed twice. We are better off unrolling the
// loop to avoid branch misprediction.
// mmx3d_fdct_col03:
movq mm0, [x1] // 0 // x1
////
movq mm1, [x6] // 1 // x6
movq mm2, mm0 // 2 // x1
movq mm3, [x2] // 3 // x2
paddsw mm0, mm1 // t1 = x[1] + x[6]
movq mm4, [x5] // 4 // x5
psllw mm0, SHIFT_FRW_COL // t1
movq mm5, [x0] // 5 // x0
paddsw mm4, mm3 // t2 = x[2] + x[5]
paddsw mm5, [x7] // t0 = x[0] + x[7]
psllw mm4, SHIFT_FRW_COL // t2
movq mm6, mm0 // 6 // t1
psubsw mm2, mm1 // 1 // t6 = x[1] - x[6]
movq mm1, qword ptr [tg_2_16] // 1 // tg_2_16
psubsw mm0, mm4 // tm12 = t1 - t2
movq mm7, [x3] // 7 // x3
// PMULHRW mm1, mm0 // tm12*tg_2_16
/* EMIT 0x0f
EMIT 0x0f
EMIT 0xc8 //((0xc1 & 0x3f) << 3) | 0xc0
EMIT 0xb7 // tm12*(ebx + 8)
*/ pmulhw mm1, mm0
// PMULHRW( mm1, mm0 )// tm12*tg_2_16
paddsw mm7, [x4] // t3 = x[3] + x[4]
psllw mm5, SHIFT_FRW_COL // t0
paddsw mm6, mm4 // 4 // tp12 = t1 + t2
psllw mm7, SHIFT_FRW_COL // t3
movq mm4, mm5 // 4 // t0
psubsw mm5, mm7 // tm03 = t0 - t3
paddsw mm1, mm5 // y2 = tm03 + tm12*tg_2_16
paddsw mm4, mm7 // 7 // tp03 = t0 + t3
por mm1, qword ptr one_corr // correction y2 +0.5
psllw mm2, SHIFT_FRW_COL+1 // t6
// PMULHRW mm5, qword ptr [tg_2_16] // tm03*tg_2_16
/* EMIT 0x0f
EMIT 0x0f
EMIT 0x6b //(((0xc5 & 0x3f) << 3) | 0x03 | 0x40)
EMIT 8
EMIT 0xb7 // tm03*(ebx + 8)
*/ pmulhw mm5, qword ptr [tg_2_16]
// PMULHRWM( mm5, TG_ALL, TG_2_16_OFFSET )// tm03*tg_2_16
movq mm7, mm4 // 7 // tp03
psubsw mm3, [x5] // t5 = x[2] - x[5]
psubsw mm4, mm6 // y4 = tp03 - tp12
movq [y2], mm1 // 1 // save y2
paddsw mm7, mm6 // 6 // y0 = tp03 + tp12
movq mm1, [x3] // 1 // x3
psllw mm3, SHIFT_FRW_COL+1 // t5
psubsw mm1, [x4] // t4 = x[3] - x[4]
movq mm6, mm2 // 6 // t6
movq [y4], mm4 // 4 // save y4
paddsw mm2, mm3 // t6 + t5
// PMULHRW mm2, qword ptr [ocos_4_16] // tp65 = (t6 + t5)*cos_4_16
/* EMIT 0x0f
EMIT 0x0f
EMIT 0x53 //(((0xc2 & 0x3f) << 3) | 0x03 | 0x40)
EMIT 32
EMIT 0xb7 // tp65 = (t6 + t5)*(ebx + 24)
*/ pmulhw mm2, qword ptr [ocos_4_16]
// PMULHRWM( mm2, TG_ALL, OCOS_4_16_OFFSET )// tp65 = (t6 + t5)*cos_4_16
psubsw mm6, mm3 // 3 // t6 - t5
// PMULHRW mm6, qword ptr [ocos_4_16] // tm65 = (t6 - t5)*cos_4_16
/* EMIT 0x0f
EMIT 0x0f
EMIT 0x73 //(((0xc6 & 0x3f) << 3) | 0x03 | 0x40)
EMIT 32
EMIT 0xb7 // tm65 = (t6 - t5)*(ebx + 24)
*/ pmulhw mm6, qword ptr [ocos_4_16]
// PMULHRWM( mm6, TG_ALL, OCOS_4_16_OFFSET )// tm65 = (t6 - t5)*cos_4_16
psubsw mm5, mm0 // 0 // y6 = tm03*tg_2_16 - tm12
por mm5, qword ptr one_corr // correction y6 +0.5
psllw mm1, SHIFT_FRW_COL // t4
por mm2, qword ptr one_corr // correction tp65 +0.5
movq mm4, mm1 // 4 // t4
movq mm3, [x0] // 3 // x0
paddsw mm1, mm6 // tp465 = t4 + tm65
psubsw mm3, [x7] // t7 = x[0] - x[7]
psubsw mm4, mm6 // 6 // tm465 = t4 - tm65
movq mm0, qword ptr [tg_1_16] // 0 // tg_1_16
psllw mm3, SHIFT_FRW_COL // t7
movq mm6, qword ptr [tg_3_16] // 6 // tg_3_16
// PMULHRW mm0, mm1 // tp465*tg_1_16
/* EMIT 0x0f
EMIT 0x0f
EMIT 0xc1 //((0xc0 & 0x3f) << 3) | 0xc1
EMIT 0xb7 // tp465*(ebx + 0)
*/ pmulhw mm0, mm1
// PMULHRW( mm0, mm1 )// tp465*tg_1_16
movq [y0], mm7 // 7 // save y0
// PMULHRW mm6, mm4 // tm465*tg_3_16
/* EMIT 0x0f
EMIT 0x0f
EMIT 0xf4 //((0xc6 & 0x3f) << 3) | 0xc4
EMIT 0xb7 // tm465*(ebx + 16)
*/ pmulhw mm6, mm4
// PMULHRW( mm6, mm4 )// tm465*tg_3_16
movq [y6], mm5 // 5 // save y6
movq mm7, mm3 // 7 // t7
movq mm5, qword ptr [tg_3_16] // 5 // tg_3_16
psubsw mm7, mm2 // tm765 = t7 - tp65
paddsw mm3, mm2 // 2 // tp765 = t7 + tp65
// PMULHRW mm5, mm7 // tm765*tg_3_16
/* EMIT 0x0f
EMIT 0x0f
EMIT 0xef //((0xc5 & 0x3f) << 3) | 0xc7
EMIT 0xb7 // tm765*(ebx + 16)
*/ pmulhw mm5, mm7
// PMULHRW( mm5, mm7 )// tm765*tg_3_16
paddsw mm0, mm3 // y1 = tp765 + tp465*tg_1_16
paddsw mm6, mm4 // tm465*tg_3_16
// PMULHRW mm3, qword ptr [tg_1_16] // tp765*tg_1_16
/* EMIT 0x0f
EMIT 0x0f
EMIT 0x5b //(((0xc3 & 0x3f) << 3) | 0x03 | 0x40)
EMIT 0
EMIT 0xb7 // tp765*(ebx + 0)
*/ pmulhw mm3, qword ptr [tg_1_16]
// PMULHRWM( mm3, TG_ALL, TG_1_16_OFFSET )// tp765*tg_1_16
////
por mm0, qword ptr one_corr // correction y1 +0.5
paddsw mm5, mm7 // tm765*tg_3_16
psubsw mm7, mm6 // 6 // y3 = tm765 - tm465*tg_3_16
add INP, 0x08 // // increment pointer
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