i386-opc.h

window下的c编译器。

{"jpo", 1, 0x7b, _, Jump, Disp, 0, 0},

{"jl", 1, 0x7c, _, Jump, Disp, 0, 0},
{"jnge", 1, 0x7c, _, Jump, Disp, 0, 0},

{"jnl", 1, 0x7d, _, Jump, Disp, 0, 0},
{"jge", 1, 0x7d, _, Jump, Disp, 0, 0},

{"jle", 1, 0x7e, _, Jump, Disp, 0, 0},
{"jng", 1, 0x7e, _, Jump, Disp, 0, 0},

{"jnle", 1, 0x7f, _, Jump, Disp, 0, 0},
{"jg", 1, 0x7f, _, Jump, Disp, 0, 0},

/* these turn into pseudo operations when disp is larger than 8 bits */
#define IS_JUMP_ON_CX_ZERO(o) \
  (o == 0x67e3)
#define IS_JUMP_ON_ECX_ZERO(o) \
  (o == 0xe3)

{"jcxz", 1, 0x67e3, _, JumpByte, Disp, 0, 0},
{"jecxz", 1, 0xe3, _, JumpByte, Disp, 0, 0},

#define IS_LOOP_ECX_TIMES(o) \
  (o == 0xe2 || o == 0xe1 || o == 0xe0)

{"loop", 1, 0xe2, _, JumpByte, Disp, 0, 0},

{"loopz", 1, 0xe1, _, JumpByte, Disp, 0, 0},
{"loope", 1, 0xe1, _, JumpByte, Disp, 0, 0},

{"loopnz", 1, 0xe0, _, JumpByte, Disp, 0, 0},
{"loopne", 1, 0xe0, _, JumpByte, Disp, 0, 0},

/* set byte on flag instructions */
{"seto", 1, 0x0f90, 0, Modrm, Reg8|Mem, 0, 0},

{"setno", 1, 0x0f91, 0, Modrm, Reg8|Mem, 0, 0},

{"setb", 1, 0x0f92, 0, Modrm, Reg8|Mem, 0, 0},
{"setnae", 1, 0x0f92, 0, Modrm, Reg8|Mem, 0, 0},

{"setnb", 1, 0x0f93, 0, Modrm, Reg8|Mem, 0, 0},
{"setae", 1, 0x0f93, 0, Modrm, Reg8|Mem, 0, 0},

{"sete", 1, 0x0f94, 0, Modrm, Reg8|Mem, 0, 0},
{"setz", 1, 0x0f94, 0, Modrm, Reg8|Mem, 0, 0},

{"setne", 1, 0x0f95, 0, Modrm, Reg8|Mem, 0, 0},
{"setnz", 1, 0x0f95, 0, Modrm, Reg8|Mem, 0, 0},

{"setbe", 1, 0x0f96, 0, Modrm, Reg8|Mem, 0, 0},
{"setna", 1, 0x0f96, 0, Modrm, Reg8|Mem, 0, 0},

{"setnbe", 1, 0x0f97, 0, Modrm, Reg8|Mem, 0, 0},
{"seta", 1, 0x0f97, 0, Modrm, Reg8|Mem, 0, 0},

{"sets", 1, 0x0f98, 0, Modrm, Reg8|Mem, 0, 0},

{"setns", 1, 0x0f99, 0, Modrm, Reg8|Mem, 0, 0},

{"setp", 1, 0x0f9a, 0, Modrm, Reg8|Mem, 0, 0},
{"setpe", 1, 0x0f9a, 0, Modrm, Reg8|Mem, 0, 0},

{"setnp", 1, 0x0f9b, 0, Modrm, Reg8|Mem, 0, 0},
{"setpo", 1, 0x0f9b, 0, Modrm, Reg8|Mem, 0, 0},

{"setl", 1, 0x0f9c, 0, Modrm, Reg8|Mem, 0, 0},
{"setnge", 1, 0x0f9c, 0, Modrm, Reg8|Mem, 0, 0},

{"setnl", 1, 0x0f9d, 0, Modrm, Reg8|Mem, 0, 0},
{"setge", 1, 0x0f9d, 0, Modrm, Reg8|Mem, 0, 0},

{"setle", 1, 0x0f9e, 0, Modrm, Reg8|Mem, 0, 0},
{"setng", 1, 0x0f9e, 0, Modrm, Reg8|Mem, 0, 0},

{"setnle", 1, 0x0f9f, 0, Modrm, Reg8|Mem, 0, 0},
{"setg", 1, 0x0f9f, 0, Modrm, Reg8|Mem, 0, 0},

#define IS_STRING_INSTRUCTION(o) \
  ((o) == 0xa6 || (o) == 0x6c || (o) == 0x6e || \
   (o) == 0xac || (o) == 0xa4 || (o) == 0xae || (o) == 0xaa || \
   (o) == 0xd7)

/* string manipulation */
{"cmps", 0, 0xa6, _, W|NoModrm, 0, 0, 0},
{"ins", 0, 0x6c, _, W|NoModrm, 0, 0, 0},
{"outs", 0, 0x6e, _, W|NoModrm, 0, 0, 0},
{"lods", 0, 0xac, _, W|NoModrm, 0, 0, 0},
{"movs", 0, 0xa4, _, W|NoModrm, 0, 0, 0},
{"scas", 0, 0xae, _, W|NoModrm, 0, 0, 0},
{"stos", 0, 0xaa, _, W|NoModrm, 0, 0, 0},
{"xlat", 0, 0xd7, _, NoModrm, 0, 0, 0},

/* bit manipulation */
{"bsf", 2, 0x0fbc, _, Modrm|ReverseRegRegmem, Reg|Mem, Reg, 0},
{"bsr", 2, 0x0fbd, _, Modrm|ReverseRegRegmem, Reg|Mem, Reg, 0},
{"bt", 2, 0x0fa3, _, Modrm, Reg, Reg|Mem, 0},
{"bt", 2, 0x0fba, 4, Modrm, Imm8, Reg|Mem, 0},
{"btc", 2, 0x0fbb, _, Modrm, Reg, Reg|Mem, 0},
{"btc", 2, 0x0fba, 7, Modrm, Imm8, Reg|Mem, 0},
{"btr", 2, 0x0fb3, _, Modrm, Reg, Reg|Mem, 0},
{"btr", 2, 0x0fba, 6, Modrm, Imm8, Reg|Mem, 0},
{"bts", 2, 0x0fab, _, Modrm, Reg, Reg|Mem, 0},
{"bts", 2, 0x0fba, 5, Modrm, Imm8, Reg|Mem, 0},

/* interrupts & op. sys insns */
/* See i386.c for conversion of 'int $3' into the special int 3 insn. */
#define INT_OPCODE 0xcd
#define INT3_OPCODE 0xcc
{"int", 1, 0xcd, _, NoModrm, Imm8, 0, 0},
{"int3", 0, 0xcc, _, NoModrm, 0, 0, 0},
{"into", 0, 0xce, _, NoModrm, 0, 0, 0},
{"iret", 0, 0xcf, _, NoModrm, 0, 0, 0},

{"boundl", 2, 0x62, _, Modrm, Reg32, Mem, 0},
{"boundw", 2, 0x6662, _, Modrm, Reg16, Mem, 0},

{"hlt", 0, 0xf4, _, NoModrm, 0, 0, 0},
{"wait", 0, 0x9b, _, NoModrm, 0, 0, 0},
/* nop is actually 'xchgl %eax, %eax' */
{"nop", 0, 0x90, _, NoModrm, 0, 0, 0},

/* protection control */
{"arpl", 2, 0x63, _, Modrm, Reg16, Reg16|Mem, 0},
{"lar", 2, 0x0f02, _, Modrm|ReverseRegRegmem, WordReg|Mem, WordReg, 0},
{"lgdt", 1, 0x0f01, 2, Modrm, Mem, 0, 0},
{"lidt", 1, 0x0f01, 3, Modrm, Mem, 0, 0},
{"lldt", 1, 0x0f00, 2, Modrm, WordReg|Mem, 0, 0},
{"lmsw", 1, 0x0f01, 6, Modrm, WordReg|Mem, 0, 0},
{"lsl", 2, 0x0f03, _, Modrm|ReverseRegRegmem, WordReg|Mem, WordReg, 0},
{"ltr", 1, 0x0f00, 3, Modrm, WordReg|Mem, 0, 0},

{"sgdt", 1, 0x0f01, 0, Modrm, Mem, 0, 0},
{"sidt", 1, 0x0f01, 1, Modrm, Mem, 0, 0},
{"sldt", 1, 0x0f00, 0, Modrm, WordReg|Mem, 0, 0},
{"smsw", 1, 0x0f01, 4, Modrm, WordReg|Mem, 0, 0},
{"str", 1, 0x0f00, 1, Modrm, Reg16|Mem, 0, 0},

{"verr", 1, 0x0f00, 4, Modrm, WordReg|Mem, 0, 0},
{"verw", 1, 0x0f00, 5, Modrm, WordReg|Mem, 0, 0},

/* floating point instructions */

/* load */
{"fld", 1, 0xd9c0, _, ShortForm, FloatReg, 0, 0}, /* register */
{"flds", 1, 0xd9, 0, Modrm, Mem, 0, 0},           /* %st0 <-- mem float */
{"fildl", 1, 0xdb, 0, Modrm, Mem, 0, 0},           /* %st0 <-- mem word */
{"fldl", 1, 0xdd, 0, Modrm, Mem, 0, 0},           /* %st0 <-- mem double */
{"fldl", 1, 0xd9c0, _, ShortForm, FloatReg, 0, 0}, /* register */
{"filds", 1, 0xdf, 0, Modrm, Mem, 0, 0},           /* %st0 <-- mem dword */
{"fildq", 1, 0xdf, 5, Modrm, Mem, 0, 0},           /* %st0 <-- mem qword */
{"fldt", 1, 0xdb, 5, Modrm, Mem, 0, 0},           /* %st0 <-- mem efloat */
{"fbld", 1, 0xdf, 4, Modrm, Mem, 0, 0},           /* %st0 <-- mem bcd */

/* store (no pop) */
{"fst", 1, 0xddd0, _, ShortForm, FloatReg, 0, 0}, /* register */
{"fsts", 1, 0xd9, 2, Modrm, Mem, 0, 0},           /* %st0 --> mem float */
{"fistl", 1, 0xdb, 2, Modrm, Mem, 0, 0},           /* %st0 --> mem dword */
{"fstl", 1, 0xdd, 2, Modrm, Mem, 0, 0},           /* %st0 --> mem double */
{"fstl", 1, 0xddd0, _, ShortForm, FloatReg, 0, 0}, /* register */
{"fists", 1, 0xdf, 2, Modrm, Mem, 0, 0},           /* %st0 --> mem word */

/* store (with pop) */
{"fstp", 1, 0xddd8, _, ShortForm, FloatReg, 0, 0}, /* register */
{"fstps", 1, 0xd9, 3, Modrm, Mem, 0, 0},           /* %st0 --> mem float */
{"fistpl", 1, 0xdb, 3, Modrm, Mem, 0, 0},           /* %st0 --> mem word */
{"fstpl", 1, 0xdd, 3, Modrm, Mem, 0, 0},           /* %st0 --> mem double */
{"fstpl", 1, 0xddd8, _, ShortForm, FloatReg, 0, 0}, /* register */
{"fistps", 1, 0xdf, 3, Modrm, Mem, 0, 0},           /* %st0 --> mem dword */
{"fistpq", 1, 0xdf, 7, Modrm, Mem, 0, 0},           /* %st0 --> mem qword */
{"fstpt", 1, 0xdb, 7, Modrm, Mem, 0, 0},           /* %st0 --> mem efloat */
{"fbstp", 1, 0xdf, 6, Modrm, Mem, 0, 0},           /* %st0 --> mem bcd */

/* exchange %st<n> with %st0 */
{"fxch", 1, 0xd9c8, _, ShortForm, FloatReg, 0, 0},

/* comparison (without pop) */
{"fcom", 1, 0xd8d0, _, ShortForm, FloatReg, 0, 0},
{"fcoms", 1, 0xd8, 2, Modrm, Mem, 0, 0}, /* compare %st0, mem float  */
{"ficoml", 1, 0xda, 2, Modrm, Mem, 0, 0}, /* compare %st0, mem word  */ 
{"fcoml", 1, 0xdc, 2, Modrm, Mem, 0, 0}, /* compare %st0, mem double  */
{"fcoml", 1, 0xd8d0, _, ShortForm, FloatReg, 0, 0},
{"ficoms", 1, 0xde, 2, Modrm, Mem, 0, 0}, /* compare %st0, mem dword */

/* comparison (with pop) */
{"fcomp", 1, 0xd8d8, _, ShortForm, FloatReg, 0, 0},
{"fcomps", 1, 0xd8, 3, Modrm, Mem, 0, 0}, /* compare %st0, mem float  */
{"ficompl", 1, 0xda, 3, Modrm, Mem, 0, 0}, /* compare %st0, mem dword  */ 
{"fcompl", 1, 0xdc, 3, Modrm, Mem, 0, 0}, /* compare %st0, mem double  */
{"fcompl", 1, 0xd8d8, _, ShortForm, FloatReg, 0, 0},
{"ficomps", 1, 0xde, 3, Modrm, Mem, 0, 0}, /* compare %st0, mem word */
{"fcompp", 0, 0xded9, _, NoModrm, 0, 0, 0}, /* compare %st0, %st1 & pop twice */

/* unordered comparison (with pop) */
{"fucom", 1, 0xdde0, _, ShortForm, FloatReg, 0, 0},
{"fucomp", 1, 0xdde8, _, ShortForm, FloatReg, 0, 0},
{"fucompp", 0, 0xdae9, _, NoModrm, 0, 0, 0}, /* ucompare %st0, %st1 & pop twice */

{"ftst", 0, 0xd9e4, _, NoModrm, 0, 0, 0},   /* test %st0 */
{"fxam", 0, 0xd9e5, _, NoModrm, 0, 0, 0},   /* examine %st0 */

/* load constants into %st0 */
{"fld1", 0, 0xd9e8, _, NoModrm, 0, 0, 0},   /* %st0 <-- 1.0 */
{"fldl2t", 0, 0xd9e9, _, NoModrm, 0, 0, 0},   /* %st0 <-- log2(10) */
{"fldl2e", 0, 0xd9ea, _, NoModrm, 0, 0, 0},   /* %st0 <-- log2(e) */
{"fldpi", 0, 0xd9eb, _, NoModrm, 0, 0, 0},   /* %st0 <-- pi */
{"fldlg2", 0, 0xd9ec, _, NoModrm, 0, 0, 0},   /* %st0 <-- log10(2) */
{"fldln2", 0, 0xd9ed, _, NoModrm, 0, 0, 0},   /* %st0 <-- ln(2) */
{"fldz", 0, 0xd9ee, _, NoModrm, 0, 0, 0},   /* %st0 <-- 0.0 */

/* arithmetic */

/* add */
{"fadd", 1, 0xd8c0, _, ShortForm, FloatReg, 0, 0},
{"fadd", 2, 0xd8c0, _, ShortForm|FloatD, FloatReg, FloatAcc, 0},
{"fadd", 0, 0xdcc1, _, NoModrm, 0, 0, 0}, /* alias for fadd %st, %st(1) */
{"faddp", 1, 0xdac0, _, ShortForm, FloatReg, 0, 0},
{"faddp", 2, 0xdac0, _, ShortForm|FloatD, FloatReg, FloatAcc, 0},
{"faddp", 0, 0xdec1, _, NoModrm, 0, 0, 0}, /* alias for faddp %st, %st(1) */
{"fadds", 1, 0xd8, 0, Modrm, Mem, 0, 0},
{"fiaddl", 1, 0xda, 0, Modrm, Mem, 0, 0},
{"faddl", 1, 0xdc, 0, Modrm, Mem, 0, 0},
{"fiadds", 1, 0xde, 0, Modrm, Mem, 0, 0},

/* sub */
/* Note:  intel has decided that certain of these operations are reversed
   in assembler syntax. */
{"fsub", 1, 0xd8e0, _, ShortForm, FloatReg, 0, 0},
{"fsub", 2, 0xd8e0, _, ShortForm, FloatReg, FloatAcc, 0},
#ifdef NON_BROKEN_OPCODES
{"fsub", 2, 0xdce8, _, ShortForm, FloatAcc, FloatReg, 0},
#else
{"fsub", 2, 0xdce0, _, ShortForm, FloatAcc, FloatReg, 0},
#endif
{"fsub", 0, 0xdce1, _, NoModrm, 0, 0, 0},
{"fsubp", 1, 0xdae0, _, ShortForm, FloatReg, 0, 0},
{"fsubp", 2, 0xdae0, _, ShortForm, FloatReg, FloatAcc, 0},
#ifdef NON_BROKEN_OPCODES
{"fsubp", 2, 0xdee8, _, ShortForm, FloatAcc, FloatReg, 0},
#else
{"fsubp", 2, 0xdee0, _, ShortForm, FloatAcc, FloatReg, 0},
#endif
{"fsubp", 0, 0xdee1, _, NoModrm, 0, 0, 0},
{"fsubs", 1, 0xd8, 4, Modrm, Mem, 0, 0},
{"fisubl", 1, 0xda, 4, Modrm, Mem, 0, 0},
{"fsubl", 1, 0xdc, 4, Modrm, Mem, 0, 0},
{"fisubs", 1, 0xde, 4, Modrm, Mem, 0, 0},

/* sub reverse */
{"fsubr", 1, 0xd8e8, _, ShortForm, FloatReg, 0, 0},
{"fsubr", 2, 0xd8e8, _, ShortForm, FloatReg, FloatAcc, 0},
#ifdef NON_BROKEN_OPCODES
{"fsubr", 2, 0xdce0, _, ShortForm, FloatAcc, FloatReg, 0},
#else
{"fsubr", 2, 0xdce8, _, ShortForm, FloatAcc, FloatReg, 0},
#endif
{"fsubr", 0, 0xdce9, _, NoModrm, 0, 0, 0},
{"fsubrp", 1, 0xdae8, _, ShortForm, FloatReg, 0, 0},
{"fsubrp", 2, 0xdae8, _, ShortForm, FloatReg, FloatAcc, 0},
#ifdef NON_BROKEN_OPCODES
{"fsubrp", 2, 0xdee0, _, ShortForm, FloatAcc, FloatReg, 0},
#else
{"fsubrp", 2, 0xdee8, _, ShortForm, FloatAcc, FloatReg, 0},
#endif
{"fsubrp", 0, 0xdee9, _, NoModrm, 0, 0, 0},
{"fsubrs", 1, 0xd8, 5, Modrm, Mem, 0, 0},
{"fisubrl", 1, 0xda, 5, Modrm, Mem, 0, 0},
{"fsubrl", 1, 0xdc, 5, Modrm, Mem, 0, 0},
{"fisubrs", 1, 0xde, 5, Modrm, Mem, 0, 0},

/* mul */
{"fmul", 1, 0xd8c8, _, ShortForm, FloatReg, 0, 0},
{"fmul", 2, 0xd8c8, _, ShortForm|FloatD, FloatReg, FloatAcc, 0},
{"fmul", 0, 0xdcc9, _, NoModrm, 0, 0, 0},
{"fmulp", 1, 0xdac8, _, ShortForm, FloatReg, 0, 0},
{"fmulp", 2, 0xdac8, _, ShortForm|FloatD, FloatReg, FloatAcc, 0},
{"fmulp", 0, 0xdec9, _, NoModrm, 0, 0, 0},
{"fmuls", 1, 0xd8, 1, Modrm, Mem, 0, 0},
{"fimull", 1, 0xda, 1, Modrm, Mem, 0, 0},
{"fmull", 1, 0xdc, 1, Modrm, Mem, 0, 0},
{"fimuls", 1, 0xde, 1, Modrm, Mem, 0, 0},

/* div */
/* Note:  intel has decided that certain of these operations are reversed
   in assembler syntax. */
{"fdiv", 1, 0xd8f0, _, ShortForm, FloatReg, 0, 0},