📄 codec_processing_isr_c.asm
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/* **************************************************************************************************
/ /
/ AD1819A - SPORT1 TX INTERRUPT SERVICE ROUTINE /
/
****************************************************************************************************/
/* ADSP-21060 System Register bit definitions */
#include "def21065l.h"
#include "new65Ldefs.h"
#include <asm_sprt.h>
#include <lib_glob.h>
#include "myasmhead.h"
/* AD1819 TDM Timeslot Definitions */
#define TAG_PHASE 0
#define COMMAND_ADDRESS_SLOT 1
#define COMMAND_DATA_SLOT 2
#define STATUS_ADDRESS_SLOT 1
#define STATUS_DATA_SLOT 2
#define LEFT 3
#define RIGHT 4
/* Left and Right valid and request bits used for testing of valid audio data in current TDM frame */
#define M_Left_ADC 12
#define M_Right_ADC 11
#define DAC_Req_Left 0x80
#define DAC_Req_Right 0x40
.EXTERN _tx_buf;
.EXTERN _rx_buf;
.EXTERN _my_iir;
.segment /dm seg_dmda;
/* AD1819a stereo-channel data holders and flags - used for DSP processing of recieved codec audio data */
.global _Left_Channel_In, _Right_Channel_In, _Left_Channel_Out, _Right_Channel_Out;
.global _RX_left_flag, _RX_right_flag;
.global _sample;
.global _fil_out;
.global _y0;
.global _y1;
.global _aa;
.global _data_line1;
.global _data_dptr1;
.global _data_line2;
.global _data_dptr2;
.var _Left_Channel_In;
.var _Right_Channel_In;
.var _Left_Channel_Out;
.var _Right_Channel_Out;
.var _RX_left_flag = 0x00000000;
.var _RX_right_flag = 0x00000000;
.var ADC_Valid_Bits;
.var _sample;
.var _fil_out;
.var _y0=0;//0.130526192;//
.var _y1=0;//0.258819045;//
.var _aa=0;//1.982889723;//
.var _data_line1[128];
.var _data_dptr1;
.var _data_line2[128];
.var _data_dptr2;
.var _pw_128;
.var _pw_h=65.0;
/* AC'97 audio frame/ISR counter, for debug purposes */
.VAR audio_frame_timer = 0;
.endseg;
.segment /pm seg_pmco;
.GLOBAL _Record_AD1819A_audio_input;
_Record_AD1819A_audio_input:
leaf_entry
//save_reg;
put(r0);
put(r1);
put(r2);
put(r4);
put(r8);
put(r12);
/* Build Transmit Tag Phase Slot Information */
r0 = 0x8000; /* Set Valid Frame bit in slot 0 tag phase */
dm(_tx_buf + TAG_PHASE) = r0; /* Write tag to tx-buf ASAP before it is shifted out of SPORT! */
r0 = 0; /* Clear all AC97 link Audio Output Frame slots for now */
dm(_tx_buf + COMMAND_ADDRESS_SLOT) = r0;
dm(_tx_buf + COMMAND_DATA_SLOT) = r0;
dm(_tx_buf + LEFT) = r0;
dm(_tx_buf + RIGHT) = r0;
check_ADCs_for_valid_data:
r0 = dm(_rx_buf + TAG_PHASE); /* Get ADC valid bits from tag phase slot*/
r1 = 0x1800; /* Inspect for valid L/R ADC data */
r2 = r0 and r1; /* Mask other bits in tag */
dm(ADC_Valid_Bits) = r2; /* save for codec data tx section of this ISR */
set_tx_slot_valid_bits:
r1 = dm(_tx_buf + TAG_PHASE); /* set tx valid bits based on ADC valid bits info */
r2 = r2 or r1; /* set left/right channel Valid Slot bits in tag slot 0, if required */
dm(_tx_buf + TAG_PHASE) = r2; /* Write tag to tx-buf slot0 ASAP before it's DMA'ed & shifted out of SPORT! */
check_AD1819_ADC_left:
BTST r0 by M_Left_ADC; /* Check Master left ADC valid bit */
IF sz JUMP check_AD1819_ADC_right; /* If valid data then save ADC sample */
r8 = dm(_rx_buf + LEFT); /* get Master 1819 left channel input sample */
r8 = lshift r8 by 16; /* shift up to MSBs to preserve sign in 1.31 format */
dm(_Left_Channel_In) = r8; /* save to data holder for processing */
r4=-31;
f8=float r8 by r4;
dm(_sample)=f8;
r4 = 1;
dm(_RX_left_flag) = r4; /* if we have a new left sample, let the C processing routine know */
check_AD1819_ADC_right:
BTST r0 by M_Right_ADC; /* Check Master right ADC valid bit */
IF sz jump RXEnd; /* If valid data then save ADC sample */
r8 = dm(_rx_buf + RIGHT); /* get Master 1819 right channel input sample */
r8 = lshift r8 by 16; /* shift up to MSBs to preserve sign in 1.31 format */
dm(_Right_Channel_In) = r8; /* save to data holder for processing */
r4 = 1;
dm(_RX_right_flag) = r4; /* if we have a new right sample, let the C processing routine know */
R0 = DM(_Left_Channel_In);
R1 = DM(_Right_Channel_In);
r2=-30;
f4=float r0 by r2;
// f0=dm(_aa); //A
// f8=dm(_y1); //y1
// f0=f0*f8; //A*y1
// f2=dm(_y0); //y0
// f4=f0-f2; //y2=A*y1-y0
// dm(_y0)=f8; //y0=y1
// dm(_y1)=f4; //y1=y2
////////////////////////////////
/*
B1=_data_line1;
L1=128;
r0=dm(_data_dptr1);
I1=r0;
B2=_data_line2;
L2=128;
r0=dm(_data_dptr2);
I2=r0;
//==========//
f0=f4;
dm(I2,1)=f4;
f2=f4;
f0=f0*f2; //xn*xn
f2=dm(_pw_128); //p=p+xn*xn
f0=f0+f2; //p=p+xn*xn
f2=dm(0,I2); //x0
f8=f2;
f2=f2*f8; //x0*x0
f0=f0-f2; //p=p+xn*xn-x0*x0
dm(_pw_128)=f0;
f8=dm(_pw_h); //ph--80.0;//
f0=f0-f8; //p>ph?
f2=pass f0;
if lt jump no_limit;
f8=0.25;
//f4=f4*f8;
no_limit:
dm(I1,1)=f4;
f4=dm(0,I1);
R0=I1;
dm(_data_dptr1)=r0;
r0=I2;
dm(_data_dptr2)=r0;
*/
////////////////////////////////
r1=_b_eq_1;//_b_filter1;//
r2=_w_eq_1;//_w_filter1;//
r8=_a_eq_1;//_a_filter1;//
r12=2;//4;//
// dm(_sample)=f4;
call _my_iir;
//--------------------------//
// f4=f0;
// r1=_b_eq_2;//_b_filter1;//
// r2=_w_eq_2;//_w_filter1;//
// r8=_a_eq_2;//_a_filter1;//
// r12=2;//4;//
// call _my_iir;
////////////////////////////////
r2=30;//28;//
r1=fix f0 by r2;
DM(_Right_Channel_Out)=r1;
r1=-r1;
DM(_Left_Channel_Out)=r1;
//RXEnd: leaf_exit;
/* ---- AD1819A Samples Received, now we process data in our C program ---- */
/* -------------------------------------------------------------------------------------------- */
/* user_applic( ) - User Applications Routines */
/* *** Insert DSP Algorithms Here *** */
/* */
/* Input L/R Data Streams - DM(_Left_Channel_In) DM(_Right_Channel_In) */
/* Output L/R Results - DM(_Left_Channel_Out) DM(_Right_Channel_Out) */
/* */
/* These left/right data holders are used to pipeline data through multiple modules, and */
/* can be removed if the dsp programmer needs to save instruction cycles */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
/* Coding TIP: */
/* The samples from the AD1819A are 16-bit and are in the lower 16 bits of the the 32-bit */
/* word. They are shifted to the most significant bit positions in order to preserve the */
/* sign of the samples when they are converted to floating point numbers. The values are */
/* also scaled to the range +/-1.0 with the integer to float conversion */
/* (f0 = float r0 by r1). */
/* */
/* To convert between our assumed 1.31 fractional number and IEEE floating point math, */
/* here are some example assembly instructions ... */
/* */
/* r1 = -31 <-- scale the sample to the range of +/-1.0 */
/* r0 = DM(Left_Channel); */
/* f0 = float r0 by r1; */
/* [Call Floating_Point_Algorithm] */
/* r1 = 31; <-- scale the result back up to MSBs */
/* r8 = fix f8 by r1; */
/* DM(Left_Channel) = r8; */
/* */
/* The C Compiler will handle the conversion of fixed to floats & floats to fixed. So */
/* in this case, the programmer does not have to provide these asm instructions */
/* to manually convert the data */
/* -------------------------------------------------------------------------------------------- */
/* ---- DSP processing is finished, now playback results to AD1819 ---- */
.GLOBAL _playback_audio_data;
_playback_audio_data:
// leaf_entry
check_ADC_valid_bits:
/* Transmit Left and Right Valid Data every time there the ADCs have valid data */
/* ADC valid bits were fetched from rx portion of this ISR */
r2 = dm(ADC_Valid_Bits);
tx_AD1819_DAC_left:
BTST r2 by M_Left_ADC; /* Check to see if we need to send DAC right sample */
IF sz JUMP tx_AD1819_DAC_right; /* If valid data then transmit DAC sample */
r12 = dm(_Left_Channel_Out); /* get channel 1 output result */
r12 = lshift r12 by -16; /* put back in bits 0..15 for SPORT tx */
dm(_tx_buf + LEFT) = r12; /* output right result to AD1819a Slot 3 */
tx_AD1819_DAC_right:
BTST r2 by M_Right_ADC; /* Check to see if we need to send DAC right sample */
If sz jump tx_done; /* If valid data then transmit DAC sample */
r12 = dm(_Right_Channel_Out); /* get channel 2 output result */
r12 = lshift r12 by -16; /* put back in bits 0..15 for SPORT tx */
dm(_tx_buf + RIGHT) = r12; /* output right result to AD1819a Slot 4 */
tx_done:
r0=dm(audio_frame_timer); /* get last count */
r0=r0+1; /* increment count */
dm(audio_frame_timer)=r0; /* save updated count */
outpop(r12);
outpop(r8);
outpop(r4);
outpop(r2);
outpop(r1);
outpop(r0);
//restore_reg;
tx_end:
// leaf_exit;
RXEnd: leaf_exit;
/* ----------------------------------------------------------------------------------------- */
.endseg;
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