cpuconf.c

<B>Digital的Unix操作系统VAX 4.2源码</B>

int	ka9000memenable();
int	ka9000cachenbl();
int	ka9000umaddr();
int	ka9000udevaddr();
int	ka9000machcheck();
int	ka9000logsbi();
int	ka9000conf();
int     ka9000startcpu();
int     ka9000stopcpu();
int	ka9000memerr();
int	ka9000setcache();
int	ka9000memenable();
int	ka9000tocons();
int     ka9000cachenbl();
int	ka9000umaddr();
int	ka9000udevaddr();
int	*ka9000_ip;
#else
ka9000halt()  { /* call out of machdep */}
ka9000mapcsr() { /* map xja registers on VAX9000 */}
ka9000reboot()  { /* call out of machdep */}
ka9000_clear_xbe()  { /* call out of machdep */}
ka9000_rxfct_isr()  { /* called out of locore */ }
ka9000_reinit_spu()  { /* called out of cons.c */ }
ka9000_enable_errlog()  { /* called out of kern_errlog.c */ }
ka9000_clear_coldstart() { /* Called during startup */ }
ka9000_clear_warmstart() { /* called during startup */ }
#endif VAX9000

#if defined(VAX6200) || defined(VAX60) || defined(VAX6400) || defined(VAX3600)
int     cca_startcpu();
int     cca_stopcpu();
#else
int     cca_check_input() {/* */}
#endif

#ifdef VVAX
int 	vvaxmachcheck();
int 	vvaxsetcache();
int 	vvaxbadaddr();
int 	vvaxnexaddr();
int 	vvaxumaddr();
int 	vvaxudevaddr();
int 	vvaxdelay();
int	vvaxconf();
int 	vvaxtocons();
int	vvaxreadtodr();
int	vvaxwritetodr();
#else
/* No-op functions for clean link without VVAX option */
#include "../h/time.h"
struct timeval *get_vvax_time() { /* Should never be called */
	static struct timeval its_1970={ 0L, 0L };
	return &its_1970;
} /* keep kernclock.c happy */
int vvaxdump() {} /* keep locore.s happy */
#endif VVAX

#else vax	/* VAXes end here */

#ifdef DS3100
/* We are linking with kn01.o */
extern int	kn01conf();
extern int	kn01delay();
extern int	kn01ackrtclock();
extern int	kn01trap_error();
extern int	kn01memintr();
extern int	kn01flush_cache();
extern int	kn01_clean_icache();
extern int	kn01_clean_dcache();
extern int	kn01_page_iflush();
extern int	kn01_page_dflush();
extern int	kn01wbflush();
extern int	chk_cpe();
extern int	mc146818read_todclk();
extern int	mc146818write_todclk();
extern int	mc146818startclocks();
extern int	mc146818stopclocks();
extern int	mc146818ackrtclock();
extern int	kn01init();
extern int	msize_baddr();
extern int	wbadmemaddr();
extern int	kn01_getspl();
extern int	kn01_whatspl();
#else
/* Resolve dangling references */
int	parityerr;	
pmopen() {}
pmclose() {}
pmstop() {}
pmioctl() {}
#endif


#ifdef DS5100
/* We are linking with kn230.o */
extern int	kn230_conf();
extern int	kn230_delay();
extern int	kn01ackrtclock();
extern int	kn230_trap_error();
extern int	kn230_memintr();
extern int	kn01flush_cache();
extern int	kn01_clean_icache();
extern int	kn01_clean_dcache();
extern int	kn01_page_iflush();
extern int	kn01_page_dflush();
extern int	kn210wbflush();
extern int	chk_cpe();
extern int	mc146818read_todclk();
extern int	mc146818write_todclk();
extern int	mc146818startclocks();
extern int	mc146818stopclocks();
extern int	mc146818ackrtclock();
extern int	kn230_init();
extern int	msize_bitmap();
extern int	wbadmemaddr();
extern int	kn01_getspl();
extern int	kn01_whatspl();
#else
/* Resolve dangling references */
#endif

#ifdef DS5400
/* We are linking with kn210.o */
extern int	chk_cpe();
extern int	kn210conf();
extern int	kn210wbflush();
extern int	kn210trap_error();
extern int	kn210harderrintr();
extern int	kn01flush_cache();
extern int	kn01_clean_icache();
extern int	kn01_clean_dcache();
extern int	kn01_page_iflush();
extern int	kn01_page_dflush();
extern int	ssc_readtodr();
extern int	ssc_writetodr();
extern int	uSSCdelay();
extern int	kn210startrtclock();
extern int	kn210stopclocks();
extern int	bbadaddr();
extern int	msize_baddr();
extern int	kn210init();
extern int	kn01_getspl();
extern int	kn01_whatspl();
#else
/* Add the stubs for dangling references */
int kn210hardintr0() {}
int kn210hardintr1()	{}
int kn210hardintr2() {}
int kn210hardintr3()	{}
int kn210harderrintr() {}
int kn210haltintr() {}
#endif DS5400

#ifdef	DS5800
/* We are linking with kn5800.o */
extern int	chk_cpe();
extern int	kn5800_conf();
extern int	kn5800_flush_cache();
extern int	kn5800_clean_icache();
extern int	kn5800_clean_dcache();
extern int	kn5800_page_iflush();
extern int	kn5800_page_dflush();
extern int	kn5800_enable_cache();
extern int	kn5800badaddr();
extern int	kn5800_intr3();
extern int	kn5800_trap_error();
extern int	kn5800_wbflush();
extern int	kn5800flush_cache();
extern int	uSSCdelay();
extern int	kn5800_start_clock();
extern int	kn5800_stop_clock();
extern int	reprime_ssc_clock();
extern int	kn5800nexaddr();
extern int	kn5800udevaddr();
extern int	kn5800umaddr();
extern int	msize_bitmap();
extern int	kn5800_init();
extern int	cca_startcpu();
extern int	kn01_getspl();
extern int	kn01_whatspl();
extern int	kn5800_init_secondary();
#else	DS5800
struct	v5800csr *v5800csr;
int	*kn5800_wbflush_addr;
int	wbflush_dummy;
nxaccess() {}
kn5800_cpuid() {};
bbcci() {};
bbssi() {};
kn5800_init_secondary() {};
#endif	DS5800

#ifdef DS5000
/* We are linking with kn02.o */
extern int	kn02conf();
extern int	kn02delay();
extern int	kn02trap_error();
extern int	kn02errintr();
extern int	kn01flush_cache();
extern int	kn01_clean_icache();
extern int	kn01_clean_dcache();
extern int	kn01_page_iflush();
extern int	kn01_page_dflush();
extern int	kn01wbflush();
extern int	mc146818read_todclk();
extern int	mc146818write_todclk();
extern int	mc146818startclocks();
extern int	mc146818stopclocks();
extern int	mc146818ackrtclock();
extern int	msize_bitmap();
extern int	kn02init();
extern int	bbadaddr();
extern int	chk_cpe();
extern int	kn01_getspl();
extern int	kn01_whatspl();
extern int      kn02_print_consinfo();
extern int      kn02_log_errinfo();
#else
int kn02erradr;
int kn02chksyn;
#endif DS5000

#if !defined(DS5000) && !defined(DS5000_100)
struct tc_slot		*tc_slot;
struct tc_slotaddr	*tc_slotaddr;
struct tc_sw		*tc_sw;
u_int			*tc_romoffset;
int tc_addr_to_name()	{}
int tc_isolate_memerr()	{}
#endif

#ifdef DS5500
/* We are linking with kn220.o */
extern int	chk_cpe();
extern int	kn220conf();
extern int	kn220wbflush();
extern int	kn220trap_error();
extern int	kn220memintr();
extern int	kn01flush_cache();
extern int	kn01_clean_icache();
extern int	kn01_clean_dcache();
extern int	kn01_page_iflush();
extern int	kn01_page_dflush();
extern int	ssc_readtodr();
extern int	ssc_writetodr();
extern int	uSSCdelay();
extern int	kn220startrtclock();
extern int	kn220stopclocks();
extern int	kn220badaddr();
extern int	msize_bitmap();
extern int	kn220init();
extern int	kn01_getspl();
extern int	kn01_whatspl();
extern int	kn220_print_consinfo();
extern int	kn220_log_errinfo();
#else
/* Add the stubs for dangling references */
int kn220hardintr0() {}
int kn220hardintr1()	{}
int kn220hardintr2() {}
int kn220hardintr3()	{}
int kn220memintr() {}
int kn220haltintr() {}
int kn220badaddr() {}
#endif DS5500

#ifdef DS5000_100
/* We are linking with kn02ba.o */
extern int	kn02ba_conf();
extern int	kn02ba_delay();
extern int	kn02ba_trap_error();
extern int	kn02ba_errintr();
extern int	kn01flush_cache();
extern int	kn01_clean_icache();
extern int	kn01_clean_dcache();
extern int	kn01_page_iflush();
extern int	kn01_page_dflush();
extern int	kn02ba_print_consinfo();
extern int	kn02ba_log_errinfo();
extern int	kn02ba_wbflush();
extern int	mc146818read_todclk();
extern int	mc146818write_todclk();
extern int	mc146818startclocks();
extern int	mc146818stopclocks();
extern int	mc146818ackrtclock();
extern int	msize_bitmap();
extern int	kn02ba_init();
extern int	bbadaddr();
extern int	chk_cpe();
extern int	kn02ba_getspl();
extern int	kn02ba_whatspl();
#else
int kn02ba_exception_exit()	{}
#endif DS5000_100

#endif vax	/* if - else - endif - Add machine support to proper area */


struct cpusw	cpusw[] =
{
#ifdef VAX780
    {	VAX_780,		ka780machcheck,		ka780logsbi,
	ka780memerr,		ka780memenable,		ka780tocons,
	nullcpu,		ka780conf,		ka780cachenbl,	
	nullcpu,		nullcpu,		bbadaddr,
	readtodr,		writetodr,		uICRdelay,
	nullcpu,		nullcpu,		nullcpu,
	nullcpu,		nullcpu,		nullcpu,
	ka780nexaddr,		ka780umaddr,		ka780udevaddr,
	nullcpu,		nullcpu,		ka780setcache,
	UMEMSIZE780,		1,			10000,
	NNEX780,		NEXSIZE,		0,
	0,			0,			0,
	CPU_ICR },
#endif VAX780

#ifdef VAX750
    {	VAX_750,		ka750machcheck,		nullcpu,
	ka750memerr,		ka750memenable,		ka750tocons,
	nullcpu,		ka750conf,		ka750cachenbl,	
	nullcpu,		nullcpu,		bbadaddr,
	readtodr,		writetodr,		uICRdelay,
	nullcpu,		nullcpu,		nullcpu,
	nullcpu,		nullcpu,		nullcpu,
	ka750nexaddr,		ka750umaddr,		ka750udevaddr,
	nullcpu,		nullcpu,		ka750setcache,
	UMEMSIZE750,		0,			10000,
	NNEX750,		NEXSIZE,		nexty750,
	0,			0,			0,
	CPU_ICR },
#endif VAX750

#ifdef VAX730
    {	VAX_730,		ka730machcheck,		nullcpu,
	ka730memerr,		ka730memenable,		ka730tocons,
	nullcpu,		ka730conf,		nullcpu,	
	nullcpu,		nullcpu,		bbadaddr,
	readtodr,		writetodr,		uICRdelay,
	nullcpu,		nullcpu,		nullcpu,
	nullcpu,		nullcpu,		nullcpu,
	ka730nexaddr,		ka730umaddr,		ka730udevaddr,
	nullcpu,		nullcpu,		nullcpu,
	UMEMSIZE730,		0,			10000,
	NNEX730,		NEXSIZE,		nexty730,
	0,			 0,			0,
	CPU_ICR },
#endif VAX730

#ifdef VAX8600
	{ VAX_8600,		ka8600machcheck,	ka8600logsbi,
	ka8600memerr,		ka8600memenable,	ka8600tocons,
	nullcpu,		ka8600conf,		ka8600cachenbl,	
	nullcpu,		nullcpu,		bbadaddr,
	readtodr,		writetodr,		uICRdelay,
	nullcpu,		nullcpu,		nullcpu,
	nullcpu,		nullcpu,		nullcpu,
	ka8600nexaddr,		ka8600umaddr,		ka8600udevaddr,
	nullcpu,		nullcpu,		ka8600setcache,
	UMEMSIZE8600,		1,			10000,
	NNEX8600,		NEXSIZE,		0,
	NIOA8600,		ioaaddr8600,		IOAMAPSIZ,
	CPU_ICR	},
#endif VAX8600

#ifdef MVAX
    {	MVAX_I,			ka610machcheck,		nullcpu,
	nullcpu,		nullcpu,		ka610tocons,
	nullcpu,		ka610conf,		ka610cachenbl,	
	nullcpu,		nullcpu,		bbadaddr,
	readtodr,		writetodr,		uInoICRdelay,
	nullcpu,		nullcpu,		nullcpu,
	nullcpu,		nullcpu,		nullcpu,
	ka610nexaddr,		ka610umaddr,		ka610udevaddr,
	nullcpu,		nullcpu,		ka610setcache,
	QMEMSIZEUVI,		1,			10000,
	NNEXUVI,		NEXSIZE,		nextyUVI,
	0,			0,			0,
	0 },

    {	MVAX_II,		ka630machcheck,		nullcpu,
	nullcpu,		nullcpu,		ka630tocons,