📄 ka420.c
字号:
#ifndef lintstatic char *sccsid = "@(#)ka420.c 4.2 (ULTRIX) 10/10/90";#endif lint/************************************************************************ * * * Copyright (c) 1987,88 by * * Digital Equipment Corporation, Maynard, MA * * All rights reserved. * * * * This software is furnished under a license and may be used and * * copied only in accordance with the terms of such license and * * with the inclusion of the above copyright notice. This * * software or any other copies thereof may not be provided or * * otherwise made available to any other person. No title to and * * ownership of the software is hereby transferred. * * * * The information in this software is subject to change without * * notice and should not be construed as a commitment by Digital * * Equipment Corporation. * * * * Digital assumes no responsibility for the use or reliability * * of its software on equipment which is not supplied by Digital. * * * ************************************************************************//*********************************************************************** * * Modification History: ka420.c * * 18-Apr-90 Tony Griffiths, TaN Engineering (Australia) * * Add code to allow config of the dsh (DST32/DSH32 Sync) device * driver on the uVAX-3100. * * 02-Dec-89 Fred Canter * Added code to config "sp" pseudo driver for user devices. * * 27-Nov-89 Paul Grist * added frame_type argument to logmck() calls. * * 24-May-89 darrell * Changed the #include for cpuconf.h to find it in it's new home -- * sys/machine/common/cpuconf.h * * 24-May-89 darrell * Removed the v_ prefix from all cpusw fields, removed cpup from any * arguments being passed in function args. cpup is now defined * globally -- as part of the new cpusw. * * 03-May-89 -- gmm (v3.1 merge) * Added support for TMII (MicroVAX 3100). If cpu_sub_subtype indicates * SB_TMII, set cvs_cache_on to 1 to indicate only primary cache * * 15-Feb-89 -- afd (Al Delorey) * Re-sync with VAX 3.0 for 3.2 pool merge. * * 31-Jan-89 -- map (Mark Parenti) * Change include syntax for merged pool. * * 25-Sep-88 -- fred (Fred Canter) * Remove sz_setcache debug code and cleanup comments. * * 07-Jun-88 -- fred (Fred Canter) * Back out SCSI/SCSI controller address change (hardware * changed their mind). * * 07-Jun-88 -- fred (Fred Canter) * Bug fix for cvs_cache_on global undefined if VAX420 not configured. * * 06-jun-88 -- fred (Fred Canter) * Use different address for SCSI/SCSI controller. * * 31-May-88 -- afd (Al Delorey) * Fixed machine check & CRD interrupt (cache tag parity) error * handling code. * Log errors and recover when possible. * TODO: terminate user-mode processes. * * 19-May-88 -- fred (Fred Canter) * Minor code and comment cleanup. * Made cvs_cache_on permanent feature. * Added autoconf support for SCSI devices. * * 11-Nov-87 -- fred (Fred Canter) * Created this machine dependent code file for CVAXstar * (based on CVAX ka650.c). * **********************************************************************/#include "../h/types.h"#include "../h/time.h"#include "../machine/cons.h"#include "../machine/clock.h"/*#include "uba.h"*/#include "../machine/pte.h"#include "../h/param.h"#include "../h/systm.h"#include "../h/user.h"#include "../h/vmmac.h"#include "../h/map.h"#include "../h/buf.h"#include "../h/dk.h"#include "../h/vm.h"#include "../h/conf.h"#include "../h/reboot.h"#include "../h/devio.h"#include "../h/errlog.h"#include "../io/uba/qdioctl.h" /* for QD_KERN_UNLOOP below */#include "../machine/cpu.h"#include "../machine/mem.h"#include "../machine/mtpr.h"#include "../machine/ioa.h"#include "../machine/nexus.h"#include "../machine/scb.h"#include "../io/uba/ubareg.h"#include "../io/uba/ubavar.h"#include "../../machine/common/cpuconf.h"extern int ws_display_type; /* type of console on workstations *//* * TODO: it would be nice to clean up the arrangement of these #defines. * * Parity Control Register (PAR_CTL) bit definitions * */#define PAR_CTL_DPEN 0x00000001 /* DMA parity enable (bit 0) */#define PAR_CTL_CPEN 0x00000002 /* CPU parity enable (bit 1) */#define PAR_CTL_DMA 0x01000000 /* LANCE chip DMA control (bit 24) *//* * Time limits for errors. Recoverable errors are fatal if 3 errors occur * within the time period. All times are given in 10 ms units (100ths of secs) * to be used with the 10ms units of the standard VAX TODR. */#define TIME_THRESH 100 /* 1 sec max for most error types */#define TIME_THRESH_C1 6000 /* 60 sec max for 1st lev cache errs */#define TIME_THRESH_C2 30000 /* 5 mins max for 2nd lev cache errs *//* * These structures are used to keep track of the frequency of errors. * We keep the time of the last 2 errors for each category. * When a third error occurs, if the time elapsed since the "prev" one * is less than 1 second, then we got 3 errors (prev, last, current) * within 1 second. */struct cfpa_errcnt { /* machine checks 1 thru 4 (& 5-8) */ u_int cfpa_last; /* time of most recent CFPA error */ u_int cfpa_prev; /* time of previous CFPA error */};struct dal_errcnt { /* MSER_MCD */ u_int dal_last; /* time of most recent DAL parity error */ u_int dal_prev; /* time of previous DAL parity error */};#define CADR_SETMASK 0xC0#define SET_BOTH (CVAX_SEN2 | CVAX_SEN1)#define SET_TWO CVAX_SEN2#define SET_ONE CVAX_SEN1#define SET_NONE 0struct cache_errcnt { /* MSER_MCC */ u_int cache_last; /* time of most recent 1st level cache parity error */ u_int cache_prev; /* time of previous 1st level cache parity error */};struct tag_errcnt { /* CACR_CPE */ u_int tag_last; /* time of most recent 2nd lev cache tag parity err */ u_int tag_prev; /* time of prev 2nd lev cache tag parity err */};/* timers & counters for errors: used with following error bit... */struct cfpa_errcnt cfpa_errcnt; /* machine checks 1 thru 4 (& 5 - 8) */struct dal_errcnt dal_errcnt; /* MSER_MCD */struct cache_errcnt cache_errcnt; /* MSER_MCC */struct tag_errcnt tag_errcnt; /* CACR_CPE */extern int cache2_state; /* state of 2nd level cache: 0=off, 1=on */int ka420_mchkprog = 0; /* machine check in progress *//* * Machine Check codes for CVAXstar CPU. * Defines for number of machine check codes (in following array) * and the index number of first disjoint code. */#define NMCcVAXSTAR 15#define MCcVAXSTARDISJ 11struct mcCVAXSTARframe { int mc1_bcnt; /* byte count == 0xc */ int mc1_summary; /* summary parameter */ int mc1_vap; /* most recent virtual addr */ int mc1_internal_state1; /* internal state 1 */ int mc1_internal_state2; /* internal state 2 */ int mc1_pc; /* trapped pc */ int mc1_psl; /* trapped psl */};/* * Machine Check codes for CVAXstar CPU. */char *mcCVAXSTAR[] = { "unknown machine check type code", /* 0 */ "CFPA protocol error", /* 1 */ "CFPA reserved instruction", /* 2 */ "CFPA unknown error", /* 3 */ "CFPA unknown error", /* 4 */ "process PTE in P0 space (TB miss)", /* 5 */ "process PTE in P1 space (TB miss)", /* 6 */ "process PTE in P0 space (M = 0)", /* 7 */ "process PTE in P1 space (M = 0)", /* 8 */ "undefined interrupt ID code", /* 9 */ "impossible microcode state (MOVCx)", /* 10 */ "read bus error, normal read", /* 80 */ "read bus error, SPTE, PCB, or SCB read", /* 81 */ "write bus error, normal write", /* 82 */ "write bus error, SPTE, or PCB write", /* 83 */};/* * Configure routine for CVAXstar (VS420). * * Please forgive the "unibus flavor" of this code. * Much of it was copied from the MicroVAX-II configure code, * which was copied from the unibus VAX configure code. * Fred Canter -- 11/9/87 */extern int nNUBA;extern int dkn;extern struct uba_driver sdcdriver;extern struct uba_driver stcdriver;extern struct uba_driver scsidriver;extern struct uba_driver ssdriver;extern struct uba_driver lndriver;extern struct uba_driver smdriver;extern struct uba_driver sgdriver;extern struct uba_driver shdriver;extern struct uba_driver spdriver;extern struct uba_driver dshdriver; /* DST/DSH32 Sync Device driver */extern int cache_state;extern int cvs_cache_on; extern int cpu_sub_subtype;ka420conf(){ register int i; extern int fl_ok; struct uba_device *ui; struct uba_ctlr *um; struct uba_hd *uhp; struct uba_driver *udp; extern int catcher[256]; int (**ivec)(); caddr_t addr; /* * TODO: would be nice to print CVAX chip revision level * and, possibly, other nice to know information. */ if(cpu_sub_subtype == SB_TMII) { printf("KA41-A/B "); /* We don't distinguish between Timeshare (A) and Server (B) systems*/ cvs_cache_on = 1; /* Only Primary cache present */ } else printf("KA420 processor "); if( fl_ok ) printf("with an FPU\n"); else printf("without an FPU\n"); /* * We now have the scb set up enough so we can handle * interrupts some if they are waiting to happen. */ (void) spl0(); uhp = &uba_hd[numuba]; uhp->uh_vec = SCB_UNIBUS_PAGE(numuba); uhp->uh_lastiv = 0x200; for (i=0; i<(uhp->uh_lastiv/4); i++) uhp->uh_vec[i] = scbentry(&catcher[i*2], SCB_ISTACK); /* * Say uba0 alive (so installation sizer will see it). */ config_set_alive("uba", 0); /* * Check each unibus mass storage controller. * For each one which is potentially on this uba, * see if it is really there, and if it is record it and * then go looking for slaves. * * For CVAXstar/PVAX, only config: sdc, stc, scsi controllers. */ for (um = ubminit; udp = um->um_driver; um++) { if(um->um_alive) continue; if (udp == &sdcdriver) addr = (caddr_t)0x200c0000; else if (udp == &stcdriver) addr = (caddr_t)0x200c0080; else if (udp == &scsidriver) { if (um->um_ctlr == 0) { addr = (caddr_t)0x200c0080; } else if (um->um_ctlr == 1) { addr = (caddr_t)0x200c0180; } else { continue; } } else continue; cvec = 0x200; i = (*udp->ud_probe)(addr, um->um_ctlr); if (i == 0) continue; um->um_ubanum = numuba; config_fillin(um); printf(" csr 0x%x ", addr); if (cvec == 0) { printf("zero vector\n"); continue; } if (cvec == 0x200) { printf("didn't interrupt\n"); continue; } printf("vec 0x%x, ipl 0x%x\n", cvec, br); um->um_alive = 1; um->um_hd = &uba_hd[numuba]; um->um_addr = (caddr_t)addr; um->um_physaddr = (caddr_t)addr; udp->ud_minfo[um->um_ctlr] = um; for (ivec = um->um_intr; *ivec; ivec++) { um->um_hd->uh_vec[cvec/4] = scbentry(*ivec, SCB_ISTACK); cvec += 4; } /* * Only allows CVAXstar/PVAX ST506 disks/tapes * and SCSI disks/tapes/CDROM. */ for (ui = ubdinit; ui->ui_driver; ui++) { if ((ui->ui_driver != udp) || (ui->ui_alive) || (um->um_ctlr != ui->ui_ctlr)) continue; if ((*udp->ud_slave)(ui)) { ui->ui_alive = 1; ui->ui_ctlr = um->um_ctlr; ui->ui_ubanum = numuba; ui->ui_hd = &uba_hd[numuba]; ui->ui_addr = (caddr_t)addr; ui->ui_physaddr = addr; /* rpb: swap on boot */ if(ui->ui_dk && dkn < DK_NDRIVE) ui->ui_dk = dkn++; else ui->ui_dk = -1; ui->ui_mi = um; /* ui_type comes from driver */ udp->ud_dinfo[ui->ui_unit] = ui; printf("%s%d at %s%d slave %d", ui->ui_devname, ui->ui_unit, udp->ud_mname, um->um_ctlr, ui->ui_slave); (*udp->ud_attach)(ui); /* device type sometimes printed by attach */ printf("\n"); } } } /* * Configure remaining CVAXstar/PVAX devices, no others. */ for (ui=ubdinit; udp=ui->ui_driver; ui++) { if (udp == &ssdriver) addr = (caddr_t)0x200a0000; else if (udp == &smdriver) addr = (caddr_t)0x200f0000; else if (udp == &sgdriver) addr = (caddr_t)0x3c000000; else if (udp == &shdriver) addr = (caddr_t)0x38000000; else if (udp == &dshdriver) /* DST32/DSH32 sync driver */ addr = (caddr_t)0x38000000; else if (udp == &spdriver) /* user device pseudo driver */ addr = ui->ui_addr; /* get CSR from config line */ else continue; /* * Following should never happen on a CVAXstar. */ if ((ui->ui_ubanum != numuba && ui->ui_ubanum != '?') || ui->ui_alive || ui->ui_slave != -1) continue; cvec = 0x200; i = (*udp->ud_probe)(addr); if(i == 0) continue; if (udp == &dshdriver) /* DST/DSH32 driver returns CSR */ addr = (caddr_t)i; /* address from probe() routine */ ui->ui_ubanum = numuba; config_fillin(ui); printf(" csr 0x%x ", addr); if (cvec == 0) { printf("zero vector\n"); continue; } if (cvec == 0x200) { printf("didn't interrupt\n");
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -