ka8800.c

<B>Digital的Unix操作系统VAX 4.2源码</B>

#ifndef lint
static char *sccsid = "@(#)ka8800.c	4.1	ULTRIX	7/2/90";
#endif lint

/************************************************************************
 *									*
 *			Copyright (c) 1984,85,86 by			*
 *		Digital Equipment Corporation, Maynard, MA		*
 *			All rights reserved.				*
 *									*
 *   This software is furnished under a license and may be used and	*
 *   copied  only  in accordance with the terms of such license and	*
 *   with the  inclusion  of  the  above  copyright  notice.   This	*
 *   software  or  any  other copies thereof may not be provided or	*
 *   otherwise made available to any other person.  No title to and	*
 *   ownership of the software is hereby transferred.			*
 *									*
 *   The information in this software is subject to change  without	*
 *   notice  and should not be construed as a commitment by Digital	*
 *   Equipment Corporation.						*
 *									*
 *   Digital assumes no responsibility for the use  or  reliability	*
 *   of its software on equipment which is not supplied by Digital.	*
 *									*
 ************************************************************************/

/***********************************************************************
 *
 * Modification History:
 *
 * 08-Dec-89	jaw
 *	fix startcpu to read configuration from console to see if it has
 *	change...ie: another cpu enabled.
 *
 * 27-Nov-89    Paul Grist
 *      added frame_type argument to logmck() call.
 *
 * 17-Nov-89    Paul Grist
 *      Added two new error-logging routines:
 *          log_ka8800bierrors()
 *          log_ka8800memerrs() (extracted from ka8800memerrs)
 *      Modified exception handlers to use these and to increase
 *      the information logged for errors.
 *
 * 31-May-89	darrell
 *	Changed the calls to tocons to call cons_putc.
 *
 * 30-May-89	darrell
 *	Added include of ../../machine/common/cpuconf.h -- cpu types
 *	were moved there.
 *
 * 23-May-89	darrell
 *	Removed cpup from arguments passed into or to functions.  Cpup
 *	is now global -- part of the new cpusw.
 *
 *  26-Jan-89	jaw
 *	fix up start/stop cpu.
 *
 * 26-Apr-88    jaw
 *	Add VAX8820 support.
 *
 * 04-Feb-87 -- jaw	add check that vaxbi is configured.
 *
 * 04-Jan-87 -- jaw	BIIC start/end addresses must be on 256k boundary
 *
 * 06-Aug-86 -- jaw	fixed baddaddr to work on running system.
 *
 * 28-Jul-86  -- bjg	Set cpu_subtype to 8500, 8550, 8700, or 8800; 
 *			and log cpu_subtype with MEM errors 
 *
 * 11-Jun-86   -- jaw 	Machine check recovery code.
 *
 * 5-Jun-86   -- jaw 	changes to config.
 *
 * 14-May-86 -- pmk  Changed where nbianum gets logged, now in LSUBID
 *
 * 29-Apr-86 -- jaw add error logging for nmi faults.
 *
 * 18-Apr-86 -- jaw	hooks for nmi faults and fixes to bierrors.
 *
 * 14-Apr-86 -- jaw  get cpu message to print out correct type.
 *
 * 09-Apr-86 -- jaw  fix bierror for multiple bi's.
 *
 * 02-Apr-86 -- jaw  add support for nautilus console and memory adapter
 *
 * 18-Mar-86 -- jrs
 *	Changed to new console bit defns.  Also add error printf
 *	if configuration request fails.
 *
 * 13-Mar-86	Darrell Dunnuck
 *	Moved ka8800 specific part of configure() here into ka8800conf.
 *	Passing cpup into nbiinit -- for consistency sake.
 *
 * 05-Mar-86 -- jaw  VAXBI device and controller config code added.
 *		     todr code put in cpusw.
 *
 * 03-Mar-86 -- jrs
 *	Added code to automatically start up secondary processor if
 *	it exists.  This parallels the vms code so that we can share
 *	console command files.
 *
 * 18-Mar-86 -- jaw  add routines to cpu switch for nexus/unibus addreses
 *		     also got rid of some globals like nexnum.
 *		     ka8800 cleanup.
 *
 * 04-feb-86 -- jaw  get rid of biic.h.
 *
 * 12-Dec-85 	Darrell Dunnuck
 *	Created this file to as part of machdep restructuring.
 *
 **********************************************************************/

/* ------------------------------------------------------------------------
 * Modification History:
 *
 *	04-FEB-86  jaw -- complete rewrite...
 *
 *	03-FEB-86  jaw -- changes for SCB.
 *
 * ------------------------------------------------------------------------
 */

#include "../machine/pte.h"
#include "../h/param.h"
#include "../h/conf.h"
#include "../h/time.h"
#include "../h/errno.h"
#include "../h/systm.h"
#include "../h/types.h"
#include "../h/map.h"
#include "../h/buf.h"
#include "../h/errlog.h"
#include "../h/ioctl.h"
#include "../h/tty.h"
#include "../h/cpudata.h"

#include "../machine/cons.h"
#include "../machine/cons.h"
#include "../machine/cpu.h"
#include "../../machine/common/cpuconf.h"
#include "../machine/clock.h"
#include "../machine/mtpr.h"
#include "../machine/mem.h"
#include "../machine/nexus.h"
#include "../machine/scb.h"
#include "../machine/ka8800.h"
#include "../machine/rx50.h"

#include "../io/uba/ubareg.h"
#include "../io/uba/ubavar.h"
#include "../io/bi/buareg.h"
#include "../machine/sas/vmb.h"

extern int (*vax8800bivec[])();
extern struct bidata bidata[];
extern int cache_state;
extern struct timeval time;
extern int nNVAXBI;

extern unsigned int *ka8820_ip;

extern struct pte STAR_csr_map[];

extern struct pte NEMO_csr_map[];

struct nmi_bus_window {
	unsigned int 	csr0;
	unsigned int	pad;
	unsigned int 	csr1;
	char	pad1[500];
	unsigned int	csr2;
	unsigned int	pad2;
	unsigned int 	csr3;
	char	pad3[500];
	unsigned int	csr4;
	char	pad4[508];
	unsigned int 	csr6;
	unsigned int	pad5;
	unsigned int 	csr7;
	char	pad6[500];
};

extern struct nmi_bus_window star_csr;
extern struct nmi_bus_window nemo_csr;

extern struct nbib_regs adpt_loopback[];	/* nbib's registers */
extern struct nbia_regs nbia_addr[];		/* nbia registers */
extern struct nmi_reg v8800mem;	 		/* memory csrs */


/* struct that contains information about the 
  NMI to BI adapter configuration */
struct nbia_info {
	struct nbia_regs *nbia;  /* virtual address of NBIA */
	int alive;		/*  Set to one if NBIA is present */
	int nbib_alive[2];	/*  each word set to one if NBIB is present */
} nbia_info[MAX_NNBIA];



/* struct to record MACHINE check information about each
 processor */
struct {
	struct mc8800frame last8800mc; /* last machine check frame */
	struct timeval	mc8800time;   /* time tahat it occured */
} ka8800mcinfo[4];


ka8800machcheck (cmcf)
caddr_t cmcf;
{
register int recover=1;
register struct mc8800frame *mcf = (struct mc8800frame	 *) cmcf;
register int cpunum,eboxerr,i;
register struct mc8800frame *lastmcf;
union cpusid cpusid;
unsigned long buf_id;

	cpusid.cpusid = mfpr(SID);


	if (cpu == VAX_8800) cpunum = cpusid.cpu8800.cp_lr;
	else cpunum = cpusid.cpu8820.cp_0123;

	lastmcf = &ka8800mcinfo[cpunum].last8800mc;

	/* check the microcode ABORT bit.  This indicates whether
	   VAX state has been changed */
	if (mfpr(MCSTS) & MCSTS_ABORT) recover = 0;

	/* if NMI write or PIBA timeout then do not recover.  This is
	   because the 8800 has write and run to memory. */

	buf_id = mcf->mc8800_nmifsr & NMIFSR_BUFID;
	if ((buf_id == NMIFSR_WRITETO) || (buf_id == NMIFSR_PIBATO)) recover=0;

	/* check for IBOX errors that cause use to abort */
	if ((mcf->mc8800_iber & IBOX_ABORT) != 0) recover = 0;

	/* check for CBOX errors that cause use to abort */
	if ((mcf->mc8800_cber & CBOX_ABORT) != 0) recover = 0;
	
	/* this loop checks each byte of ebox parity checking for
	   a parity error.  Abort occurs if the source to the A or
	   B data path side is from the FILE or if the B side is
	   from the Slow Date FILE and a parity error is signaled. */
	eboxerr = mcf->mc8800_eber;
	for (i=0 ; i<4 ; i++) {
		if (eboxerr & EBOXA_PE)
			if ((eboxerr & (EBOXA_FILE << (8*i))) == AFILE) 
				recover = 0;
		if (eboxerr & (EBOXB_PE<< (8 * i))) { 
			if ((eboxerr & (EBOXB_FILE << (8*i))) == BFILE) 
				recover = 0;
			if ((eboxerr & (EBOXB_FILE << (8*i))) == SDFILE)
				recover = 0;
		}
	}

	/* did we just get a machine check at the same address or PC.  If
	   so its time to give up!!!! */
	if (((time.tv_sec - ka8800mcinfo[cpunum].mc8800time.tv_sec) 
						< MC8800_THRESH) &&
	   ((mcf->mc8800_pc == lastmcf->mc8800_pc) ||
	   (mcf->mc8800_va_viba==lastmcf->mc8800_va_viba)))
		recover=0;
			

	logmck((int *)cmcf, ELMCKT_8800, cpunum, recover);
	if (recover == 0) {
	    cprintf("\tlength\t= %x\n", mcf->mc8800_bcnt);
	    cprintf("\tmcstat\t= %x\n", mcf->mc8800_mcstat);
	    cprintf("\tipc\t= %x\n", mcf->mc8800_ipc);
	    cprintf("\tva.viba\t= %x\n", mcf->mc8800_va_viba);
	    cprintf("\tiber\t= %x\n", mcf->mc8800_iber);
	    cprintf("\tcber\t= %x\n", mcf->mc8800_cber);
	    cprintf("\teber\t= %x\n", mcf->mc8800_eber);
	    cprintf("\tnmifsr\t= %x\n", mcf->mc8800_nmifsr);
	    cprintf("\tnmiear\t= %x\n", mcf->mc8800_nmiear);
	    cprintf("\tpc\t= %x\n", mcf->mc8800_pc);
	    cprintf("\tpsl\t= %x\n", mcf->mc8800_psl);
	}

        /* To get the complete picture, look for other possible
           errors and log any that are found. */

        /* log errors from the nautilus bus window on polarstar */
        if (cpu == VAX_8820) nwb_log_err();

        /* log any nbia errors and any vaxbi errors */
        for(i=0; i< MAX_NNBIA; i++) {
                nbia_log_err(i);
                log_ka8800bierrors(i,&mcf->mc8800_pc);
	      }
 
        /* log any nmi faults and check for memory errors */
        nmifault_log();
        log_ka8800memerrs();


	if (recover) {
        mprintf("MCHK RECOVERY occured\nmcstat: 0x%x",mcf->mc8800_mcstat);
		mtpr (MCESR,0);
	 	ka8800mcinfo[cpunum].mc8800time.tv_sec =time.tv_sec;
	 	ka8800mcinfo[cpunum].mc8800time.tv_usec =time.tv_usec;
	    	lastmcf->mc8800_bcnt=mcf->mc8800_bcnt;
	    	lastmcf->mc8800_mcstat=mcf->mc8800_mcstat;
	    	lastmcf->mc8800_ipc=mcf->mc8800_ipc;
	    	lastmcf->mc8800_va_viba=mcf->mc8800_va_viba;
	    	lastmcf->mc8800_iber=mcf->mc8800_iber;
	    	lastmcf->mc8800_cber=mcf->mc8800_cber;
	    	lastmcf->mc8800_eber=mcf->mc8800_eber;
	    	lastmcf->mc8800_nmifsr=mcf->mc8800_nmifsr;
	    	lastmcf->mc8800_nmiear=mcf->mc8800_nmiear;
	    	lastmcf->mc8800_pc=mcf->mc8800_pc;
	    	lastmcf->mc8800_psl=mcf->mc8800_psl;
		nmifaultclear(); 
		mtpr(TBIA,0);
		setcache(1);
	} else {
		panic ("mchk");
		/* never return */
	}
	return(0);
}

u_long ka8800_config_info=0;

ka8800conf()
{
	union cpusid cpusid;
	register struct nbib_regs *nbib;
	register char *nxp;
	register struct nbia_regs *nbia;
	register int binumber, numnbia;
	register int bicpunode,vor;
	int retry;
	char *cputype;
	int max_num_bi;
	int i,num_of_cpu,cpu_started;
	int bifound = 0;
	cpusid.cpusid = mfpr(SID);

	/* get the configuration word from the PRO. It tells us
	   the CPU type and whether there is one or two cpus. */	
	for (retry = 0; retry < 3 && ka8800_config_info == 0 ; retry++) {
		/* ask console what our configuration is */
		 ka8800_config_info = ka8800getconf();
	}
	if ( ka8800_config_info == 0) printf("no reponse to configuration request!\n");


	if (cpu == VAX_8800) {

		max_num_bi =  VAX8800_MAX_BI;
		mtpr(NMION,0xe0);	/* device interrupts on */

		if ( ka8800_config_info & N_SINGLE_CPU) {
			if ( ka8800_config_info & N_CONF_BOUND) cputype = "85";
			else cputype = "87";
		} else
			cputype = "88";

		printf("VAX%s%s, serial no. %d, hardware level = %d, cpu %d\n",
			cputype, (( ka8800_config_info & N_SLOW_CPU) ? "00" : "50"),
			cpusid.cpu8800.cp_sno, cpusid.cpu8800.cp_eco,
			cpusid.cpu8800.cp_lr);

		/* set cpu_subtype for error logger */
		switch (*(cputype+1)) {
			case '5': cpu_systype = (( ka8800_config_info &N_SLOW_CPU)?ST_8500:ST_8550);
				   break;
			case '7': cpu_systype = ST_8700;
				   break;
			case '8': cpu_systype = ST_8800;
				   cpu_avail = 2;
				   break;
			default:   
				   break;
		}
	} else {
		/* save of address of ip interrupt request register */
		ka8820_ip = &star_csr.csr4;

		/* save off max number of BI's that can be on this type
		   of system.  Polarstar can have 6, nautilus can have 4 */
		max_num_bi =  6;
		mtpr(NMION,0xe4);	/* device interrupts on */

	        /* map bus window registers */ 
        	nxaccess(V8820_STAR_PHYS_CSR01,&STAR_csr_map[0],512);
        	nxaccess(V8820_STAR_PHYS_CSR23,&STAR_csr_map[1],512);
        	nxaccess(V8820_STAR_PHYS_CSR4,&STAR_csr_map[2],512); 
        	nxaccess(V8820_STAR_PHYS_CSR67,&STAR_csr_map[3],512);
     
        	nxaccess(V8820_NEMO_PHYS_CSR01,&NEMO_csr_map[0],512);
        	nxaccess(V8820_NEMO_PHYS_CSR23,&NEMO_csr_map[1],512);
        	nxaccess(V8820_NEMO_PHYS_CSR67,&NEMO_csr_map[3],512);

		/* count how many cpu's are available */
	        for (num_of_cpu = 0, i=0; i<= 3; i++)
        	        if ( ka8800_config_info & (P_CPU0_AVAIL <<i)) num_of_cpu++;

		if (num_of_cpu > 0) cpu_avail = num_of_cpu;

	        printf("VAX88%d0, serial no. %d, hardware level=%d, cpu%d\n",
                num_of_cpu,
                cpusid.cpu8820.cp_sno, cpusid.cpu8820.cp_eco,
                cpusid.cpu8820.cp_0123);
	}

	/* VAX8800 has only one MEMORY CSR.  Set it up */
	nxaccess((char *) 0x3e000000,V8800mem, 512);
	mcrdata[0].memtype = MEMTYPE_MS8800;
	mcrdata[0].mcraddr = (struct mcr *) &v8800mem;
	nmcr++;

	mtpr(CCR,1);  		/* cache on */
	bidata[0].bivec_page=vax8800bivec;

	/* bi interrupt vector pages must start on a 1k boundary */
	if (((SCB_BI_OFFSET(0)) & 0x200) != 0) {
	   	bidata[0].bivec_page += 128;
	}
	(void)spl0();
	for(binumber=0; binumber < max_num_bi; binumber++) {
	    numnbia=binumber>>1;

	    /* map the nbia into virtual memory */
	    nxp = (char *) VAX8800_ADPT_ADDR(numnbia);
	    nxaccess(nxp,Nbia[numnbia],NBPG);
	    nbia = (struct nbia_regs *) nbia_addr;
	    nbia += numnbia;

	
	    /* is nbia present ?? */
	    if (bbadaddr((caddr_t)(nbia),4)) continue;

	    /* save of info about nbia */
	    nbia_info[numnbia].alive = 1;
	    nbia_info[numnbia].nbia = nbia;