cvax.h

<B>Digital的Unix操作系统VAX 4.2源码</B>

/*
 * 	@(#)cvax.h	4.2	(ULTRIX)	9/6/90";
 */

/************************************************************************
 *									*
 *			Copyright (c) 1986,87,88 by			*
 *		Digital Equipment Corporation, Maynard, MA		*
 *			All rights reserved.				*
 *									*
 *   This software is furnished under a license and may be used and	*
 *   copied  only  in accordance with the terms of such license and	*
 *   with the  inclusion  of  the  above  copyright  notice.   This	*
 *   software  or  any	other copies thereof may not be provided or	*
 *   otherwise made available to any other person.  No title to and	*
 *   ownership of the software is hereby transferred.			*
 *									*
 *   The information in this software is subject to change  without	*
 *   notice  and should not be construed as a commitment by Digital	*
 *   Equipment Corporation.						*
 *									*
 *   Digital assumes no responsibility for the use  or	reliability	*
 *   of its software on equipment which is not supplied by Digital.	*
 *									*
 ************************************************************************/

/***********************************************************************
 *
 * Modification History:	cvax.h
 *
 * DATE	dlh
 *	modify part of the cca structure to bring it up to date.  this was
 *	necessary when vector support was added for rigel (VAX 6000-400 
 *	or VAX6400)
 *
 * 01-Sep-88	darrell
 *	Changed the definition of ctsi to ctsia, and fixed the definition
 *	of a field in the module descriptor structure.
 *
 * 02-25-88	darrell
 *	Creation of this file.
 *
 **********************************************************************/


/*
 * VAX3600 (ka650) System Support Chip (SSC) registers
 * At 0x2014 0000 in Local Register space; mapped to "cvqssc"
 */
struct ssc_regs
{
	u_long ssc_sscbr;	/* SSC Base Addr Register		      */
	u_long ssc_pad1[3];	/* filler				      */
	u_long ssc_ssccr;	/* SSC Configuration Register		      */
	u_long ssc_pad2[3];	/* filler				      */
	u_long ssc_cbtcr;	/* CDAL Bus Timeout Control Register	      */
	u_long ssc_pad3[3];	/* filler				      */
	u_long ssc_output;	/* Output Port				      */
	u_long ssc_pad4[14];	/* filler				      */
	u_long ssc_toy;		/* time of year clock reg		      */
	u_long ssc_csrs;	/* Console Storage Receiver Status	      */
	u_long ssc_csrd;	/* Console Storage Receiver Data	      */
	u_long ssc_csts;	/* Console Storage Transmitter Status	      */
	u_long ssc_cstd;	/* Console Storage Transmitter Data	      */
	u_long ssc_crcs;	/* Console Receiver Control/Status	      */
	u_long ssc_crdb;	/* Console Receiver Data Buffer		      */
	u_long ssc_ctcs;	/* Console Transmitter Control/Status	      */
	u_long ssc_ctdb;	/* Console Transmitter Data Buffer	      */
	u_long ssc_pad5[19];	/* filler				      */
	u_long ssc_ioreset;	/* I/O System Reset Register		      */
	u_long ssc_pad6[4];	/* filler				      */
	u_long ssc_rdr;		/* Rom Data Register			      */
	u_long ssc_btc;		/* Bus Timeout Counter			      */
	u_long ssc_it;		/* Interval Timer			      */
	u_long ssc_pad7[1];	/* filler				      */
	u_long ssc_tcr0;	/* timer control reg 0			      */
	u_long ssc_tir0;	/* timer interval reg 0			      */
	u_long ssc_tnir0;	/* timer next interval reg 0		      */
	u_long ssc_tivr0;	/* timer interrupt vector reg 0		      */
	u_long ssc_tcr1;	/* timer control reg 1			      */
	u_long ssc_tir1;	/* timer interval reg 1			      */
	u_long ssc_tnir1;	/* timer next interval reg 1		      */
	u_long ssc_tivr1;	/* timer interrupt vector reg 1		      */
	u_long ssc_pad8[184];	/* pad to 0x20140400 for CPMBX		      */
	u_char ssc_cpmbx;	/* Console Program Mail Box: Lang & Hact      */
	u_char ssc_terminfo;	/* TTY info: Video Dev, MCS, CRT & ROM flags  */
	u_char ssc_keyboard;	/* Keyboard code			      */
	u_char :8;		/* filler				      */
	u_long ssc_pad9[67];	/* filler				      */
	u_long ssc_cca_addr;	/* Physical address of CCA		      */
	u_long ssc_ctsi_addr;	/* Physical address of CTSIA		      */
};

/*
 * VAX3300  and Firefox MSI (DSSI) I/O space.
 */
struct sii_regs
{
	u_long sii_msidr0;	/* MSI Diag. Register 0			*/
	u_long sii_msidr1;	/* MSI Diag. Register 1			*/
	u_long sii_msidr2;	/* MSI Diag. Register 2			*/
	u_long sii_msicsr;	/* MSI Control and Status register.	*/
	u_long sii_msiid;	/* MSI ID register.			*/
	u_long sii_msislcs;	/* MSI Selector control/status 		*/
	u_long sii_msidestat;	/* MSI Selection detection status	*/
	u_long sii_msitr;	/* MSI Timeout Register.		*/
	u_long sii_msidata;	/* MSI Data register			*/
	u_long sii_msidmctlr;	/* MSI DMA control register		*/
	u_long sii_msidmlotc;	/* MSI DMA length to xfer		*/
	u_long sii_msidmaddrl;	/* MSI DMA address pointer		*/
	u_long sii_msidmaddrh;	/* MSI DMA address pointer		*/
	u_long sii_msidmabyte;	/* MSI DMA initial byte			*/
	u_long sii_msistlp;	/* MSI Short Target List Pointer	*/
	u_long sii_msiltlp;	/* MSI Long Target List Pointer		*/
	u_long sii_msiilp;	/* MSI Initiator List Pointer		*/
	u_long sii_msicr;	/* MSI (DSSI) Controll Register		*/
	u_long sii_msisr;	/* MSI (DSSI) Status Register		*/
	u_long sii_msidstat;	/* Data interupt control Register	*/
	u_long sii_msicomm;	/* MSI Command Register			*/
	u_long sii_msidcr;	/* MSI Diag. Control Register		*/
	u_long sii_mscccr;	/* MSI Clock Control Register		*/
	u_long sii_msiisr0;	/* MSI Internal State Register 0	*/
	u_long sii_msiisr1;	/* MSI Internal State Register 1	*/
	u_long sii_msiisr2;	/* MSI Internal State Register 2	*/
	u_long sii_msiisr3;	/* MSI Internal State Register 3	*/
};

/*
 * ni_regs describes three disjoint physical address spaces.  We
 * map them virtually contiguous on Firefox and Mayfair II so that
 * both Firefox and Mayfair II can use the same NI driver.
 */
struct ni_regs
{
	u_long ni_rdp;		/* NI Register Data Port		      */
	u_long ni_rap;		/* NI Register Address Port		      */
	u_long pad1[126];	/* filler				      */
	u_long ni_sar[32];	/* NI Station Address ROM		      */
	u_long pad2[96];	/* Reserved (4 copies of the NISA rROM)	      */
	u_long ni_nilrb[32768];	/* NI Local RAM Buffer			      */
};
						
/*
 * siibuf the MSI (DSSI) RAM buffer on Mayfair II and Firefox.
 */
struct siibuf
{
	u_long siibuf_msirb[32768];	/* MSI Buffer RAM		      */
};

/*
 * VAX3600 (ka650) Qbus map registers
 * At 0x2008 8000 in Local Register space; mapped to "cvqbm"
 */
struct cvqbm_regs
{
	union {
		struct {
			long qb_pad[512];	  /* need 2k bytes	      */
			struct pte qb_map[8192];  /* q-bus map registers      */
		} cqba; 
		struct uba_regs uba;
	} cvqbm_uba;
};

/*
 * Machine Check codes for CVAX CPUs.
 * Defines for number of machine check codes (in following array)
 *    and the index number of first disjoint code.
 */
#define NMCcVAX 15
#define MCcVAXDISJ 11
struct mcCVAXframe {
	int	mc1_bcnt;			/* byte count == 0xc */
	int	mc1_summary;			/* summary parameter */
	int	mc1_vap;			/* most recent virtual addr */
	int	mc1_internal_state1;		/* internal state 1 */
	int	mc1_internal_state2;		/* internal state 2 */
	int	mc1_pc; 			/* trapped pc */
	int	mc1_psl;			/* trapped psl */
};

/*
 * CQBIC registers
 * Note:  The registers refered to as: Master Error Address Register 
 *	  (cq_mear) and Slave Error Address Register (cq_sear)
 *	  are called cvq1_qbear and cvq1_dear in the cvq1_regs 
 *	  structure;
 */
struct cqbic_regs {
	u_long cq_scr;	/* System Configuration Register	      */
	u_long cq_dser;	/* DMA System Error Register		      */
	u_long cq_mear;	/* Master Error Address Register (DMA)	      */
	u_long cq_sear;	/* Slave Error Address Register	 (DMA)	      */
	u_long cq_map_base;	/* Q Bus Map Base address Register	      */
};

/*
 * These structures are used to keep track of the frequency of errors.
 * We keep the time of the last 2 errors for each category.
 * When a third error occurs, if the time elapsed since the "prev" one
 *   is less than 1 second, then we got 3 errors (prev, last, current)
 *   within 1 second.
 *
 * 				   used with following error bit... 
 */
struct cfpa_errcnt {		/* machine checks 1 thru 4 */
	u_int	cfpa_last;	/* time of most recent CFPA error */
	u_int	cfpa_prev;	/* time of previous CFPA error */
};

struct cdal_errcnt {		/* MSER_MCD */
	u_int	cdal_last;	/* time of most recent CDAL parity error */
	u_int	cdal_prev;	/* time of previous CDAL parity error */
};

struct cache_errcnt {		/* MSER_MCC */
	u_int	cache_last;	/* time of most recent 1st level cache parity error */
	u_int	cache_prev;	/* time of previous 1st level cache parity error */
};

struct qnxm_errcnt {		/* DSER_QNXM */
	u_int	qnxm_last;	/* time of most recent Q-22 Bus NXM */
	u_int	qnxm_prev;	/* time of previous Q-22 Bus NXM */
};

struct qngr_errcnt {		/* DSER_NOGRANT */
	u_int	qngr_last;	/* time of most recent Q-22 Bus No Grant timeouts */
	u_int	qngr_prev;	/* time of previous Q-22 Bus No Grant timeouts */
};

struct qpe_errcnt {		/* DSER_QPE */
	u_int	qpe_last;	/* time of most recent Q-22 Bus Device Parity err */
	u_int	qpe_prev;	/* time of previous Q-22 Bus Device Parity err */
};

struct dnxm_errcnt {		/* DSER_DNXM */
	u_int	dnxm_last;	/* time of most recent DMA NXM */
	u_int	dnxm_prev;	/* time of previous DMA NXM */
};

struct crd_errcnt {		/* MEM_CRD */
	u_int	crd_last;	/* time of most recent CRD err */
	u_int	crd_prev;	/* time of previous CRD err */
};

struct cdalW_errcnt {		/* MEM_CDAL */
	u_int	cdalW_last;	/* time of most recent CDAL write err */
	u_int	cdalW_prev;	/* time of previous CDAL write err */
};

struct rdsW_errcnt {		/* MEM_RDS */
	u_int	rdsW_last;	/* time of most recent RDS write err */
	u_int	rdsW_prev;	/* time of previous RDS write err */
};

struct tag_errcnt {		/* CACR_CPE */
	u_int	tag_last;	/* time of most recent 2nd lev cache tag parity err */
	u_int	tag_prev;	/* time of prev 2nd lev cache tag parity err */
};

/*
 * VAX3600 (ka650)
 * Physical start address of the Qbus memory.
 * The q-bus memory size is 4 meg.
 * Physical start address of the I/O space (where the 8Kbyte I/O page is).
 */
#define QMEMCVQ		((char *)(0x30000000))
#define QMEMSIZECVQ	(512*8192)
#define QDEVADDRCVQ	((u_short *)(0x20000000))

/*
 * VAX3600 (ka650): Mapping info for First 'chunk' of Local Regs (1 page).
 */
#define CVQMERRADDR	((short *)(0x20080000))
#define CVQMERRSIZE	512

/*
 * VAX3600 (ka650): Mapping info for Second 'chunk' of Local Regs (1 page).