ka650.c

<B>Digital的Unix操作系统VAX 4.2源码</B>

		}
		/*
		 * What is logged & printed depends on the cause of the error.
		 * If we can't recover print errors on the console.
		 * Last, clear the error bits.
		 */
		if ((cvqmerr->cvq1_memcsr16 & MEM_CDAL) != 0) {
			/*
			 * CDAL Bus Parity Error
			 * Log the mcheck, ESR Packet, & Mem Packet.
			 */
			if (time - cdalW_errcnt.cdalW_prev > TIME_THRESH) {
				if (retry)
					recover = 1;
			}
			logmck((int *)cmcf, ELMCKT_CVAX, cpunum, recover);
			ka650logesrpkt(recover);
			ka650logmempkt(recover);
			if (recover) {
				cdalW_errcnt.cdalW_prev = cdalW_errcnt.cdalW_last;
				cdalW_errcnt.cdalW_last = time;
			} else {
				ka650consprint(2,type,mcf);
				ka650consprint(3,0,0);
				ka650consprint(4,0,0);
			}
			cvqmerr->cvq1_memcsr16 |= MEM_EMASK;
		} else if ((cvqmerr->cvq1_memcsr16 & MEM_RDS) != 0) {
			/*
			 * Main memory uncorrectable ECC error:
			 * If not recovering, disable Main Mem error
			 *	detection & correction to get core dump.
			 * NOTE: logmempkt sets the global var ka650_module
			 *	 "ka650_module" is set to a coded number!
			 * NOTE: consprint() sets up display for cprintf here!
			 */
			if (time - rdsW_errcnt.rdsW_prev > TIME_THRESH) {
				if (retry)
					recover = 1;
			}
			logmck((int *)cmcf, ELMCKT_CVAX, cpunum, recover);
			ka650logesrpkt(recover);
			ka650logmempkt(recover);
			if (recover) {
				rdsW_errcnt.rdsW_prev = rdsW_errcnt.rdsW_last;
				rdsW_errcnt.rdsW_last = time;
			} else {
				cvqmerr->cvq1_memcsr17 |= MEM_ERRDIS;
				ka650consprint(2,type,mcf);
				ka650consprint(3,0,0);
				ka650consprint(4,0,0);
				cprintf("Uncorrectable ECC Error detected in Main Memory <%x>\n", ka650_module);
			}
			cvqmerr->cvq1_memcsr16 |= MEM_EMASK;
		} else if ((cvqmerr->cvq1_dser & DSER_NOGRANT) != 0) {
			/*
			 * No Grant time-out on cpu writing to CQBIC regs
			 * We can't recover so print errors on console.
			 */
			logmck((int *)cmcf, ELMCKT_CVAX, cpunum, recover);
			ka650logesrpkt(recover);
			ka650consprint(2,type,mcf);
			ka650consprint(3,0,0);
			cvqmerr->cvq1_dser |= DSER_CLEAR;
		} else {
			/*
			 * Unspecific mcheck 0x82 or 0x83: log everything.
			 * We can't recover so print errors on console.
			 */
			logmck((int *)cmcf, ELMCKT_CVAX, cpunum, recover);
			mprintf("No primary error flag - unspecified error type\n");
			ka650logesrpkt(recover);
			ka650logmempkt(recover);
			ka650consprint(2,type,mcf);
			cprintf("No primary error flag - unspecified error type\n");
			ka650consprint(3,0,0);
			ka650consprint(4,0,0);
		}
		break;
	default:
		/*
		 *   Re-enable (after flushing) the 2nd level cache if cache
		 *   was enabled before we entered mcheck (this is so we
		 *   log it in the state it was in when mcheck occured).
		 */
		if (cache2_state) {
			cacheptr = cvqcache->cvq5_cache;
			cacheend = cvqcache->cvq5_cache + CACHE_SIZE;
			for (; cacheptr < cacheend; ) {
				*cacheptr++ = 0;
			}
			cvqcb->cvq2_cacr1 |= CACR_CEN;
		}
		/*
		 * Unrecognized mcheck: these are non-recoverable.
		 * Log the mcheck, err status regs & memerr packets
		 * Also print to the console.
		 */
		logmck((int *)cmcf, ELMCKT_CVAX, cpunum, recover);
		ka650logesrpkt(recover);
		ka650logmempkt(recover);
		type = 0;
		ka650consprint(2,type,mcf);
		ka650consprint(3,0,0);
		ka650consprint(4,0,0);
		break;
	}
	if (!recover){
		panic (mchk_string);
	}
	ka650_mchkprog = 0;
	return(0);
}


/*
 * Log memory errors in kernel buffer:
 * Always log packet 3 (error status registers),
 * log pkt 4 (memory CSRs) if RDS or undefined memory error.
 *
 * Traps through SCB vector 60: uncorrectable memory errors.
 */
ka650memerr()
{
	register int recover;	/* set to 1 if we can recover from this error */
	register u_int time;	/* from TODR */

	recover = 0;
	/*
	 * First note the time; then determine if hardware retry is
	 * possible, which will be used for the recoverable cases.
	 */
	time = mfpr(TODR);
	mprintf("memerr interrupt\n");
	if ((cvqmerr->cvq1_memcsr16 & MEM_CDAL) != 0) {
		/*
		 * CDAL parity error
		 * Log ESR Packet & Mem Packet.
		 */
		if (time - cdalW_errcnt.cdalW_prev > TIME_THRESH) {
			recover = 1;
		}
		ka650logesrpkt(recover);
		ka650logmempkt(recover);
		if (recover) {
			cdalW_errcnt.cdalW_prev = cdalW_errcnt.cdalW_last;
			cdalW_errcnt.cdalW_last = time;
		} else {
			ka650consprint(3,0,0);
			ka650consprint(4,0,0);
		}
		cvqmerr->cvq1_memcsr16 |= MEM_EMASK;
	} else if ((cvqmerr->cvq1_memcsr16 & MEM_RDS) != 0) {
		/*
		 * Main memory uncorrectable ECC error:
		 * Disable Main Mem error detection & correction
		 *     to protect mcheck code & to get core dump.
		 * NOTE: logmempkt sets the global var ka650_module
		 *	 "ka650_module" is set to a coded number!
		 * NOTE: consprint() sets up display for cprintf here!
		 */
		cvqmerr->cvq1_memcsr17 |= MEM_ERRDIS;
		ka650logesrpkt(0);
		ka650logmempkt(0);
		ka650consprint(3,0,0);
		cprintf("Uncorrectable ECC Error detected in Main Memory <%x>\n", ka650_module);
		ka650consprint(4,0,0);
		cvqmerr->cvq1_memcsr16 |= MEM_EMASK;
		cvqmerr->cvq1_dser |= DSER_CLEAR;
	} else if ((cvqmerr->cvq1_dser & DSER_QNXM) != 0) {
		/*
		 * Q-22 Bus NXM
		 */
		ka650logesrpkt(0);
		ka650consprint(3,0,0);
		cvqmerr->cvq1_dser |= DSER_CLEAR;
	} else if ((cvqmerr->cvq1_dser & DSER_DNXM) != 0) {
		/*
		 * Q-22 Bus DMA NXM (main memory NXM via QBus map access)
		 */
		ka650logesrpkt(0);
		ka650consprint(3,0,0);
		cvqmerr->cvq1_dser |= DSER_CLEAR;
	} else {
		/*
		 * Undefined memory error interrupt.
		 */
		ka650logesrpkt(0);
		ka650logmempkt(0);
		ka650consprint(3,0,0);
		ka650consprint(4,0,0);
	}
	panic (memerr_string);
}

/*
 * Log CRD memory errors in kernel buffer:
 * Log packet 3 (error status registers) &
 *     packet 4 (memory CSRs) if a true memory error (not a cache parity error).
 *
 * Traps through SCB vector 54: correctable memory errors.
 *
 * These errors are recoverable.
 */
ka650crderr()
{
	register int *cacheptr;		/* ptr to flush 2nd level cache */
	register int *cacheend; 	/* ptr to end of 2nd level cache */
	int recover;	/* set to 1 if we can recover from this error */
	u_int time;

	recover = 0;
	time = mfpr(TODR);
	if ((cvqrom->cvq7_sysdep != SB_KA640) &&
	    (cvqcb->cvq2_cacr1 & CACR_CPE) != 0) {
		/*
		 * Cache Tag Parity error (Cache automatically disabled):
		 * Will cause a cache miss so a memory read will be done
		 *   after we REI from the interrupt.
		 * Action depends on prior 2nd level cache state:
		 *    was on:  Recover
		 *    was off: Panic
		 */
		if (cache2_state) {
			/*
			 * Second Level Cache was on:
			 * Action depends on number of errors:
			 *    3 within 1 time period:   Leave Cache disabled
			 *    < 3 within 1 time period: Flush Cache & re-enable
			 */
			mprintf("CRD interrupt: 2nd level cache tag parity\n");
			recover = 1;
			if (time - tag_errcnt.tag_prev <= TIME_THRESH_C2) {
				/*
				 * Cache was on, 3 errs in 1 time period
				 */
				printf("2nd Level Cache DISABLED by software on CRD\n");
				ka650logesrpkt(recover);
				cvqcb->cvq2_cacr1 |= CACR_CPE;
				cache2_state = 0;
				tag_errcnt.tag_last = 0;
				time = 0;
			} else {
				/*
				 * Cache was on, < 3 errs in 1 time period
				 * Flush and re-enable cache
				 * Note: must clear error bit before re-enable
				 */
				ka650logesrpkt(recover);
				cvqcb->cvq2_cacr1 |= CACR_CPE;
				cacheptr = cvqcache->cvq5_cache;
				cacheend = cvqcache->cvq5_cache + CACHE_SIZE;
				for (; cacheptr < cacheend; ) {
					*cacheptr++ = 0;
				}
				cvqcb->cvq2_cacr1 |= CACR_CEN;
				mprintf("2nd Level Cache re-enabled by software\n");
			}
			tag_errcnt.tag_prev = tag_errcnt.tag_last;
			tag_errcnt.tag_last = time;
		} else {
			/*
			 * Cache was off: no recover.
			 * NOTE: consprint() sets up display for cprintf here!
			 */
			ka650logesrpkt(recover);
			ka650consprint(3,0,0);
			printf("2nd Level Cache Tag Parity Error occured with Cache Disabled!\n");
			cvqcb->cvq2_cacr1 |= CACR_CPE;
			panic("ka650 Cache Tag Parity error");
		}
	} else {
		/*
		 * Main memory correctable ECC error (& catchall):
		 * Log the error status regs & memCSRs.
		 * If 3 within 1 time period disable CRD interrupts, and post "hi-rate".
		 *   (They are automatically re-enabled through timeout
		 *    calls to memenable in machdep.c)
		 * Finally clear the error bit & return.
		 */
		mprintf("CRD interrupt\n");
		ka650logesrpkt(2);
		ka650logmempkt(2);
		if (time - crd_errcnt.crd_prev <= TIME_THRESH) {
			cvqmerr->cvq1_memcsr17 &= ~(MEM_CRDINT);
			mprintf("Hi-Rate CRD log\n");
		}
		crd_errcnt.crd_prev = crd_errcnt.crd_last;
		crd_errcnt.crd_last = time;
		cvqmerr->cvq1_memcsr16 |= MEM_EMASK;
	}
	return(0);
}

/*
 * Print error packet to the console.
 * This is only done when we are about to panic on the error.
 *
 * Note: side-effect.
 *	If console is a graphics device, ioctl is done to force kernel printfs
 *	directly to the screen.
 */

ka650consprint(pkt, type, mcf)
	int pkt;	/* error pkt desired:	2 = mcheck frame
			   			3 = error status registers
			   			4 = memory CSRs */
	int type;	/* machine check type (for pkt type 2) */
	register struct mcCVAXframe *mcf; /* mcheck frame pointer (for type 2)*/
{
	register int i;
	register u_long *mp;		/* ptr to memcsr 0-15 */
	register u_long memcsr16;
	int ws_disp;

	/*
	 * If console is a graphics device,
	 * force printf messages directly to screen.
	 */
	if (ws_display_type) {
	    ws_disp = ws_display_type << 8;
	    (*cdevsw[ws_display_type].d_ioctl)(ws_disp, QD_KERN_UNLOOP, 0, 0);
	}

	switch (pkt) {
	case 2:
		cprintf("\nmachine check %x: ", type);
		/*
		 * Types are disjoint. Have to convert some to linear range.
		 */
		if (type >= 0x80)
			type = type - 0x80 + MCcVAXDISJ;
		cprintf("%s\n", mcCVAX[type]);
		cprintf("\tcode\t= %x\n", mcf->mc1_summary);
		cprintf("\tmost recent virtual addr\t=%x\n", mcf->mc1_vap);
		cprintf("\tinternal state 1\t=%x\n", mcf->mc1_internal_state1);
		cprintf("\tinternal state 2\t=%x\n", mcf->mc1_internal_state2);
		cprintf("\tpc\t= %x\n", mcf->mc1_pc);
		cprintf("\tpsl\t= %x\n\n", mcf->mc1_psl);
		break;
	case 3:
		if (cvqrom->cvq7_sysdep != SB_KA640)
			cprintf("\tcacr\t= %x\n", cvqcb->cvq2_cacr1);
		cprintf("\tdser\t= %x\n", cvqmerr->cvq1_dser);
		cprintf("\tqbear\t= %x\n", cvqmerr->cvq1_qbear);
		cprintf("\tdear\t= %x\n", cvqmerr->cvq1_dear);
		cprintf("\tcbtcr\t= %x\n", cvqssc->ssc_cbtcr);
		cprintf("\tipcr0\t= %x\n", cvqipcr->cvq6_ipcr0);
		cprintf("\tcadr\t= %x\n", mfpr(CADR));
		cprintf("\tmser\t= %x\n", mfpr(MSER));
		break;
	case 4:
		memcsr16 = cvqmerr->cvq1_memcsr16;
		cprintf("\tmemcsr16\t= %x\n", memcsr16);
		cprintf("\tmemcsr17\t= %x\n", cvqmerr->cvq1_memcsr17);
		mp = &(cvqmerr->cvq1_memcsr0);
		/*
		 * Clear ka650_memcon <27:24> so it can be set to the memory
		 *   csr number that had an error.
		 * Look at all 16 MEMCSRs and determine which bank had the error
		 */
		ka650_memcon = (ka650_memcon & 0xf0ffffff);
		for (i = 0; i < 16; i++, mp++) {
			if (((*mp) & MEM_BNKENBLE) &&
			    ((*mp) & MEM_BNK) == (memcsr16 & MEM_BNK)) {
				ka650_memcon = ka650_memcon | (i << 24);
				cprintf("\tmemcsr%d\t= 0x%x\n", i, *mp);
				cprintf("\tmemcon\t= 0x%x\n", ka650_memcon);
				break;
			}
		}
		break;
	}
}

/*
 * Log Error & Status Registers (packets 3 & 5 of KA650 error spec)
 */

ka650logesrpkt(priority)
	int priority;		/* for pkt priority */
{
	struct el_rec *elrp;

	switch (priority) {
	case 0:	/* non-recoverable mchecks & memory errs */
		priority = EL_PRISEVERE;
		break;
	case 1:	/* recoverable mchecks */
		priority = EL_PRIHIGH;
		break;
	case 2:	/* recoverable CRDs */
		priority = EL_PRILOW;
		break;
	}
	elrp = ealloc(sizeof(struct el_esr650), priority);
	if (elrp != NULL) {
		LSUBID(elrp,ELCT_ESR650,EL_UNDEF,EL_UNDEF,EL_UNDEF,EL_UNDEF,EL_UNDEF);
		if (cvqrom->cvq7_sysdep == SB_KA640)
			elrp->el_body.elesr650.esr_cacr = -1;
		else
			elrp->el_body.elesr650.esr_cacr = cvqcb->cvq2_cacr1 |
			    cvqcb->cvq2_cacr2 << 8 | cvqcb->cvq2_cacr3 << 16 ;
		elrp->el_body.elesr650.esr_dser = cvqmerr->cvq1_dser;
		elrp->el_body.elesr650.esr_qbear = cvqmerr->cvq1_qbear;
		elrp->el_body.elesr650.esr_dear = cvqmerr->cvq1_dear;
		elrp->el_body.elesr650.esr_cbtcr = cvqssc->ssc_cbtcr;
		elrp->el_body.elesr650.esr_ipcr0 = cvqipcr->cvq6_ipcr0;
		elrp->el_body.elesr650.esr_cadr = mfpr(CADR);
		elrp->el_body.elesr650.esr_mser = mfpr(MSER);
		EVALID(elrp);
	}
}

/*
 * Log Memory CSRs (packet 4 of KA650 error spec)
 *
 * Note: side-effect.
 *	logmempkt sets the global var ka650_module to a coded number,
 *	thus logmempkt must be called before consprint() for pkt 4.
 */

ka650logmempkt(recover)
	int recover;		/* for pkt priority */
{
	register u_long memcsr16;
	register u_long *mp;		/* ptr to memcsr 0-15 */
	register int i;
	int merrtype = EL_UNDEF;
	struct el_rec *elrp;
	struct el_mem *mrp;

	memcsr16 = cvqmerr->cvq1_memcsr16;
	/*
	 * Clear ka650_memcon <27:24> so it can be set to the memory
	 *   csr number that had an error.
	 * Look at all 16 MEMCSRs and determine which bank had the error
	 */
	ka650_memcon = (ka650_memcon & 0xf0ffffff);
	mp = &(cvqmerr->cvq1_memcsr0);
	for (i = 0; i < 16; i++, mp++) {
		if (((*mp) & MEM_BNKENBLE) &&
		    ((*mp) & MEM_BNK) == (memcsr16 & MEM_BNK)) {
			ka650_memcon = ka650_memcon | (i << 24);
			elrp = ealloc(EL_MEMSIZE,recover ? EL_PRIHIGH : EL_PRISEVERE);
			if (elrp != NULL) {
				LSUBID(elrp,ELCT_MEM,EL_UNDEF,ELMCNTR_650,EL_UNDEF,EL_UNDEF,EL_UNDEF);
				if (memcsr16 & MEM_RDS)
					merrtype = ELMETYP_RDS;
				else if (memcsr16 & MEM_CRD)
					merrtype = ELMETYP_CRD;
				mrp = &elrp->el_body.elmem;
				mrp->elmem_cnt = 1;
				mrp->elmemerr.cntl = 1;
				mrp->elmemerr.type = merrtype;
				mrp->elmemerr.numerr = 1;
				mrp->elmemerr.regs[0] = memcsr16;
				mrp->elmemerr.regs[1] = cvqmerr->cvq1_memcsr17;
				mrp->elmemerr.regs[2] = *mp;	/* the memcsr */
				mrp->elmemerr.regs[3] = ka650_memcon;
				EVALID(elrp);
			}
			switch ((ka650_memcon & 0x0f000000) >> 24) {
			case 0: case 1: case 2: case 3:
				ka650_module = 0x39;
				break;
			case 4: case 5: case 6: case 7:
				ka650_module = 0x3B;
				break;
			case 8: case 9: case 10: case 11:
				ka650_module = 0x3D;
				break;
			case 12: case 13: case 14: case 15:
				ka650_module = 0x3F;
				break;
			default:
				ka650_module = 0x0;
				break;
			}
			break;
		}
	}
}