ka650.c

<B>Digital的Unix操作系统VAX 4.2源码</B>

#ifndef lint
static char *sccsid = "@(#)ka650.c	4.1	ULTRIX	7/2/90";
#endif lint

/************************************************************************
 *									*
 *			Copyright (c) 1986 - 1989 by			*
 *		Digital Equipment Corporation, Maynard, MA		*
 *			All rights reserved.				*
 *									*
 *   This software is furnished under a license and may be used and	*
 *   copied  only  in accordance with the terms of such license and	*
 *   with the  inclusion  of  the  above  copyright  notice.   This	*
 *   software  or  any	other copies thereof may not be provided or	*
 *   otherwise made available to any other person.  No title to and	*
 *   ownership of the software is hereby transferred.			*
 *									*
 *   The information in this software is subject to change  without	*
 *   notice  and should not be construed as a commitment by Digital	*
 *   Equipment Corporation.						*
 *									*
 *   Digital assumes no responsibility for the use  or	reliability	*
 *   of its software on equipment which is not supplied by Digital.	*
 *									*
 ************************************************************************/

/***********************************************************************
 *
 * Modification History:	(ka655/ka650/)ka640.c
 *
 * 27-Nov-89    Paul Grist
 *      added frame_type argument to logmck() calls.
 *
 * 24-May-89	darrell
 *	Changed the #include for cpuconf.h to find it in it's new home --
 *	sys/machine/common/cpuconf.h
 *
 * 24-May-89	darrell
 *	Removed the v_ prefix from all cpusw fields, removed cpup from any
 *	arguments being passed in function args.  cpup is now defined
 *	globally -- as part of the new cpusw.
 *
 * 12-May-89 -- Todd M. Katz		TMK0001
 *	Changes to MSI port driver configuration by ka650conf():
 *	1. Modified interface to msi port driver probe routine.
 *	2. Always mark msi adapters alive.
 *	3. Print out msi adapter configuration information.
 *	4. Always explicitly initialize the appropriate SCB vector.
 *
 * 15-Feb-89	afd (Al Delorey)
 *	Re-synch with VAX 3.0 for 3.2 pool merge.
 *
 * 31-Jan-89	map (Mark Parenti)
 *	Change include syntax for merged pool.
 *
 *  6-Aug-88 -- robin
 *	Changed the test around what processor accessed cache.  This will
 *	allow the ka655 and the ka650 to access it but not the ka640.
 *
 * 16-Aug-88 -- robin
 *	Changed the way panic strings were handled so that the
 *	ka650, ka655, ka640 will all report the correct cpu but
 *	still share the same code.
 *	I also removed the code that was ifdef'ed to not be used
 *	because it was moved to cvax.c by Darrell.
 *
 * 17-Jun-88 -- afd
 *	Removed the static declaration of the virtual names that
 *	correspond to IO space maps.  These declarations are unnecessary
 *	(the virtual names are in spt.s) and were wasting physical
 *	memory space and PTEs.
 *
 * 15-Apr-88	Robin
 *	Added routines to find devices or controllers on the IBUS.
 *	this code should be moved to a new file after Darrell gets
 *	his new code in the pool.
 *
 * 12-Nov-88 -- fred (Fred Canter)
 *	Moved cache2_state to machdep and made it extern in this file.
 *	This prevents clash with same variable in ka420.c.
 *
 * 05-Oct-87 -- afd
 *	Do not allow recursive machine check to occur.  Use a flag
 *	    and if machine check is call recursively, "restart".
 *
 * 24-Nov-87 -- robin
 *	Added support for KA640:
 *		ka650conf(): check sysdep field for ka640 or ka650
 *		Don't access 2nd level cache if ka640
 *
 * 10-Sep-87 -- afd
 *	Machine check/error recovery modifications:
 *	Eliminate use of cache_errcnt.cache_state it was redundant to
 *	    global "cache_state" word (first level cache state).
 *	First and Second Level cache errors are given longer time
 *	    thresh-holds for 3 errors to occur.
 *	When 1st level cache is selectively disabled, reset timers.
 *	Recover from 2nd level cache error as memerr interrupt (like mcheck 82).
 *
 * 24-Aug-87 -- afd
 *	KA650crderr must explicitely return 0, else it looks like no
 *	"memerr" routine is configured.
 *
 * 27-Jul-87 -- afd
 *	Default caches back to 'on' now that pass 3 chips are available.
 *	Print CVAX chip microcode rev level and
 *	KA650 processor firmware rev level in ka650conf routine.
 *
 * 13-July-87 -- afd
 *	If 1st level cache is disabled (both set 1 and set 2) in machine
 *	check handler, set CADR bits for I and D stream so 2nd level cache
 *	can opperate.
 *
 *	The default case (no primary flag) of machine check 82/83 was doing
 *	a cprintf of the mem module as if it were an uncorrectable ECC error.
 *
 *	In ka650conf report the processor type as "KA650 processor" not
 *	"MicroVAX 3600" since the configurations are indistinguishable.
 *
 *	For machine checks 80/81 and 82/83 if no primary error flags match
 *	put out an ASCII message saying that no primary error flag was found.
 *
 *	Machine check modifications:
 *	    - made variables "recover" and "time" register vars for speed.
 *	    - try to recover from mcheck types 1 thru 4 (CFPA errors).
 *	    - try to recover from mcheck 82/83 primary flags: MEM_CDAL, MEM_RDS
 *	    - for pass 3 CVAX CPU bug:
 *		mcheck 80 primary flag DSER_NOGRANT was moved up in chain
 *			of events to test and it is non-recoverable.
 *		primary flag MEM_CDAL had to be added to mcheck 80 since
 *			mcheck 82 with that flag can be reported as an 80.
 *
 * 01-June-87 -- afd
 *	Remove error case of CBTCR bits <31:30> from machine check and 
 *	    memerr routines, and remove timer for it.
 *	Fix access to CACR register so we don't index into it.
 *
 * 20-May-87 -- afd
 *	Default caches to OFF so installation succeeds!
 *	Fix memcon bits <27:24>
 *
 * 19-May-87 -- afd
 *	Use long word accesses (not bytes) and pointer (not index) to
 *		flush the 2nd level cache (else it takes too long).
 *	Check both bit 31 and bit 30 in CBTCR for bus timeout error.
 *	Disable ECC on uncorrectable ECC errors, else core dump fails.
 *	Turn off graphics console loopback of kernel printf's
 *		when the system panics.
 *
 * 12-May-87 -- afd
 *	Changes for V1.5 of the error spec
 *	    mear => qbear;   sear => dear
 *	    New order of errors tested.
 *	Fixed a bug in ka650_machcheck where retry was always set to false.
 *	Fixed recording of cache states in ka650setcache().
 *
 * 20-Apr-87 -- afd
 *	Make "long memcon" "unsigned long ka650_memcon"
 *	For Mayfair error spec V1.4:
 *	    Changed memcon to new format (as given in V1.4 of ka650 error spec)
 *	    Map IPCRs so we can get IPCR0 for pkt 3, & print it in consprint()
 *	    Log IPCR0 in pkt 3 (ka650 ESR pkt)
 *	    Improved panic strings and printf strings
 *	    Changed a couple of machine check strings
 *	    Routine "logmempkt" now sets "ka650_module" to the module in error
 *	Code "Clean-ups":
 *	    Moved declaration of space for Mayfair local registers &
 *		declaration of array with CVAX machine check strings,
 *		to here from ka650.h since the ka650.h header file is now
 *		included by cpuconf.c and machdep.c as well as ka650.c
 *	    Took out debug printfs
 *	    Removed some unused variables in ka650conf
 *	    Changed routine names of consprint, logserpkt, logmempkt, by adding
 *		the prefix "ka650" to the routine names.
 *	Bug Fixes:
 *	    Convert mcheck types 80-83 in consprint, so # prints correctly
 *	    Clear ka650_memcon <27:24> in consprint() & logmempkt() before
 *	          checking for which bank had an error (in case its
 *	          already set to a bank from a prior error)
 *	    Print memcsr that matched in consprint() of pkt 4
 *	Changed name CVAXQ to VAX3600 for Mayfair.
 *
 **********************************************************************/

#include "../h/types.h"
#include "../h/time.h"
#include "../machine/cons.h"
#include "../machine/clock.h"
#include "uba.h"

#include "../machine/pte.h"

#include "../h/param.h"
#include "../h/systm.h"
#include "../h/map.h"
#include "../h/buf.h"
#include "../h/dk.h"
#include "../h/vm.h"
#include "../h/conf.h"
#include "../h/dmap.h"
#include "../h/reboot.h"
#include "../h/devio.h"
#include "../h/errlog.h"
#include "../io/uba/qdioctl.h"	/* for QD_KERN_UNLOOP below */

#include "../machine/cpu.h"
#include "../machine/mem.h"
#include "../machine/mtpr.h"
#include "../machine/ioa.h"
#include "../machine/nexus.h"
#include "../machine/scb.h"
#include "../io/uba/ubareg.h"
#include "../io/uba/ubavar.h"
#include "../../machine/common/cpuconf.h"
#include "../machine/cvax.h"
#include "../machine/ka650.h"
#include "../h/types.h"
#include "../h/config.h"

/* save record of sbis present for sbi error logging for 780 and 8600 */
extern long sbi_there;	/* bits 0-15 for nexi,sbi0; 16-31 for nexi on sbi1*/
extern int ws_display_type;	/* type of console on workstations */
extern struct cpusw *cpup;	/* pointer to cpusw entry */

extern int cache2_state;		/* state of 2nd level cache: 0=off, 1=on */
unsigned long ka650_memcon;	/* memory config (memcsr's 0-15) */
unsigned int ka650_module;	/* which module had a hard memory error */
int ka650_mchkprog = 0;		/* machine check in progress */

/*
 * ka650 configuration routine.
 * Maps local register space, clears map registers set by VMB,
 *   calls unifind for device configuration, set console program restart flag.
 */

char Ka650_processor[] = "KA650 processor ";
char Ka650_mchk[] = "KA650 mchk";
char Ka650_memerr[] = "KA650 memerr";
char Ka655_processor[] = "KA655 processor ";
char Ka655_mchk[] = "KA655 mchk";
char Ka655_memerr[] = "KA655 memerr";
char Ka640_processor[] = "KA640 processor ";
char Ka640_mchk[] = "KA640 mchk";
char Ka640_memerr[] = "KA640 memerr";

char *processor_string;
char *memerr_string;
char *mchk_string;

ka650conf()
{
	register int i;
	register u_long *mp;		/* ptr to memcsr 0-15 */
	register unsigned int *mapaddr;	/* phys address of Qbus map registers */
	char *iov;			/* virtual address in I/O space */
	char *iop;			/* physical address in I/O space */
	extern int fl_ok;
	int ret;

	/*
	 * We now have the scb set up enough so we can handle
	 * interrupts if any are pending.
	 */
	(void) spl0();
	/*
	 * Map the Local Register space (nexus space on other VAXen).
	 */
	nxaccess ((char *) CVQMERRADDR, CVQMERRmap, CVQMERRSIZE);
	nxaccess ((char *) CVQCBADDR, CVQCBmap, CVQCBSIZE);
	nxaccess ((char *) CVQBMADDR, CVQBMmap, CVQBMSIZE);
	nxaccess ((char *) CVQSSCADDR, CVQSSCmap, CVQSSCSIZE);
	nxaccess ((char *) CVQCACHEADDR, CVQCACHEmap, CVQCACHESIZE);
	nxaccess ((char *) CVQIPCRADDR, CVQIPCRmap, CVQIPCRSIZE);
	nxaccess ((char *) CVQROMADDR, CVQROMmap, CVQROMSIZE);
	/*
	 * In order to map the NI area as one structure the following
	 * calls to nxaccess are relative to one area in the PTE table.
	 * This allows the NI driver probe to work for both Mayfair-II and
	 * Firefox systems.
	 */
	nxaccess ((char *) CVQNIADDR, CVQNImap, CVQNISIZE);
	nxaccess ((char *) CVQNIDPADDR, (int) CVQNImap + sizeof (struct pte), CVQNIDPSIZE);
	nxaccess ((char *) CVQNILRBADDR, (int) CVQNImap + (sizeof (struct pte) * 2), CVQNILRBSIZE);
	/*
	 * End of NI area for Mayfair-II and Firefox
	 */
	nxaccess ((char *) CVQMSIADDR, CVQMSImap, CVQMSISIZE);
	nxaccess ((char *) CVQMSIRBADDR, CVQMSIRBmap, CVQMSIRBSIZE);

	/*
	 * Print CVAX chip microcode rev level and
	 * KA650/KA640 processor firmware rev level
	 */
	if (cvqrom->cvq7_sysdep == SB_KA640){
		processor_string = Ka640_processor;
		memerr_string = Ka640_memerr;
		mchk_string = Ka640_mchk;
	}
	else 
	if (cvqrom->cvq7_sysdep == SB_KA655){
		processor_string = Ka655_processor;
		memerr_string = Ka655_memerr;
		mchk_string = Ka655_mchk;
	}
	else {
		processor_string = Ka650_processor;
		memerr_string = Ka650_memerr;
		mchk_string = Ka650_mchk;
	     }
	printf("%s",processor_string);
	if (fl_ok)
		printf("with an FPU\n");
	else
		printf("without an FPU\n");
	printf("	CPU microcode rev = %d, processor firmware rev = %d\n",
		(mfpr(SID)) & 0xFF, cvqrom->cvq7_firmrev);
 

	/* The CVAX CPU chip rev 3 or lower has a POLY-PASSIVE RELEASE problem,
	 * If this rev is seen let the owner know about it.
	 */
	if (cvqrom->cvq7_sysdep == SB_KA650) {
		if((((mfpr(SID)) & 0xFF) < POLY_FIX_REV))
			printf("<<< WARNING -- This KA650 processor is out of Rev\nContact your Digital Equipment Representative for a replacement. >>>\n");
	}


	/*
	 * Clear the map registers that were set by VMB (8192 of them).
	 * This is necessary so that the QDSS sizing will work when
	 *   there is more than one QDSS.
	 */
	mapaddr = (unsigned int *)cvqbm->cvqbm_uba.cqba.qb_map;
	for (i = 0; i < 8192; i++)
		{
		*mapaddr = i;
		mapaddr++;
		}
	/*
	 * See if there is anything there (cvqmerr starts local reg I/O space).
	 */
	if ((*cpup->badaddr)((caddr_t) cvqmerr, 4))
		return(-1);
	sbi_there |= 1<<0;
	if (cvqrom->cvq7_sysdep == SB_KA640){
		extern	int	nummsi, nNMSI;
		config_set_alive("ibus", 0, 0, 0);
		ib_config_dev(cvqni,CVQNIADDR,0,"ln",0);
		(void)printf("msi%d at address 0x%x (SII)\n", 0, cvqmsi);
		if (nummsi > 0 )
			(void)printf("msi%d unsupported\n", nummsi);
		else if (nummsi >= nNMSI )
			(void)printf("msi%d not configured\n", nummsi);
		else {
			extern int	(*msiintv[])(), msi_probe();
			register int	( *stray )();

			stray = scb.scb_stray5;
			scb.scb_stray5 = scbentry(msiintv[nummsi], SCB_ISTACK);
			if( msi_probe(nummsi, cvqmsi, cvqmsirb )) {
				(void)config_set_alive("msi", 0, 0, 0);
			} else {
				scb.scb_stray5 = stray;
			}
		}
		nummsi++;
	}
	printf("Q22 bus\n");
	uba_hd[0].uba_type = UBAUVII;
	iov = (char *)cvqbm;
	iop = (char *)CVQBMADDR;
	unifind ((&((struct cvqbm_regs *)iov)->cvqbm_uba.uba), 
		(&((struct cvqbm_regs *)iop)->cvqbm_uba.uba), 
		qmem[0],
		cpup->umaddr(0,0),
		cpup->pc_umsize,
		cpup->udevaddr(0,0),
		QMEMmap[0], cpup->pc_haveubasr,(long) 0, (long) 0);
	/*
	 * Clear bits from the nxm probe and autoconf mchecks.
	 */
	cvqmerr->cvq1_dser |= DSER_CLEAR;
	cvqssc->ssc_cbtcr |= (CBTCR_BTO|CBTCR_RWT);

	/*
	 * Record memory configuration (memcsr's 0-15) in "ka650_memcon".
	 */
	mp = &(cvqmerr->cvq1_memcsr0);
	for (i = 31; i > 15; i--, mp++) {
		ka650_memcon |= ((*mp & MEM_BNKENBLE) >> i);
	}
	ka650_memcon |= ((cvqmerr->cvq1_memcsr0 & MEM_BNKUSAGE) << 16);
	ka650_memcon |= ((cvqmerr->cvq1_memcsr4 & MEM_BNKUSAGE) << 18);
	ka650_memcon |= ((cvqmerr->cvq1_memcsr8 & MEM_BNKUSAGE) << 20);
	ka650_memcon |= ((cvqmerr->cvq1_memcsr12 & MEM_BNKUSAGE) << 22);
	/*
	 * Tell the console program that we've booted and
	 * that we speak English and would like to restart
	 * if the machine panics.
	 */
	cvqssc->ssc_cpmbx=RB_CV_RESTART;
	return(0);
}

/*
 * This routine sets the cache to the state passed:  enabled/disabled.
 * The CVAX chip has a first level cache enabled through IPR CADR.
 * The KA650 processor has a second level cache enabled through
 *     local register CACR.
 * Also set state flags in the error count structures.
 */

ka650setcache(state)
int state;
{
	register int *cacheptr;		/* ptr to flush 2nd level cache */
	register int *cacheend; 	/* ptr to end of 2nd level cache */

	mtpr (CADR, state);
	if (state != 0 && (cvqrom->cvq7_sysdep != SB_KA640)) {
		/*
		 * Flush 2nd level cache before enabling
		 */
		cacheptr = cvqcache->cvq5_cache;
		cacheend = cvqcache->cvq5_cache + CACHE_SIZE;
		for (; cacheptr < cacheend; ) {
			*cacheptr++ = 0;
		}
		cvqcb->cvq2_cacr1 |= CACR_CEN;
		cache2_state = 1;
	}
	return(0);
}

/*
 * Enable cache.  Both D_stream & I-stream, both Set-1 and Set-2.
 * These bits are in the IPR CADR for the CVAX chip.
 */

extern	int	cache_state;

ka650cachenbl()
{
	cache_state = (CVAX_CEND | CVAX_CENI | CVAX_SEN1 | CVAX_SEN2);
	return(0);
}

/*
 * Enable CRD interrupts.
 * This runs at regular (15 min) intervals, turning on the interrupt.
 * It is called by the timeout call in memenable in machdep.c
 * The interrupt is turned off, in ka650crderr(), when 3 error interrupts
 *   occur in 1 time period.  Thus we report at most once per memintvl (15 mins).
 */
ka650memenable()
{
	cvqmerr->cvq1_memcsr17 |= MEM_CRDINT;
	return(0);
}

ka650tocons(c)
	register int c;
{
	while ((mfpr (TXCS) & TXCS_RDY) == 0)
		continue;
	mtpr (TXDB, c);
	return(0);
}


char *
ka650umaddr(ioadpt,nexnum)
	int ioadpt,nexnum;
{
	return(QMEMCVQ);
}

u_short *
ka650udevaddr(ioadpt,nexnum)
	int ioadpt,nexnum;
{
	return(QDEVADDRCVQ);
}

/*
 * Machine check handler.