ka8600.c

<B>Digital的Unix操作系统VAX 4.2源码</B>

	  * registers 0x25, 0x26, 0x27 & 0x2a in the
	  * Ebox.  The registers should only be read once
	  * into temporary locations.  Inserting any
	  * instructions between the mtpr and mfpr in
	  * the assembly code will result in
	  * unpredictable results -- according to the
	  * VENUS processors registers spec.
	  */
	register int reg_11;

	register int tmp_mdecc, tmp_mear;
	int	tmp_mstat1, tmp_mstat2;
	struct el_rec *elrp;
	struct el_mem *mrp;

	memerrs++;	/* number of times this routine is entered */
   	/* mtpr (ESPA, SPAD_MDECC);		*/
   	/* tmp_mdecc = (mfpr(ESPD));		*/
	asm("mtpr $0x27,$0x4e; mfpr $0x4f,r11");
	tmp_mdecc = reg_11;

	if (mem_err_report != 1) {
		mem_err_report++;
		elrp = ealloc(EL_MEMSIZE,EL_PRILOW);
		if (elrp != NULL) {
		    LSUBID(elrp,ELCT_MEM,EL_UNDEF,ELMCNTR_8600,EL_UNDEF,EL_UNDEF,pammdata);
		    /* mtpr (ESPA, SPAD_MEAR);			*/
		    /* tmp_mear = (mfpr(ESPD));			*/
		    asm("mtpr $0x2a,$0x4e; mfpr $0x4f,r11");
		    tmp_mear = reg_11;

		    /* mtpr (ESPA, SPAD_MSTAT1);		*/
		    /* tmp_mstat1 = (mfpr (ESPD));		*/
		    asm("mtpr $0x25,$0x4e; mfpr $0x4f,r11");
		    tmp_mstat1 = reg_11;

		    /* mtpr(ESPA, SPAD_MSTAT2);			*/
		    /* tmp_mstat2 = (mfpr(ESPD));		*/
		    asm("mtpr $0x26,$0x4e; mfpr $0x4f,r11");
		    tmp_mstat2 = reg_11;

		    mrp = &elrp->el_body.elmem;
		    mrp->elmem_cnt = 1;
		    mrp->elmemerr.cntl = 1;
		    mrp->elmemerr.type = 1;
		    mrp->elmemerr.numerr = 1;
		    mrp->elmemerr.regs[0] = tmp_mdecc;
		    mrp->elmemerr.regs[1] = tmp_mear;
		    mrp->elmemerr.regs[2] = tmp_mstat1;
		    mrp->elmemerr.regs[3] = tmp_mstat2;
		    EVALID(elrp);
		}
	}
	return(0);
}

/*
 * this routine sets the cache to the state passed.  enabled/disabled
 */

ka8600setcache(state)
int state;
{
	mtpr (CSWP, state);
	return(0);
}

/*
 * Memenable enables the memory controller corrected data reporting.
 * This runs at regular intervals, turning on the interrupt.
 * The interrupt is turned off, per memory controller, when error
 * reporting occurs.  Thus we report at most once per memintvl.
 */

ka8600memenable ()
{
	register struct mcr *mcr;

	M8600_ENA;
	mem_err_report = 0;
	return(0);
}

ka8600tocons (c)
	register int c;
{
	int register timo,s;

	c &= TXDB_DATA;
	timo = 30000;
	s = mfpr(TXCS); 	/* save old TXCS */
	while ((mfpr(TXCS)&TXCS_RDY) == 0)
		if(--timo == 0)
			break;
	/* enable logical console */
	mtpr(TXCS, LOGICAL_CONS|WMASKNOW);
	timo = 30000;
	while ((mfpr (TXCS) & TXCS_RDY)==0)
		if(--timo == 0)
			break;
	if ((mfpr(TXCS)&TXDB_ID)==LOGIC_CONS_ID)
		mtpr (TXDB, c);
	timo = 30000;
	while ((mfpr(TXCS)&TXCS_RDY) == 0)
		if(--timo == 0)
			break;
	mtpr(TXCS, s|WMASKNOW);
	return(0);
}

/* get pamm data for memory errors 8600 only! */
#define TXDB_RAC 0x13 
getpammdata()
{
	int register timo;
	int i, s;
	int data[3];
	int mask1 = 0x80;
	int mask2 = 0xc0;
	int mask3 = 0xc0;
	int shift1 = 24;
	int shift2 = 6;
	int shift3 = 22;
	int tmp = 0;

	s = mfpr(RXCS);
	mtpr(RXCS,0);
	cons_putc(TXDB_RAC);
	timo = 30000;
	while ((mfpr(RXCS) & RXCS_DONE) == 0)
		if (--timo == 0)
			break;
	if ((mfpr(RXDB) & 0xff) == TXDB_RAC) {
		for (i = 0; i < 3; i++) {
			timo = 30000;
	        	while ((mfpr(RXCS) & RXCS_DONE) == 0)
		    	if (--timo == 0)
				break;
			data[i] = mfpr(RXDB);
		}
		for (i = 0; i < 8; i++) {
			tmp = data[0] & mask1;
			tmp <<= shift1;
			pammdata |= tmp;
			mask1 >>= 1;
			shift1 -= 3;
			if (i < 4) {
				tmp = data[2] & mask3;
				tmp <<= shift3;
				pammdata |= tmp;
				mask3 >>= 2;
				shift3 -= 2;
			}
			else {
				tmp = data[1] & mask2;
				tmp <<= shift2;
				pammdata |= tmp;
				mask2 >>= 2;
				shift2 -= 2;
			}
		}
	}
	mtpr(RXCS,s);
	printf("pammdata formatted %x\n",pammdata);
}

/*
 * Enable cache and enable floating point accelerator
 */

extern	int	cache_state;

ka8600cachenbl()
{
	cache_state = 0x3;
	if (mfpr(ACCS)) 	/* is there an accelerator */
		mtpr(ACCS, 0x8000);
	getpammdata();
	return(0);
}

ka8600conf()
{
	union cpusid cpusid;
	register int *ip,i;
	extern char Sysbase[];

	cpusid.cpusid = mfpr(SID);
	printf("VAX 86%s0, serial no. %d, hardware level = %d\n",
		((cpusid.cpu8600.cp_eco & 0x80) ? "5" : "0"),
		cpusid.cpu8600.cp_sno, cpusid.cpu8600.cp_eco);
	/*
	 * Identify the IO adapters,  probenexus
	 * will be called when an SBIA is identified.
	 * When other IO adapters exist, an appropriate
	 * probe routine will be called, i.e. BIA
	 */
	probeioa();
}

short *ka8600nexaddr(ioadpt,nexnum) 
 	int ioadpt,nexnum;
{

	return(NEX8600(ioadpt,nexnum));

}

u_short *ka8600umaddr(ioadpt,ubanumber) 
 	int ioadpt,ubanumber;
{

	return(UMEM8600(ioadpt,ubanumber));

}

u_short *ka8600udevaddr(ioadpt,ubanumber) 
 	int ioadpt,ubanumber;
{

	return(UDEVADDR8600(ioadpt,ubanumber));

}

ka8600logsbi(sbi_num,sbi_type,pc_psl)
long sbi_num;
long sbi_type;
long *pc_psl;
{

	extern int cpu;
	int cntr;
	struct el_rec *elrp;
	struct pc_psl_temp {
		int el_pc;
		int el_psl;
	} *pc_pslptr;
	char *cptr;
	int *siloptr;
	int *ip;

	elrp = ealloc(sizeof(struct el_sbia8600), EL_PRISEVERE);
	if (elrp != EL_FULL) {
	    ip = (int *) Ioamap[sbi_num];
	    if (*ip & PG_V) {
		LSUBID(elrp,ELCT_BUS,ELBUS_SBI8600,EL_UNDEF,sbi_num,EL_UNDEF,sbi_type);
		/* load sbi related information */
		(void)fill8600(elrp,sbi_num);

		/* load pc and psl */
		pc_pslptr = (struct pc_psl_temp *) pc_psl;

		elrp->el_body.elsbia8600.sbia_pc = pc_pslptr->el_pc;
		elrp->el_body.elsbia8600.sbia_psl = pc_pslptr->el_psl;

		EVALID(elrp);

		cprintf("\nsbi error: sbi %d\n", sbi_num);
		cprintf("ioaba=  %8x\tdmacid= %8x\tdmacca= %8x\n",
	        Sbi8600.sbia_ioaba, Sbi8600.sbia_dmacid, Sbi8600.sbia_dmacca);
		cprintf("dmabid= %8x\tdmabca= %8x\tdmaaid= %8x\n",
		Sbi8600.sbia_dmabid, Sbi8600.sbia_dmabca,Sbi8600.sbia_dmaaid);
		cprintf("dmaaca= %8x\tdmaiid= %8x\tdmaica= %8x\n",
		Sbi8600.sbia_dmaaca,Sbi8600.sbia_dmaiid,Sbi8600.sbia_dmaica);
		cprintf("ioadc=  %8x\tioaes=  %8x\tioacs=  %8x\n",
		Sbi8600.sbia_ioadc,Sbi8600.sbia_ioaes,Sbi8600.sbia_ioacs);

		cprintf("ioacf=  %8x\ter=     %8x\tto=     %8x\n",
		Sbi8600.sbia_ioacf,Sbi8600.sbia_er,Sbi8600.sbia_to);

		cprintf("fs=     %8x\tsc=     %8x\tmr=     %8x\n",
		Sbi8600.sbia_fs,Sbi8600.sbia_sc,Sbi8600.sbia_mr);
		DELAY(25000);

		cprintf("silo regs\n");
		for (cntr = 0; cntr < EL_SIZE16; cntr++) {
			cprintf("%8x\t", Sbi8600.sbia_silo[cntr]);
			if ((cntr+1) %4 == 0) {
				 cprintf("\n");
				 DELAY(25000);
			}
		}
		DELAY(25000);
		cprintf("\ncsrs\n");
		for (cntr = 0; cntr < EL_SIZE16; cntr++) {
			cprintf("%8x\t", Sbi8600.sbia_csr[cntr]);
			if ((cntr+1) %4 == 0) {
				 cprintf("\n");
				 DELAY(25000);
			}
		}
		DELAY(25000);
		cprintf("\npc= %8x\tpsl= %8x\n", Sbi8600.sbia_pc,
			Sbi8600.sbia_psl);
	    }
	    else {
		LSUBID(elrp,ELCT_BUS,ELBUS_SBI8600,EL_UNDEF,sbi_num,EL_UNDEF,sbi_type);
		cprintf("\nsbi error: sbi %d\n", sbi_num);
		/* don't validate */
	    }
		
	}
	else {
		cprintf("\nsbi error: sbi %d\n", sbi_num);
	}
}
/*
 * Function: fill8600(elrp, sbi_num)
 *
 * Function description:  load sbi related info into errorlog buffer 
 *
 * Arguments:   elrp - pointer to loc to write err log packet
 *		sbi_num - sbi number being logged
 *
 * Return value: None
 *
 * Side effects: None
 *
 */
fill8600(elrp, sbi_num)
struct el_rec *elrp;
long sbi_num;
{
	union cpusid cpusid;
	register char  *ioav;
	struct sbia_regs *sbiv;
	int cnt;
	int *csrptr;
	int *siloptr;

	cpusid.cpusid = mfpr(SID);

	switch(cpu) {
		case VAX_8600:
			ioav = (char *)ioa;	/* ioa in ioa.h */
			ioav += (cpup->pc_ioasize) * sbi_num;
			sbiv = (struct sbia_regs *)ioav;

			elrp->el_body.elsbia8600.sbia_ioaba=(int) ioav;
			elrp->el_body.elsbia8600.sbia_dmacid=sbiv->sbi_dmacid;
			elrp->el_body.elsbia8600.sbia_dmacca=sbiv->sbi_dmaccs;
			elrp->el_body.elsbia8600.sbia_dmabid=sbiv->sbi_dmabid;
			elrp->el_body.elsbia8600.sbia_dmabca=sbiv->sbi_dmabcs;
			elrp->el_body.elsbia8600.sbia_dmaaid=sbiv->sbi_dmaaid;
			elrp->el_body.elsbia8600.sbia_dmaaca=sbiv->sbi_dmaaca;
			elrp->el_body.elsbia8600.sbia_dmaiid=sbiv->sbi_dmaiid;
			elrp->el_body.elsbia8600.sbia_dmaica=sbiv->sbi_dmaica;
			elrp->el_body.elsbia8600.sbia_ioadc=sbiv->sbi_dctl;
			elrp->el_body.elsbia8600.sbia_ioaes=sbiv->sbi_errsum;
			elrp->el_body.elsbia8600.sbia_ioacs=sbiv->sbi_csr;
			elrp->el_body.elsbia8600.sbia_ioacf=sbiv->sbi_cfg;

			elrp->el_body.elsbia8600.sbia_er=sbiv->sbi_error;
			elrp->el_body.elsbia8600.sbia_to=sbiv->sbi_timo;
			elrp->el_body.elsbia8600.sbia_fs=sbiv->sbi_fltsts;
			elrp->el_body.elsbia8600.sbia_sc=sbiv->sbi_silcmp;
			elrp->el_body.elsbia8600.sbia_mr=sbiv->sbi_maint;

			siloptr = elrp->el_body.elsbia8600.sbia_silo;
			for(cnt=0; cnt < EL_SIZE16; cnt++) {
				*siloptr++ =  sbiv->sbi_silo;
			}
			csrptr = elrp->el_body.elsbia8600.sbia_csr;
			nexusinfo(elrp, sbi_num, csrptr);
			break;

		default: 
			break;

	}
}