locore.s

<B>Digital的Unix操作系统VAX 4.2源码</B>

SCBVEC(protflt):
/* this is a 780 fix gotton from our friends in VMS land.  It
 * seems that the VAX780 sometimes falsely claims an access violation.  This
 * code does a probe to make sure it is really an access violation.  If it
 * is a false one, we just REI, else it continues to the trap code.
 */
#ifdef VAX780
	cmpl	$VAX_780,_cpu		# only do if 780
	bneq	3f

	bitl	$4,(sp)			# test if modify 
	beql	1f

	probew	$0,$1,4(sp)		# modify...do write check...
	beql	3f
	addl2 $8,sp			# if the probe passed then 
	rei				# this is 780 bug....retry

1:
	prober	$0,$1,4(sp)		# read ... do read check...
	beql	3f	
	addl2 $8,sp			# if the probe passed then
	rei				# this is 780 bug...retry

3:
#endif VAX780

	tstl	_vaxemulbegin		# Emulation loaded in?
	beql	2f			# br if no
/*
 *	Check to see if the pc is in the emulation space, if so go
 *	to the emulation handler for the exception
 */
	cmpl	8(sp),_vaxemulbegin	# If less the vax$emul_being
	blssu	1f			# then br
	cmpl	8(sp),_vaxemulend	# If greater than vax$emul_end
	bgequ	1f			# then br
	jmp	*_exeacviolat		# else jmp to the emulator's
					# exception handler
1:
	.globl	_Xprotflt1
_Xprotflt1:				# Special symbol used to interface
					# the emulation code to ultrix
					# signalling
2:

	movl	r0,-(sp)		# Save r0 (caller was using it...)
	movl	4(sp),r0		# Get the fault type

/*	For now, panic on any vector async fault, since none of the
 *	currently-supported vector processors supports async
 *	memory management.  THIS WILL HAVE TO CHANGE IF WE GET
 *	AN ASYNC VECTOR PROCESSOR TO SUPPORT!!!
 */
	bitl	$VM_FLT_VAS,r0
	beql	3f
	pushab	1f
	calls	$1,_panic
	halt
1:	.asciz	"Async vector memory exception"

3:	bitl	$VM_FLT_P,r0		# Pte reference (table flt)
	bneq	Xtableflt

/*	Length violation or vector I/O reference get reported
 *	as seg faults.
 */

	bitl	$VM_FLT_L|VM_FLT_VIO,r0
	bneq	Xsegflt

/*	Vector alignment errors or write protection errors
 *	get reported as protection faults (which get reported
 *	to the user as SIGBUS)
 */
	bitl	$VM_FLT_VAL|VM_FLT_M,r0
	bneq	4f

/*	We tested all the defined bits in this word... so
 *	either the word is 0 (which indicates a read protection
 *	fault), or else it's got bits we don't know about!
 * 	Panic in the latter case...
 */
	cmpl	r0,$0
	beql	5f

	pushab	1f			# Not zero; panic!
	calls	$1,_panic
1:	.asciz	"Unknown memory management trap"

4:
	movl	(sp)+,r0		# Restore r0
	addl2	$4,sp			# Pop off trap type
	TRAP(PROTFLT)
5:
	movl	(sp)+,r0		# Restore r0
	addl2	$4,sp			# Pop off trap type
	TRAP(NOACCESS)

Xsegflt:
	movl	(sp)+,r0		# Restore r0
	addl2	$4,sp			# Pop off trap type
segflt:
	TRAP(SEGFLT)

SCBVEC(transflt):
	bitl	$2,(sp)+
	bnequ	tableflt
	jsb	Fastreclaim		# try and avoid pagein
	TRAP(PAGEFLT)

Xtableflt:
	movl	(sp)+,r0		# Restore r0
	addl2	$4,sp			# Pop off trap type
tableflt:
	TRAP(TABLEFLT)

alltraps:
	mfpr	$USP,-(sp); calls $0,_trap; mtpr (sp)+,$USP
	addl2	$8,sp			# pop type, code
	mtpr	$HIGH,$IPL		## dont go to a higher IPL (GROT)
	rei

SCBVEC(syscall):
	pushl	$T_SYSCALL
	mfpr	$USP,-(sp); calls $0,_syscall; mtpr (sp)+,$USP
	addl2	$8,sp			# pop type, code
	mtpr	$HIGH,$IPL		## dont go to a higher IPL (GROT)
	rei

SCBVEC(ipintr):
	PUSHR
	calls	$0,_cpu_ip_intr
	POPR
	rei


#ifdef VAX_60
SCBVEC(ka60memerr):
	PUSHR;
	calls	$0,_ka60memerr;
	POPR;
	rei
#endif VAX_60

/*
 * Vector Processor Disabled Fault
 */
SCBVEC(vdisflt):
	pushl $0
	TRAP(VDISFLT)

/*
 * Initialization
 *
 * ipl 0x1f; mapen 0; scbb, pcbb, sbr, slr, isp, ksp not set
 */
	.globl	_slavestart
_slavestart:
	cmpl	$VAX_6400,_cpu		# is this rigel/mariah?
	bneq	1f			# if no, jump over ACCS write.

	cmpl	$MARIAH_VARIANT,_cpu_sub_subtype
	bneq	1f			# skip for rigel 

	pushr	$0x2			# save r2
	mfpr	$ACCS,r2		# get copy of ACCS
	bicl2	$4,r2			# clear bit #2 to put Mariah into
					# 30-bit mode.  (don't want to change
 					# values of FPA and Vector present bits
	mtpr	r2,$ACCS		# write new ACCS
	movl	(sp)+,r2		# restore r2

1:	# mtpr	$0,$TXCS		# shut down transmit interrupts
	mtpr	$0,$ICCS
	mtpr	$_scb-0x80000000,$SCBB
	mtpr	$_Sysmap-0x80000000,$SBR
	mtpr	$_Syssize,$SLR
/* double map the kernel into the virtual user addresses of phys mem */
	mtpr	$_Sysmap,$P0BR
	mtpr	$_Syssize,$P0LR
	mtpr	$0,$TBIA		# clean tb
	mtpr	$1,$MAPEN		# enable mapping
	jmp	*$1f			# run in virt space
1:
	casel	_cpu,$1,$CPU_MAX
0:
	.word	3f-0b		# 1 is VAX_780
	.word	3f-0b		# 2 is VAX_750
	.word	3f-0b		# 3 is VAX_730
	.word	3f-0b		# 4 is VAX_8600
	.word	1f-0b		# 5 is VAX_8200
	.word	2f-0b		# 6 is VAX_8800
	.word	3f-0b		# 7 is MVAX_I
	.word	3f-0b		# 8 is MVAX_II
	.word	3f-0b		# 9 is VVAX
	.word	3f-0b		# 10 is VAX_3600 (Mayfair I)
	.word	4f-0b		# 11 is VAX6200 (Calypso CVAX)
	.word	3f-0b		# 12 is VAX_3400 (Mayfair II)
	.word	3f-0b		# 13 is C_VAXSTAR (PVAX)
	.word	6f-0b		# 14 is CVAX (Firefox)
	.word	3f-0b		# 15 is VAX_3900 (Mayfair III)
	.word	3f-0b		# 16 RESERVED for MIPS processor
	.word	5f-0b		# 17 is VAX_8820 (Polarstar)
	.word	3f-0b		# 18 RESERVED for MIPS processor
	.word	3f-0b		# 19 RESERVED for MIPS processor
	.word	3f-0b		# 20 RESERVED for MIPS processor
	.word	3f-0b		# 21 RESERVED for MIPS processor
	.word	7f-0b		# 22 is Calypso Rigel (VAX6400)
	.word	3f-0b		# 23 is VAXSTAR
	.word	3f-0b		# 24 RESERVED for MIPS processor
	.word	3f-0b		# 25 RESERVED for MIPS processor
	.word	9f-0b		# 26 VAX_9000

7:
#ifdef	VAX6400
	movl	_rssc+0x40,r0		# Read RSSC IPORT register
	bicl2	$0xfffffff0,r0		# Get node ID of processor
#endif  VAX6400
	brb	cpuid_found
6:
#ifdef VAX60
	mfpr	$CPUID,r0		# VAX60 - just need something unique
#endif	VAX60
	brb	cpuid_found

4:
#ifdef VAX6200
	movl	_v6200csr,r0
	bicl2	$0xfffffff0,r0
#endif VAX6200
	brb 	cpuid_found

1:
#ifdef	VAX8200
	mfpr	$BINID,r0		# VAX8200
#endif	VAX8200
	brb 	cpuid_found
5:
	mfpr	$SID,r0			# VAX8820 
	ashl	$-22,r0,r0
	bicl2	$0xfffffffc,r0
	brb	cpuid_found
2:
	mfpr	$SID,r0			# VAX8800 
	ashl	$-23,r0,r0
	bicl2	$0xfffffffe,r0
	brb	cpuid_found
9:
	mfpr	$CPUID, r0		# VAX9000
	brb	cpuid_found

3:
	movl	$1,r0			# no choice for uniprocessors
	brb 	cpuid_found

cpuid_found:
	movl	_cpudata[r0],r2
	movl	$1,CPU_NOPROC(r2)	# no user proc at this time
	movl	$CPU_RUN,CPU_STATE(r2)	# we are now running
	movl	CPU_ISTACK(r2),sp	# load stack pointer
	mtpr 	sp,$ISP			#
	pushl	r2			# save off cpudata pointer.

	calls	$0,_startrtclock	# start interval timer
	movl	(sp)+,r3		# need table index in idle loop
	mtpr	r3,$ESP			#
	PUSHR
	casel	_cpu,$1,$CPU_MAX
0:
	.word	1f-0b		# 1 is VAX_780
	.word	1f-0b		# 2 is VAX_750
	.word	1f-0b		# 3 is VAX_730
	.word	1f-0b		# 4 is VAX_8600
	.word	1f-0b		# 5 is VAX_8200
	.word	1f-0b		# 6 is VAX_8600
	.word	1f-0b		# 7 is MVAX_I
	.word	1f-0b		# 8 is MVAX_II
	.word	1f-0b		# 9 is VVAX
	.word	1f-0b		# 10 is VAX_3600 (Mayfair I)
	.word	2f-0b		# 11 is VAX_6200 (Calypso/CVAX)
	.word	1f-0b		# 12 is VAX_3600 (Mayfair II)
	.word	1f-0b		# 13 is CVAXSTAR
	.word	3f-0b		# 14 is VAX_60 (Firefox)
	.word	1f-0b		# 15 is VAX_3600 (Mayfair III)
	.word	1f-0b		# 16 RESERVED for MIPS processor
	.word	1f-0b		# 17 is VAX_8820 (Polarstar)
	.word	1f-0b		# 18 RESERVED for MIPS processor
	.word	1f-0b		# 19 RESERVED for MIPS processor
	.word	1f-0b		# 20 RESERVED for MIPS processor
	.word	1f-0b		# 21 RESERVED for MIPS processor
	.word	4f-0b		# 22 is VAX6400 (Calypso Rigel)
	.word	1f-0b		# 23 is VAXSTAR
	.word	1f-0b		# 24 RESERVED for MIPS processor
	.word	1f-0b		# 25 RESERVED for MIPS processor
	.word	1f-0b		# 26 is VAX_9000

4:
	# Rigel processor only.  The FPA is switched off on reset,
	# turn it on!
	# The following line turns on FPA and without affecting the
	# state of the vector present bit
	# (may need to examine the VINTSR<vector_unit_present> bit to see if 
	# there is a vector unit.  See Rigel spec for details.
	pushr	$0x2			# save r2
	mfpr	$ACCS,r2		# get copy of ACCS
	bisl2	$2,r2			# mask in bit to turn on FPA.
	mtpr	r2,$ACCS		# write back to ACCS
	movl	(sp)+,r2		# restore r2
	calls	$0,_clear_xrperr	# Clear errors to get by 2ndpass bug.
	calls	$0,_ka6400initslave
	brb	1f
	
3:
	calls	$0,_ka60initslave
	brb	1f

2:
	calls	$0,_ka6200initslave

1:	
	POPR

	bbc	CPU_NUM(r2),_vpmask,no_vp_reset

	pushr	$0x2			# save r2
	pushl	CPU_NUM(r2)		# param for vp_reset: cpu number
	calls	$1,_vp_reset
	movl	(sp)+,r2		# restore r2

no_vp_reset:

	pushl	$0x04010000		# psl = mode(k,k) ipl=1 is=1
	pushl	$idle0
	rei				# rei into idle loop (best we can do)

	.data
	.globl	_cpu
	.globl	_cpu_subtype
	.globl	_cpu_sub_subtype
	.globl	_cpu_systype
	.globl	_cpu_archident
	.globl	_vs_cfgtst
	.globl	_mb_slot
/*
 * The usage of the following variables requires explanation since
 * it is not obvious.  The VAX System ID register (IPR 62) has the
 * high order 8 bits <31:24> containing a CPU type, the low order
 * 24 bits are type dependent.  The CPU types are:
 *	0	Reserved to DIGITAL
 *	1	VAX 780 or VAX 785
 *	2	VAX 750
 *	3	VAX 730
 *	4	VAX 8600 or 8650
 *	5	VAX 8200, 8250, 8300, or 8350
 *	6	VAX 8500, 8530, 8550, 8700, or 8800
 *	7	MicroVAX-I chip
 *	8	MicroVAX-II chip
 *	9	VVAX
 *	10	CVAX chip
 *	11	Rigel chip
 *    Others	Reserved to DIGITAL
 *
 * In addition to SID, the newer processors (namely of the microvax 
 * family such as microVAX-II, CVAX, and RIGEL) have a SYS_TYPE register 
 * in physical address 0x20040004.
 * The high order 8 bits <31:24> of SYS_TYPE contain the system
 * type code, the next 8 bits <23:16> contain the rev level, and
 * the low 16 bits <15:0> contain type dependent information. The
 * system type codes are:
 *	1	MicroVAX-II
 *	4	VAXstation 2000
 *	2	Calypso systems (currently CVAX and RIGEL)
 *   Others	Reserved to DIGITAL
 *	
 * To simplify the job of identifying the many variants, the following
 * variables are used:
 *
 *	_cpu	
 *		ULTRIX's internal code for identifying different
 *		systems.  It is related but not identical to the CPU
 *		type field in the SID register.
 *
 *	_cpu_systype
 *		Contains the value of SYS_TYPE register for systems
 *		that has the SYS_TYPE register.
 *
 *	_cpu_subtype
 *		Contains the high 8 bits <31:24> system type field
 *		of the SYS_TYPE register.
 *
 *	_cpu_sub_subtype
 *		Contains bits<15:8> of the SYS_TYPE register.  It
 *		identifies system variants.
 *	_cpu_archident
 *		Contains the low 8 bits <7:0> of the SYS_TYPE register.
 *		
 */

_cpu:			.long	0
_cpu_subtype:		.long	0
_cpu_sub_subtype:	.long	0
_cpu_systype:		.long	0
_cpu_archident:		.long	0
_vs_cfgtst:		.long	0
_mb_slot:		.long	0
	.text
	.globl	start
start:
	.word	0
/*
 * If we are booted there should be an arg passed in.  If present, then
 * save the arg otherwise, assume the old boot path
 */
	tstl	(ap)			# arg present?
	beql	1f			# if not, skip ahead
	movl	4(ap),_vmbinfo		# otherwise, save the address passed
1:
	mtpr	$0,$TXCS		# shut down transmit interrupts
	mtpr	$0,$ICCS
/* set system control block base */
	mtpr	$_scb-0x80000000,$SCBB
/* set ISP and get cpu type (and sub-type) */
	movl	$_eintstack,sp
	mfpr	$SID,r0
	movab	_cpu,r1
	extzv	$24,$8,r0,(r1)		# _cpu is just the high byte of SID
	cmpl	$MVAX_II,_cpu		# is cpu a uVAX II chip?
	bneq	_is_C_VAX		#   no, so see if its a CVAX chip
	brb	1f			#   yes, so go get cpu subtype
_is_C_VAX:
	cmpl	$CVAX_CPU,_cpu		# is cpu a CVAX chip?
	bneq	2f			#   no, see if it is a VAX9000
	brb	1f			#   yes, go get cpu subtype
2:
	cmpl	$ST_9000,_cpu		# is cpu VAX9000?
	bneq	3f			#   no, see if it is a RIGEL chip
	movl	$VAX_9000,_cpu		# set _cpu to VAX_9000
	brw	_done			#

3:
	cmpl	$RIGEL_CPU,_cpu		# is cpu a RIGEL chip?
	bneq	4f			#   no, see if it is a MARIAH chip
	brb	1f			#   yes, go get cpu.subtype
4:
	cmpl	$MARIAH_CPU,_cpu	# is this a Mariah?
 	jneq	_done			#   no, don't have to get SYS_TYPE

/* When we get here, the CPU is uVAXII, CVAX, RIGEL or MARIAH, get SYS_TYPE */
1:
	movl	*$SID_EXT,r0		# Read in SYS_TYPE register.
	movl	r0,_cpu_systype		# save off copy of systype reg.
	movl	r0,_cpu_archident	# Save STS_TYPE ARCH_IDENT bits
	bicl2	$0xffffff00,_cpu_archident
	movab	_cpu_subtype,r1
	extzv	$24,$8,r0,(r1)		# Save upper 8 bits of SYS_TYPE

	/* uniquely identify Mariah if this is a Mariah CPU */	
	cmpl	$MARIAH_CPU,_cpu	# is this a Mariah?
	bneq	2f			#   no, go get sys_sub_type.
	movl	$MARIAH_VARIANT,_cpu_sub_subtype #load with Mariah code.
	movl	$RIGEL_CPU,_cpu		# piggyback Mariah on Rigel code.
	brb	3f

	/* get sys_sub_type from SID_EXT */
2:	extzv	$8,$8,_cpu_systype,_cpu_sub_subtype 

3:	cmpl	$CVAX_CPU,_cpu		# if CVAX {
	jneq	_is_RIGEL_CPU			#
	cmpl	$ST_CVAXQ,_cpu_subtype	#    if QBUS Mayfair {
	bneq	_is_VAX_60		#
	cmpl	$SB_KA650,_cpu_sub_subtype #   if Mayfair I {
	bneq	_is_VAX_3600		#
	movl	$VAX_3600,_cpu		#       set _cpu to VAX_3600
	brw	_done			#      }
_is_VAX_3600:
	cmpl	$SB_KA640,_cpu_sub_subtype #   else if Mayfair II {
	bneq	_is_VAX_3900		#
	movl	$VAX_3400,_cpu		#	set _cpu to VAX_3400
	brw	_done			#      }
_is_VAX_3900:
	movl	$VAX_3900,_cpu		#      else set _cpu to VAX_3900
	brw	_done			#    }
_is_VAX_60:
	cmpl	$ST_KA60,_cpu_subtype	#    else if Firefox {
	bneq	_is_CVAXSTAR		#
	movl	$VAX_60,_cpu		#	set _cpu to VAX_60
	movl	*$0x2014054a,_mb_slot	#	slot num of IO module from NVR
	brw	_done			#    }
_is_CVAXSTAR:
	cmpl	$ST_VAXSTAR,_cpu_subtype#    else if CVAXSTAR {
	bneq	_is_VAX_6200		#
	movl	$C_VAXSTAR,_cpu		#	set _cpu to C_VAXSTAR