locore.s

<B>Digital的Unix操作系统VAX 4.2源码</B>

	bleq	3f
	movl	r6,r0
3:
	prober	$3,r0,(r1)		# bytes accessible ?
	beql	ersb1			# no
	subl2	r0,r6			# last move?
	bneq	ciloop			# no

	movc3	r0,(r1),(r3)
/*	clrl	r0			# redundant */
	movl	(sp)+,r6		# restore r6
	rsb

ersb1:
	movl	(sp)+,r6		# restore r6
ersb:
	movl	$EFAULT,r0
	rsb

/*
 * Copy specified amount of data from kernel to the user space
 * Copyout(from, to, len)
 *	r1 == from (kernel source address)
 *	r3 == to (user destination address)
 *	r5 == length
 */
	.globl	_Copyout		# massaged to jsb.  Args R1 R3 R5
_Copyout:
#ifdef SMP_DEBUG
	tstl	_smp_debug
	beql	1f
	pushr	$0x3f
	calls	$0,_sleep_check
	popr	$0x3f
1:
#endif
	cmpl	r5,$(NBPG*CLSIZE)	# moving one page or less ?
	bgtru	1f			# no
	probew	$3,r5,(r3)		# bytes writeable?
	beql	ersb			# no
	movc3	r5,(r1),(r3)
/*	clrl	r0			# redundant */
	rsb
1:
	blss	ersb			# negative length?
	pushl	r6			# r6 = length
	movl	r5,r6
	bicl3	$~(NBPG*CLSIZE-1),r3,r0 # r0 = bytes on first page
	subl3	r0,$(NBPG*CLSIZE),r0
	addl2	$(NBPG*CLSIZE),r0	# plus one additional full page
	jbr	2f

coloop:
	movc3	r0,(r1),(r3)
	movl	$(2*NBPG*CLSIZE),r0	# next amount to move
2:
	cmpl	r0,r6
	bleq	3f
	movl	r6,r0
3:
	probew	$3,r0,(r3)		# bytes writeable?
	beql	ersb1			# no
	subl2	r0,r6			# last move?
	bneq	coloop			# no

	movc3	r0,(r1),(r3)
/*	clrl	r0			# redundant */
	movl	(sp)+,r6		# restore r6
	rsb

/*
 * Interrupt vector routines
 */
	.globl	_waittime

#define SCBVEC(name)	.align 2; .globl _X/**/name; _X/**/name
#define PANIC(msg)	clrl _waittime; pushab 1f; \
			calls $1,_panic; 1: .asciz msg
#define PRINTF(n,msg)	pushab 1f; calls $n+1,_printf; M_MSG(msg)
#define M_MSG(msg)	  .data; 1: .asciz msg; .text
#define PUSHR		pushr $0x3f
#define POPR		popr $0x3f
#define SBI0	0
#define SBI1	1
#define SBI_ERROR 0
#define SBI_WTIME 1
#define SBI_ALERT 2
#define SBI_FLT 3
#define SBI_FAIL 4

SCBVEC(machcheck):
	PUSHR; pushab 6*4(sp); calls $1,_machinecheck; POPR;
	addl2 (sp)+,sp; rei
SCBVEC(kspnotval):
	PUSHR; PANIC("KSP not valid");
SCBVEC(powfail):
	halt
SCBVEC(chme): SCBVEC(chms): SCBVEC(chmu):
	PUSHR; PANIC("CHM? in kernel");
SCBVEC(cmrd):
	PUSHR; calls $0,_memerr; POPR; rei
SCBVEC(wtime):
	PUSHR
	pushal 6*4(sp)
	cmpl	$VAX_8600,_cpu
	bneq	2f		# 2f because 1: used in panic macro
	pushl $SBI_ERROR	# 0 - sbierror type
	pushl $SBI0		# sbi0
	calls $3, _logsbi	#log 8600 sbi error 
	POPR
	PANIC("sbia0error")
2:
	cmpl	$VAX_60,_cpu
	beql	3f		# 3f - Firefox memerr interrtup
	pushl $SBI_WTIME		# 1 - wtime error type
	pushl $SBI0		# sbi0
	calls $3, _logsbi	#log non-8600 sbi error
	cmpl	$VAX_6400,_cpu	# if VAX6400, don't panic, we recovered.
	beql	5f
	cmpl	$VAX_6200,_cpu
	beql	5f

	PRINTF(1,"write timeout %x\n"); POPR;
	PANIC("wtimo")
3:
	calls $0,_ka60memerr	# Handle Firefox Mbus memerr interrupts
	addl2	$4,sp		# clean off the pushal above
5:
	POPR
	rei


SCBVEC(sbi0alert):
	cmpl	$VAX_8200,_cpu
	bneq	2f
	PUSHR
	calls	$0,_ka820rxcd
	POPR
	rei
	
2:	
	PUSHR; pushal 6*4(sp); pushl $SBI_ALERT; pushl $SBI0; calls $3, _logsbi; POPR; 
	PANIC("sbi0alert")

SCBVEC(sbi0flt):
	cmpl	$VAX_8820,_cpu
	beql	3f
	cmpl	$VAX_8800,_cpu
	bneq	2f
3:
	PUSHR
        pushab  6*4(sp)                  # make pc/psl an argument
	calls	$1,_ka8800nmifault       # for 8800 mchk changes
	POPR
	rei

2:
	PUSHR; pushal 6*4(sp); pushl $SBI_FLT; pushl $SBI0; calls $3, _logsbi; POPR;
	PANIC("sbi0flt")
SCBVEC(sbi0fail):
	PUSHR; pushal 6*4(sp); pushl $SBI_FAIL; pushl $SBI0; calls $3, _logsbi; POPR;
	PANIC("sbi0fail")

SCBVEC(sbi1fail):
	PUSHR; pushal 6*4(sp); pushl $SBI_FAIL; pushl $SBI1; calls $3, _logsbi; POPR; 
	PANIC("sbi1fail")
SCBVEC(sbi1alert):
	PUSHR; pushal 6*4(sp); pushl $SBI_ALERT; pushl $SBI1; calls $3, _logsbi; POPR; 
	PANIC("sbi1alert")
SCBVEC(sbi1flt):
	PUSHR; pushal 6*4(sp); pushl $SBI_FLT; pushl $SBI1; calls $2, _logsbi; POPR; 
	PANIC("sbi1flt")
SCBVEC(sbi1error):
	PUSHR; pushal 6*4(sp); pushl $SBI_ERROR; pushl $SBI1; calls $3, _logsbi; POPR; 
	PANIC("sbia1error")

#if NMBA > 0
SCBVEC(mba3int):
	PUSHR; pushl $3; brb 1f
SCBVEC(mba2int):
	PUSHR; pushl $2; brb 1f
SCBVEC(mba1int):
	PUSHR; pushl $1; brb 1f
SCBVEC(mba0int):
	PUSHR; pushl $0
1:	calls $1,_mbintr
	mfpr 	$ESP,r0
	incl	CPU_INTR(r0)
	POPR
	rei
#endif

#if defined(VAX780) || defined (VAX8600)

/*
 * Registers for the uba handling code
 */
#define rUBANUM r0
#define rUBAHD	r1
#define rUVEC	r3
#define rUBA	r4
#define rUBAPC  r5
/* r2 are scratch */

SCBVEC(ua6int):
	PUSHR; moval 6*4(sp), rUBAPC; movl $6,rUBANUM; moval _uba_hd+(6*UH_SIZE),rUBAHD; brb 1f
SCBVEC(ua5int):
	PUSHR; moval 6*4(sp), rUBAPC; movl $5,rUBANUM; moval _uba_hd+(5*UH_SIZE),rUBAHD; brb 1f
SCBVEC(ua4int):
	PUSHR; moval 6*4(sp), rUBAPC; movl $4,rUBANUM; moval _uba_hd+(4*UH_SIZE),rUBAHD; brb 1f
SCBVEC(ua3int):
	PUSHR; moval 6*4(sp), rUBAPC; movl $3,rUBANUM; moval _uba_hd+(3*UH_SIZE),rUBAHD; brb 1f
SCBVEC(ua2int):
	PUSHR; moval 6*4(sp), rUBAPC; movl $2,rUBANUM; moval _uba_hd+(2*UH_SIZE),rUBAHD; brb 1f
SCBVEC(ua1int):
	PUSHR; moval 6*4(sp), rUBAPC; movl $1,rUBANUM; moval _uba_hd+(1*UH_SIZE),rUBAHD; brb 1f
SCBVEC(ua0int):
	PUSHR; moval 6*4(sp), rUBAPC; movl $0,rUBANUM; moval _uba_hd+(0*UH_SIZE),rUBAHD;

1:
	mfpr 	$ESP,r2
	incl	CPU_INTR(r2)
	mfpr	$IPL,r2 			/* r2 = mfpr(IPL); */
	movl	UH_UBA(rUBAHD),rUBA		/* uba = uhp->uh_uba; */
	movl	UBA_BRRVR-0x14*4(rUBA)[r2],rUVEC
					/* uvec = uba->uba_brrvr[r2-0x14] */
ubanorm:
	bleq	ubaerror
	addl2	UH_VEC(rUBAHD),rUVEC		/* uvec += uh->uh_vec */
	bicl3	$3,(rUVEC),r1
	jmp	2(r1)				/* 2 skips ``pushr $0x3f'' */
ubaerror:
	tstl	rUVEC				/* set condition codes */
	beql	zvec				/* branch if zero vector */
ubaerr1:
	PUSHR; calls $0,_ubaerror; POPR 	/* ubaerror r/w's r0-r5 */
	tstl rUVEC; jneq ubanorm		/* rUVEC contains result */
	brb	rtrn	
zvec:
	tstl	UH_ZVFLG(rUBAHD)		/* zero vector timer flg set? */
	beql	ubaerr1				/* yes -- inc counter here */
						/* no  -- call ubaerror */
	incl	UH_ZVCNT(rUBAHD)		/* bump zero vector counter */
rtrn:
	POPR
	rei

#endif VAX780 || VAX8600

/* MSI interrupt routine */

#if NMSI > 0
SCBVEC(msi0int):
        movq    r0,-(sp)
        movq    r2,-(sp)
        movq    r4,-(sp)
	pushl	$0
        calls	$1,_msi_isr
	mfpr $ESP,r0
	incl CPU_INTR(r0)
        movq    (sp)+,r4
        movq    (sp)+,r2
        movq    (sp)+,r0
	rei
#endif

/* Console xmit/rcv interrupt routines */

SCBVEC(cnrint):
	PUSHR; pushl $0; calls $1,_cnrint; mfpr $ESP,r0; incl CPU_INTR(r0);
	POPR; rei
SCBVEC(cnxint):
	PUSHR; pushl $0; calls $1,_cnxint; mfpr $ESP,r0; incl CPU_INTR(r0);
	POPR; rei

/* 3 Serial lines on VAX8200 == cpu type #5 */
/* pushl $1,$2,$3 is the index into the struct tty cons array */

SCBVEC(cnrint1):
	PUSHR
	cmpl $VAX_8200,_cpu
	bneq 1f
	pushl $1
	calls $1,_cnrint
1:
	mfpr $ESP,r0; incl CPU_INTR(r0);
	POPR
	rei
SCBVEC(cnxint1):
	PUSHR
	cmpl $VAX_8200,_cpu
	bneq 1f
	pushl $1
	calls $1,_cnxint
1:
	mfpr $ESP,r0; incl CPU_INTR(r0);
	POPR
	rei
SCBVEC(cnrint2):
	PUSHR
	cmpl $VAX_8200,_cpu
	bneq 1f
	pushl $2
	calls $1,_cnrint
1:
	mfpr $ESP,r0; incl CPU_INTR(r0);
	POPR
	rei
SCBVEC(cnxint2):
	PUSHR
	cmpl	_cpu,$VAX_3400
	jneq	1f
	pushl	$0
	calls	$1,_lnintr
1:
	cmpl	_cpu,$VAX_8200
	jneq	1f
	pushl	$2
	calls	$1,_cnxint
1:	
	mfpr $ESP,r0; incl CPU_INTR(r0);
	POPR
	rei
SCBVEC(cnrint3):
	PUSHR
	cmpl $VAX_8200,_cpu
	bneq 1f
	pushl $3
	calls $1,_cnrint
1:
	mfpr $ESP,r0; incl CPU_INTR(r0);
	POPR
	rei
SCBVEC(cnxint3):
	PUSHR
	cmpl $VAX_8200,_cpu
	bneq 1f
	pushl $3
	calls $1,_cnxint
1:
	mfpr $ESP,r0; incl CPU_INTR(r0);
	POPR
	rei

SCBVEC(hardclock):
	PUSHR
	mtpr $ICCS_RUN|ICCS_IE|ICCS_INT|ICCS_ERR,$ICCS
	pushl 4+6*4(sp); pushl 4+6*4(sp);
	calls $2,_hardclock			# hardclock(pc,psl)
#if NPS > 0
	tstb	_nNPS
	beql	1f
	pushl	4+6*4(sp); pushl 4+6*4(sp);
	calls	$2,_psextsync
#endif
1:	POPR;
	rei

SCBVEC(intqueue):			# Entry point for SIRR 7's
	PUSHR				#  @ IPL 7
	calls	$0,_intqueue
	POPR
	rei
SCBVEC(softclock):
	PUSHR
	pushl	4+6*4(sp); pushl 4+6*4(sp)
	calls	$2,_softclock			# softclock(pc,psl)
	POPR
	rei
#include "../net/net/netisr.h"
	.globl	_netisr
SCBVEC(netintr):
	pushr	$0x83f
	moval	_netisr_tab, r11     	# while (netisr_tab[i] >= 0)
startwhile:
	tstl	(r11)
	jlss	endwhile
	bbcc	(r11)+,_netisr,1f;  calls $0,*(r11)+; jbr startwhile; 1:	
	tstl	(r11)+
	jbr 	startwhile
endwhile:
	popr	$0x83f
	rei
SCBVEC(consdin):
	PUSHR;
	casel	_cpu,$1,$CPU_MAX
0:
	.word	1f-0b		# 1 is 780
	.word	3f-0b		# 2 is 750
	.word	3f-0b		# 3 is 730
	.word	4f-0b		# 4 is 8600
	.word	5f-0b		# 5 is 8200
	.word	1f-0b		# 6 is 8800
	.word	1f-0b		# 7 is MVAX_I
	.word	1f-0b		# 8 is MVAX_II
	.word	1f-0b		# 9 is VVAX
	.word	1f-0b		# 10 is VAX_3600 (Mayfair I)
	.word	1f-0b		# 11 is VAX6200 (Calypso CVAX)
	.word	1f-0b		# 12 is VAX_3400 (Mayfair II)
	.word	1f-0b		# 13 is C_VAXSTAR (PVAX)
	.word	1f-0b		# 14 is VAX_60 (Firefox)
	.word	1f-0b		# 15 is VAX_3400 (Mayfair II)
	.word	1f-0b		# 16 RESERVED for MIPS processor
	.word	1f-0b		# 17 is VAX_8820 (Polarstar)
	.word	1f-0b		# 18 RESERVED for MIPS processor
	.word	1f-0b		# 19 RESERVED for MIPS processor
	.word	1f-0b		# 20 RESERVED for MIPS processor
	.word	1f-0b		# 21 RESERVED for MIPS processor
	.word	1f-0b		# 22 is VAX_6400 (Calypso Rigel)
	.word	1f-0b		# 23 is VAXSTAR
	.word	1f-0b		# 24 RESERVED for MIPS processor
	.word	1f-0b		# 25 RESERVED for MIPS processor
	.word	6f-0b		# 26 is VAX_9000

1:	halt
#if defined(VAX750) || defined(VAX730)
2:	jsb	 tudma		 # 750
/*	mfpr	$CSRD,r5         # If using new tudma code
	pushl	$0
	pushl	r5
	pushal	_turintr
	calls	$3,_chrqueue
	brb	1f    */
3:	calls $0,_turintr	# 750/730
#else
2:
3:
#endif
	brb 1f
4:
#if defined(VAX8600)
	calls $0,_crlintr	# 8600
#endif
	brb 1f
5:
#if defined(VAX8200)
	calls $0,_rx5_intr	#8200
#endif
	brb 1f
6:
#if defined(VAX9000)
        calls   $0,_ka9000_rxfct_isr    # 9000
#endif

1:
	mfpr $ESP,r0; incl CPU_INTR(r0);
	POPR
	rei
SCBVEC(consdout):
	PUSHR;
	casel	_cpu,$1,$CPU_MAX
0:
	.word	1f-0b		# 1 is VAX_780
	.word	2f-0b		# 2 is VAX_750
	.word	2f-0b		# 3 is VAX_730
	.word	1f-0b		# 4 is VAX_8600
	.word	1f-0b		# 5 is VAX_8200
	.word	1f-0b		# 6 is VAX_8800
	.word	1f-0b		# 7 is MVAX_I
	.word	1f-0b		# 8 is MVAXII
	.word	1f-0b		# 9 is VVAX
	.word	1f-0b		# 10 is VAX_3600 (Mayfair I)
	.word	1f-0b		# 11 is VAX6200 (Calypso CVAX)
	.word	1f-0b		# 12 is VAX_3400 (Mayfair II)
	.word	1f-0b		# 13 is C_VAXSTAR (PVAX)
	.word	1f-0b		# 14 is VAX_60 (Firefox)
	.word	1f-0b		# 15 is VAX_3400 (Mayfair II)
	.word	1f-0b		# 16 RESERVED for MIPS processor
	.word	1f-0b		# 17 is VAX_8820 (Polarstar)
	.word	1f-0b		# 18 RESERVED for MIPS processor
	.word	1f-0b		# 19 RESERVED for MIPS processor
	.word	1f-0b		# 20 RESERVED for MIPS processor
	.word	1f-0b		# 21 RESERVED for MIPS processor
	.word	1f-0b		# 22 is VAX_6400 (Calypso Rigel)
	.word	1f-0b		# 23 is VAXSTAR
	.word	1f-0b		# 24 RESERVED for MIPS processor
	.word	1f-0b		# 25 RESERVED for MIPS processor
	.word	1f-0b		# 26 is VAX_9000
1:	halt
2:
#if defined(VAX750) || defined(VAX730)
	calls $0,_tuxintr	# 750/730
#endif
        brb     1f

1:
#if defined(VAX750) || defined(VAX730) || defined(VAX9000)
	mfpr $ESP,r0; incl CPU_INTR(r0);
	POPR
	rei
#endif

#if NDZ > 0
/*
 * DZ pseudo dma routine: