kn02.c

<B>Digital的Unix操作系统VAX 4.2源码</B>

#ifndef lint
static char *sccsid = "@(#)kn02.c	4.8      (ULTRIX)  4/11/91";
#endif lint

/************************************************************************
 *									*
 *			Copyright (c) 1989 by				*
 *		Digital Equipment Corporation, Maynard, MA		*
 *			All rights reserved.				*
 *									*
 *   This software is furnished under a license and may be used and	*
 *   copied  only  in accordance with the terms of such license and	*
 *   with the  inclusion  of  the  above  copyright  notice.   This	*
 *   software  or  any  other copies thereof may not be provided or	*
 *   otherwise made available to any other person.  No title to and	*
 *   ownership of the software is hereby transferred.			*
 *									*
 *   The information in this software is subject to change  without	*
 *   notice  and should not be construed as a commitment by Digital	*
 *   Equipment Corporation.						*
 *									*
 *   Digital assumes no responsibility for the use  or  reliability	*
 *   of its software on equipment which is not supplied by Digital.	*
 *									*
 ************************************************************************/

/*
 * Modification History:
 *
 * 11-Apr-91    Paul Grist
 *	Modified trap routine to account for NVRAM if it is present,
 *	and handle errors on NVRAM appropriately.
 *
 * 07-Mar-91	Randall Brown
 *	Fixed a bug in kn02conf().  Must have a return value.
 *
 * 07-Feb-91	Paul Grist
 *	Added latent support for Prestoserve on 3max platform.
 *
 * 13-Sep-90    szczypek
 *	Added support for new 3max TURBOchannel console callbacks.  Call
 *	rex_halt() if new ROM present.
 *
 * 07-Sep-90	sekhar
 *	fixed kn02consprint() to set the pkt type field.
 *	fixed to log an esr pkt on write timeout only when panicing.
 *
 * 06-Sep-90	Randall Brown 
 *	Changed slot_order to config_order. 
 *
 * 13-Aug-90	sekhar
 *	changes to support memory mapped devices:
 *	added kn02consinfo_t to capture error information.
 *	added a new function kn02_print_consinfo() exported through cpusw.
 *	modified bus timeout code to capture error information and 
 *	post softnet() interrupt.
 *	Also integrated kn02_print_consinfo and kn02consprint to avoid 
 *	duplication of code.
 *
 * 03-Aug-90	Randall Brown
 *	Added call to spl_init() to intialize spl function pointers and
 *      the intr() function pointer.
 *
 * 26-Jan-90	Randall Brown
 *	Moved support of the TURBOchannel to io/tc/tc.c
 *
 * 29-Dec-89	afd
 *	Added 2 new fields to kn02_ioslot data struct, for when to enable
 *	the interrupt line for devices.  This info comes out of the
 *	maxoption data table.
 *
 *	Added module name (from ROM) to kn02_ioslot struct.
 *
 *	Changed kn02trap_error to use soft copies of "erradr" and "chksyn".
 *
 *	Add adapter config code.
 *
 * 02-Dec-89 -- afd
 *	Set fixtick to the number of microsec's that the clock looses per
 *	second.  This is used in hardclock() to fix the time.
 *
 * 30-Oct-89	afd
 *	Added error handling code.  Added kn02where_option routine
 *	    so consinit can figure out if there is a cfb module.
 *	Shift phys addr from erradr reg in consprint.
 *	Catch repeat bus error when dumping after an ECC error.
 *
 * 13-Oct-89	gmm
 * 	Moved the position for including cpu.h. Needed after smp changes
 *
 * 29-Sept-89 afd
 *     First boot level: a few bug fixes, several clean-ups.
 *
 * 15-Sept-89	afd
 *	Set up the order in which to configure the IO slots in "config_order".
 *	This determines how the unit numbers are asigned.
 *
 *	Added the kn02ie_mask word so we can enable just the IO slots that
 *	configured properly.
 *
 * 12-Sept-89	afd
 *	Created this file for kn02 (3max) support.
 */
#include "../machine/pte.h"
#include "../machine/cpu.h"

#include "../h/param.h"
#include "../h/systm.h"
#include "../h/map.h"
#include "../h/buf.h"
#include "../h/dk.h"
#include "../h/user.h"			/* gets time.h and debug.h too */
#include "../h/proc.h"
#include "../h/vm.h"
#include "../h/conf.h"
#include "../h/errlog.h"
#include "../h/cmap.h"
#include "../h/config.h"
#include "../h/presto.h"

#include "../io/uba/ubareg.h"
#include "../io/uba/ubavar.h"
#include "../io/tc/tc.h"

#include "../machine/fpu.h"
#include "../machine/hwconf.h"
#include "../machine/reg.h"
#include "../machine/mc146818clock.h"
#include "../machine/entrypt.h"
#include "../../machine/common/cpuconf.h"

#define ESR_INTR_PKT 1			/* pkt types for consprint */
#define ESR_BUS_PKT 2
#define MEMPKT 3

#define KN02CSR_ADDR	0x1ff00000		/* CSR (incl IO intr bits) */
#define KN02IE_OFFSET	16			/* offset in CSR to IE bits */
#define KN02CSR_PSWARN	0x08000000		/* 32MB modules if set,else 8 */
#define KN02CSR_ECCMD	0x0000c000		/* ECC mode bits */
#define KN02CSR_ECCCOR	0x00002000		/* ECC correct bits */
#define KN02CSR_BNK32M	0x00000400		/* 32MB modules if set,else 8 */

#define KN02ERR_ADDR	0x1fd80000		/* Error register */
#define ERR_VALID	0x80000000		/* ERRADR valid bit */
#define ERR_TYPE	0x70000000		/* ERRADR error type bits */
#define ERR_WECC	0x70000000		 /* CPU partial mem write ECC */
#define ERR_WTMO	0x60000000		 /* CPU write timeout */
#define ERR_RECC	0x50000000		 /* CPU memory read ECC */
#define ERR_RTMO	0x40000000		 /* CPU read timeout */
#define ERR_DMAWOVR	0x20000000		 /* DMA write overrun */
#define ERR_DMARECC	0x10000000		 /* DMA memory read ECC */
#define ERR_DMAROVR	0x00000000		 /* DMA read overrun */
#define ERR_UKN		0x00000001		 /* unknown error */
#define ERR_ADDR	0x07ffffff		/* ERRADR error addr bits */
#define ERR_COLADDR	0x00000fff		/* ERRADR column addr bits */

#define KN02CHKSYN_ADDR	0x1fd00000		/* ECC check/syndrome reg */
#define CHKSYN_VLDLO	0x00008000		/* chksyn valid lo bit */
#define CHKSYN_SNGLO	0x00000080		/* chksyn lo-order single bit */
#define CHKSYN_VLDHI	0x80000000		/* chksyn valid hi bit */
#define CHKSYN_SNGHI	0x00800000		/* chksyn hi-order single bit */

/*
 * Bits in chksyn_plus (logged in memory error packet)
 * <31>		pc valid bit, set on bus error, cleared on intr error
 * <30:20>	error count for this module (max count for field is 2k)
 * <19:16>	module number in error (0 to 14)
 * <15:0>	half of chksyn that had valid error data
 */
#define CPLUS_VALID	0x80000000
#define CPLUS_EOFF	20
#define CPLUS_EMASK	0x7ff00000
#define CPLUS_MOFF	16
#define CPLUS_MMASK	0x000f0000
#define CPLUS_CHK	0x0000ffff
#define MAXERRCNT	2048

int kn02pswarn = 0;			/* set true if we had a ps-warning */
#define MEM_MODULES 15			/* numbered 0..MEM_MODULES-1 */
int kn02memerrs[MEM_MODULES] =		/* mem err count per module */
	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };

#define CRDINTVL (60*15)	/* time delta to enable CRD log - 15 minutes */
int kn02crdintvl = CRDINTVL;	/* global var so we can change it */
int kn02crdlog = 1;		/* is CRD logging currently enabled */

#define PSINTVL (60*1)		/* time delta to check pswarn bit */
int kn02psintvl = PSINTVL;	/* global var so we can change it */

struct crd_errcnt {             /* MEM_CRD */
        long   crd_last;	/* time of most recent CRD err */
        long   crd_prev;	/* time of previous CRD err */
} crd_errcnt = { 0, 0 };

int kn02eccpanic = 0;		/* set true if already panic'ing */
int kn02erradr;			/* software copy of hardware erradr */
int kn02chksyn;			/* software copy of hardware chksyn */

/*
 * Info for 3max I/O device "slots"
 */
#define OPTION_SLOTS 3

#define SLOT_0_ADDR 0x1e000000
#define SLOT_1_ADDR 0x1e400000
#define SLOT_2_ADDR 0x1e800000
#define SLOT_3_ADDR 0x0
#define SLOT_4_ADDR 0x0
#define SLOT_5_ADDR 0x1f400000
#define SLOT_6_ADDR 0x1f800000
#define SLOT_7_ADDR 0x1fc00000

#define	KN02DC_ADDR	0x1fe00000		/* phys addr of dc7085 (dz) */

#define	KN02CLOCK_ADDR	0x1fe80000		/* phys addr of clock chip */

u_int kn02_slotaddr[TC_IOSLOTS] = {SLOT_0_ADDR, SLOT_1_ADDR, SLOT_2_ADDR,
	SLOT_3_ADDR, SLOT_4_ADDR, SLOT_5_ADDR, SLOT_6_ADDR, SLOT_7_ADDR};

/*
 * Program the order in which to probe the IO slots on the system.
 * This determines the order in which we assign unit numbers to like devices.
 * It also determines how many slots (and what slot numbers) there are to probe.
 * Terminate the list with a -1.
 * Note: this agrees with the console's idea of unit numbers
 */
int kn02config_order [] = { 5, 6, 7, 0, 1, 2, -1 };

/*
 * We will set bits in this mask as we config the dev/ctlr in each slot.
 * So interrupts will only be enabled for a slot that configures ok.
 */
u_int kn02ie_mask = 0;

caddr_t vatophys();		/* function  typedef */
int kn02enable_option();
int kn02disable_option();
int kn02clear_errors();
int kn02crdenable();
int kn02pscheck();
extern int nofault;		/* to test for parity errors */
extern u_int printstate;	/* how to print to the console */
extern char *rt_clock_addr;	/* addr of the mc146818clock chip */
extern struct timeval time;	/* the system time */
extern int hz;
extern int tick;
extern int tickadj;
extern int fixtick;		/* set to the number of microsec's that the
				   clock looses per second */


/*
 * NVRAM/Prestoserve support definitions
 *
 */

#define KN02_NVRAM_DIAG		0x3f8	      /* offset to diag reg on nvram */
#define KN02_NVRAM_ID		0x3fc	      /* offset to NVRAM ID location */
#define KN02_NVRAM_IDENTIFIER   0x03021966    /* NVRAM board ID signature */
#define KN02_NVRAM_START	0x400	      /* offset to NVRAM cache addr */ 

#define KN02_NVRAM_RO      0x00000002         /* read only test failed */
#define KN02_NVRAM_RW      0x00000004         /* read/write test failed */
#define KN02_NVRAM_FAILED  0x00000008         /* MASK out fail bit */
#define NVRAM_SIZE         0x000000f0         /* MASK out nvram size bits */


#define KN02_NVRAM_BDISC    0x00000002        /* status reg mask for bdisc */
#define KN02_NVRAM_BOK      0x00000001        /* status reg mask for bok   */

volatile unsigned int kn02_nvram_csr;         /* status/control reg addr*/
volatile unsigned int kn02_nvram_diag;        /* diagnostic reg addr*/

int kn02_nvram_found = 0;		      /* nvram is present on system*/
short kn02_test = 0;
short kn02_nvram_debug = 0;
#define Dprintf  if(kn02_nvram_debug)printf

/*
 * Interrupt handlers for the 6 hardware interrupts and 2 software
 * interrupts for 3MAX.
 */
extern softclock(), softnet(), kn02iointr(), hardclock(), kn02stray(),
	kn02errintr(), kn02halt(), fpuintr();

/* The routines that correspond to each of the 8 interrupt lines */
int (*kn02intr_vec[IPLSIZE])() = {
	softclock,		/* softint 0	*/
	softnet,		/* softint 1	*/
	kn02iointr,		/* hardint 0	*/
	hardclock,		/* hardint 1	*/
	kn02stray,		/* hardint 2	*/
	kn02errintr,		/* hardint 3  	*/
	kn02stray,		/* hardint 4	*/
	fpuintr			/* hardint 5	*/
};

/* The masks to use to look at each of the 8 interrupt lines */
int kn02iplmask[IPLSIZE] = {
	SR_IMASK1|SR_IEC,
	SR_IMASK2|SR_IEC,
	SR_IMASK3|SR_IEC,
	SR_IMASK4|SR_IEC,
	SR_IMASK5|SR_IEC,
	SR_IMASK6|SR_IEC,
	SR_IMASK7|SR_IEC,
	SR_IMASK8|SR_IEC
};

/* The SR reg masks for splxxx usage */
int kn02splm[SPLMSIZE] = {
	SR_IEC | SR_IMASK0,		/* 0 SPLNONE			*/
	SR_IEC | SR_IMASK1,		/* 1 SPLSOFTC			*/
	SR_IEC | SR_IMASK2,		/* 2 SPLNET			*/
	0,				/* 3 NOT_USED 			*/
	0,				/* 4 NOT_USED 			*/
	SR_IEC | SR_IMASK3,		/* 5 SPLBIO, SPLIMP, SPLTTY	*/
	SR_IEC | SR_IMASK4,		/* 6 SPLCLOCK			*/
	SR_IEC | SR_IMASK6,		/* 7 SPLMEM			*/
	SR_IEC | SR_IMASK8,		/* 8 SPLFPU			*/
};

/*
 *	The structure kn02consinfo_t can be used to store information
 *	to be printed on a console. This information can then be printed
 *	by kn02_print_consinfo() which is exported  through the cpusw.
 *
 *	Currently this is used only by the bus timeout code(although it 
 *	is a general pupose mechanism).
 */
 
/* error and information to be dumped on a console on a ESR_INTR_PKT type */

struct kn02consinfo_intr_t {
	u_int	cause;	/* from the exception frame */
	u_int	sr;	/* from the exception frame */
	u_int 	sp;	/* from the exception frame */
	u_int	csr;
	u_int	erradr;
};

/* error information to be dumped on a console on a ESR_BUS_PKT type */

struct kn02consinfo_bus_t {
	u_int	cause;		/* from the exception frame */
	u_int	sr;		/* from the exception frame */
	u_int 	sp;		/* from the exception frame */
	u_int	epc; 		/* from the exception frame */
	u_int	badvaddr; 	/* from the exception frame */
	u_int	csr;
	u_int	erradr;
};

/* console information to be dumped on a console on a MEMPKT type */

struct kn02consinfo_mem_t {
	u_int	csr;
	u_int	erradr;
	u_int	chksyn_plus;
	u_int	epc;
};

struct kn02consinfo_t {
	int	pkt_type;		/* pkt type */
	union {
	    struct  kn02consinfo_intr_t	intrp;
	    struct  kn02consinfo_bus_t 	busp;
	    struct  kn02consinfo_mem_t 	memp;
	} pkt;
} kn02consinfo;

/*
 *	The structure kn02log_errinfo_t can be used to store information
 *	to be logged to the error log file. This information can be logged 
 *	by kn02_log_errinfo() which is exported  through the cpusw.
 *
 *	Currently this is used only by the bus timeout code(although it 
 *	is a general pupose mechanism).
 */

struct kn02log_errinfo_t {
	int	pkt_type;
	u_int	cause;		/* from the exception frame */
	u_int	sr;		/* from the exception frame */
	u_int 	sp;		/* from the exception frame */
	u_int	epc; 		/* from the exception frame */
	u_int	badvaddr; 	/* from the exception frame */
	u_int	csr;
	u_int	erradr;
} kn02log_errinfo;


/*
 * Initialization routine for kn02 processor (3max).
 */
kn02init()
{
	int i;
	extern int c0vec_tblsize;
	extern int (*c0vec_tbl[])();
	extern int iplmask[];
	extern int splm[];
	extern struct cpusw *cpup;

	/*
	 * Initialize the interrupt dispatch table c0vec_tbl.
	 * Initialize the spl table for the system we are running on.
	 * Initialize the interrupt masks for the system we are running on.