ciport.h

<B>Digital的Unix操作系统VAX 4.2源码</B>

					/* CI Fatal Error Event Codes	     */
/* CI fatal error events are always local port specific.  There are currently
 * no path or remote port specific CI fatal error events.  ci_console_log(),
 * ci_clfe[], and ci_cltab[][] must be updated to reflect new additions. 
 * ci_log_initerr() must be updated when the new local port specific CI fatal
 * error event may occur during initial probing of the local CI port.
 * ci_log_dev_attn() must be updated when the new local port specific CI fatal
 * error event may NOT occur during initial probing of the local CI port.
 * ci_crash_lport() also requires updating when the new addition is a candidate
 * for application of the local port crash severity modifier( ESM_LPC ).
 *
 * The following CI fatal error events are local port specific and may have the
 * local port crash severity modifier( ESM_LPC ) applied:
 *
 *	NOCI, BADMAXPORT, BADUCODE, PORTERROR
 *
 * The following CI fatal error events are local port specific but may NOT have
 * the local port crash severity modifier( ESM_LPC ) applied:
 *
 *	INIT_NOMEM, INIT_ZEROID, INIT_NOUCODE, INIT_UNKHPT, INIT_MISMTCH,
 *	UCODE_LOAD, UCODE_START, CPU
 *
 * The local port station address is displayed by default during console
 * logging of all CI fatal error events.
 *
 * NOTE: Not all local port specific CI fatal error events are candidates for
 *	 application of the local port crash severity modifier( ESM_LPC ).
 *
 * NOTE: When updating ci_clfe[] with a new CI fatal error event bear in mind
 *	 the information displayed by default when choosing an appropriate
 *	 console formatting code( CF ).
 */
#define	FE_INIT_NOMEM	( PDFE | 0x01 )	/* Init - insufficient memory        */
#define	FE_INIT_ZEROID	( PDFE | 0x02 )	/* Init - zero system id number      */
#define	FE_INIT_NOUCODE	( PDFE | 0x03 )	/* Init - can't find CI microcode    */
#define	FE_INIT_UNKHPT	( PDFE | 0x04 )	/* Init - unknown hardware port type */
#define	FE_INIT_MISMTCH	( PDFE | 0x05 )	/* Init - ucode-port type mismatch   */
#define	FE_UCODE_LOAD	( PDFE | 0x06 )	/* Unable to verify microcode load   */
#define	FE_UCODE_START	( PDFE | 0x07 )	/* Unable to start microcode	     */
#define	FE_CPU		( PDFE | 0x08 )	/* Init - CPU ucode not at rev level */
#define	FE_NOCI		( PDFE | 0x09 )	/* CI adapter permanently absent     */
#define	FE_BADMAXPORT	( PDFE | 0x0A )	/* Invalid maximum port number	     */
#define	FE_BADUCODE	( PDFE | 0x0B )	/* Invalid CI ucode revision levels  */
#define	FE_PORTERROR	( PDFE | 0x0C )	/* Misc fatal port error reported    */

					/* Loadable Microcode Types	     */
#define	UCODE_CI780		 1	/* CI780/CI780/CIBCI Functional Ucode*/
#define	UCODE_CIBCA		 2	/* CIBCA-AA Functional Microcode     */

					/* Local Port Mapping Constants      */
#define	MAP_REGS		 0	/* Map only the I/O adapter space    */
#define	MAP_FULL		 1	/* Map fully the local CI port	     */

					/* Port Command Operation Codes	     */
#define	RETCNF			 3	/* Returned confirm - UNUSED	     */
#define	CNFRET			 3	/* Confirm returned - UNUSED	     */
#define	REQID			 5	/* Request identification	     */
#define	IDREQ			 5	/* Identification requested	     */
#define	SNDRST			 6	/* Send reset 			     */
#define	RSTSNT			 6	/* Reset sent 			     */
#define	SNDSTRT			 7	/* Send start			     */
#define	STRTSNT			 7	/* Start send			     */
#define REQDAT0			 8	/* Request data @ priority 0 - UNUSED*/
#define DATREQ0			 8	/* Data requested @ priority 0 UNUSED*/
#define REQDAT1			 9	/* Request data @ priority 1	     */
#define DATREQ1			 9	/* Data requested @ priority 1	     */
#define REQDAT2			10	/* Request data @ priority 2 - UNUSED*/
#define DATREQ2			10	/* Data requested @ priority 2 UNUSED*/
#define	SNDLB			13	/* Send loopback		     */
#define	LBSNT			13	/* Loopback sent		     */
#define	REQMDAT			14	/* Request maintenance data - UNUSED */
#define	MDATREQ			14	/* Maintenance data requested UNUSED */
#define	SNDDAT			16	/* Send data			     */
#define	DATSNT			16	/* Data sent			     */
#define	RETDAT			17	/* Return data - UNUSED		     */
#define	DATRET			17	/* Data returned - UNUSED	     */
#define	SNDMDAT			18	/* Send maintenance data - UNUSED    */
#define	MDATSNT			18	/* Maintenance data sent - UNUSED    */
#define	INVTC			24	/* Invalidate translation cache	     */
#define	TCINV			24	/* Translation cache invalidated     */
#define	SETCKT			25	/* Set circuit			     */
#define	CKTSET			25	/* Circuit set			     */
#define	RDCNT			26	/* Read counters - UNUSED	     */
#define	CNTRD			26	/* Counters read - UNUSED	     */
#define	CNFREC			35	/* Confirm received		     */
#define	MCNFREC			36	/* Maintenance confirm recvd - UNUSED*/
#define	IDREC			43	/* Identification received	     */
#define	LBREC			45	/* Loopback received		     */
#define	DATREC			49	/* Data received		     */
#define	MDATREC			51	/* Maintenance data received - UNUSED*/

					/* Port Driver Panic Strings	     */
#define	PANIC_BADUNMAP	"ci\t- invalid unmapping of local port\n"
#define	PANIC_CABLE	"ci\t- unknown cable status check requested\n"
#define	PANIC_HPT	"ci\t- unknown/invalid hardware port type\n"
#define	PANIC_IC	"ci\t- unknown interconnect type\n"
#define	PANIC_MAP	"ci\t- attempting to map already mapped adapter\n"
#define	PANIC_NOSCPKT	"ci\t- no set circuit off command packet\n"
#define	PANIC_NOTCPKT  "ci\t- no invalidate translation cache command packet\n"
#define	PANIC_ONBOARD	"ci\t- attempting to load unnecessary microcode\n"
#define	PANIC_PCCBFB	"ci\t- invalid pccb fork block\n"
#define	PANIC_REQLPC	"ci\t- panic requested on all local port failures\n"
#define	PANIC_UNKCF	"ci\t- unknown console logging formatting code\n"
#define	PANIC_UNKCODE	"ci\t- unknown/invalid event code\n"
#define	PANIC_UNKLPC	"ci\t- unknown local port crash reason\n"
#define	PANIC_UNMAP	"ci\t- attempting to unmap already unmapped adapter\n"

					/* Status Error Subtypes	     */
#define	ST_PSVIO		 0	/* Packet size violation	     */
#define	ST_UPKT			 1	/* Unrecognized packet		     */
#define	ST_DPORT		 2	/* Invalid destination port	     */
#define	ST_UCMD			 3	/* Unrecognized port command	     */
#define	ST_ABORT		 4	/* Command aborted( port disabled )  */
#define	ST_INVPA		 5	/* Invalid port addr. in recv. pkt.  */
#define	ST_INVSN		 6	/* Invalid sequence number on VC     */
#define	ST_IRESVCD		 7	/* Insufficient VCD resources        */
#define	ST_IRESEQ		 8	/* Insufficient reseq. resources RDP */
#define	ST_DISCVCPKT		 9	/* Discarded VC pkt RDP adap. only   */
#define	ST_INVDDL		10	/* Invalid destination datalink addr */

					/* Status Error Types		     */
#define	T_OK			 0	/* Status is OK			     */
#define	T_VCC			 1	/* VC closed before command execution*/
#define	T_INVBNAME		 2	/* Invalid buffer name		     */
#define	T_INVBSIZE		 3	/* Buffer length violation	     */
#define	T_ACCVIO		 4	/* Access control violation	     */
#define	T_NOPATH		 5	/* No path			     */
#define	T_BMSE			 6	/* Buffer memory system error	     */
#define	T_OTHER			 7	/* Other - see status error subtypes */

					/* Miscellaneous Constants	     */
#define	MIN_VAX750_REV		97	/* Minimum req 11/750 CPU ucode level*/
#define	Q_LOCKED	0x00000001	/* Queue interlock bit		     */

/* CI Port Specific Constants.
 */
					/* CI750/CI780/CIBCI Cache Sizes     */
#define	CI7B_DG_CACHE		 3 	/* Size of datagram cache	     */
#define	CI7B_MSG_CACHE		 3	/* Size of message cache	     */

					/* CIBCA/CIXCD/CIKMF/CISHC Cache Sizes*/
#define	CIBX_DG_CACHE		 4 	/* Size of datagram cache	     */
#define	CIBX_MSG_CACHE		 4	/* Size of message cache	     */

					/* CI750/CI780/CIBCI Microcode 	     */
					/*  Related Constants		     */
#define	CI7B_ARAM_LOAD	0x00000000	/* All RAM port ucode load address   */
#define	CI7B_MAX_RAM		32	/* Current maximum RAM revision level*/
#define	CI7B_MAX_ROM		32	/* Current maximum PROM rev level    */
#define	CI7B_RAM_LOAD	0x00000400	/* PROM/RAM port ucode load address  */
#define	CI7B_ROM_ADDR5	0x000003FA	/* PROM revision level wcs addr < V6 */
#define	CI7B_ROM_ADDR6	0x000003F9	/* PROM revision level wcs addr => V6*/
#define	CI7B_RAM_ADDR5	0x00000BFF	/* RAM revision level wcs addr < V6  */
#define	CI7B_RAM_ADDR6	0x00000BFE	/* RAM revision level wcs addr => V6 */
#define	CI7B_REV_OFF		24	/* RAM/PROM data revision offset     */
#define	CI7B_SEL_CSHO	0x00001000	/* High order control store selector */
#define	CI7B_STARTADDR	0x00000400	/* Microcode starting address	     */
#define	CI7B_UCODEWDSZ		 6	/* Size of microcode word	     */
#define	CI7B_WCS_SIZE	0x00000C00	/* Size of control store	     */

					/* CIBCA Microcode Related Constants */
#define	CIBCA_FN_ADDR	0x0000108C	/* Fn ucode rev level adapter offset */
#define	CIBCA_ST_ADDR	0x00001090	/* Self-test rev level adapter offset*/
#define	CIBCA_BA_MAXFN		 1	/* Current CIBCA-BA max fn ucode lev */
#define	CIBCA_BA_MAXST		 1	/* Current CIBCA-BA max st ucode lev */

					/* CIBCA-AA Microcode Related	     */
					/*  Constants			     */
#define	CIBCA_AA_MAXFN		 6	/* Current CIBCA-AA max fn ucode lev */
#define	CIBCA_AA_MAXST		 5	/* Current CIBCA-AA max st ucode lev */
#define	CIBCA_AA_NAMSIZ		10	/* Microcode name field size	     */
#define	CIBCA_AA_NSECT		 3	/* Maximum num control store sections*/
#define	CIBCA_AA_CSADDR	0x00000000	/* Control store load address	     */
#define	CIBCA_AA_UCWDSZ		 2	/* Microcode word size		     */
#define	CIBCA_AA_CSSIZ	0x00001000	/* Control store size		     */
#define	CIBCA_AA_CSSECT	0x00004000	/* Control store section selector    */

					/* CIXCD Microcode Related Constants */
/* TEMP */
#define	CIXCD_MAXFN		 1	/* Current CIXCD max fn ucode level  */
#define	CIXCD_MAXST		 1	/* Current CIXCD max st ucode level  */

#define	CIKMF_MAXFN		 1	/* Current CIKMF max fn ucode level  */
#define	CIKMF_MAXST		 1	/* Current CIKMF max st ucode level  */

#define	CISHC_MAXFN		 1	/* Current CISHC max fn ucode level  */
#define	CISHC_MAXST		 1	/* Current CISHC max st ucode level  */

					/* CI750/CI780 Register Offsets      */
#define	CI780_CNFR	     0x000	/* Configuration register	     */
#define	CI780_PMCSR	     0x004	/* Port maintenance cntl & status reg*/
#define	CI780_MADR	     0x014	/* Maintenance address register      */
#define	CI780_MDATR	     0x018	/* Maintenance data register	     */

					/* CIBCI Register Offsets	     */
#define	CIBCI_CNFR	     0x100	/* Configuration register	     */
#define	CIBCI_PMCSR	     0x110	/* Port maintenance cntl & status reg*/
#define	CIBCI_MADR	     0x114	/* Maintenance address register      */
#define	CIBCI_MDATR	     0x118	/* Maintenance data register	     */

					/* CI750/CI780/CIBCI Register Offsets*/
#define	CI7B_PSR	     0x900	/* Port status register		     */
#define	CI7B_PQBBASE	     0x904	/* PQB base register 		     */
#define	CI7B_PCQ0CR	     0x908	/* Port command queue 0 control reg  */
#define	CI7B_PCQ1CR	     0x90C	/* Port command queue 1 control reg  */
#define	CI7B_PCQ2CR	     0x910	/* Port command queue 2 control reg  */
#define	CI7B_PCQ3CR	     0x914	/* Port command queue 3 control reg  */
#define	CI7B_PSRCR	     0x918	/* Port status release control reg   */
#define	CI7B_PECR	     0x91C	/* Port enable control register      */
#define	CI7B_PDCR	     0x920	/* Port disable control register     */
#define	CI7B_PICR	     0x924	/* Port initialization control reg   */
#define	CI7B_PDFQCR	     0x928	/* Port dg free queue control reg    */
#define	CI7B_PMFQCR	     0x92C	/* Port msg free queue control reg   */
#define	CI7B_PMTCR	     0x930	/* Port maintenance timer control reg*/
#define	CI7B_PFAR	     0x938	/* Port failing address register     */
#define	CI7B_PESR	     0x93C	/* Port error status register	     */
#define	CI7B_PPR	     0x940	/* Port parameter register	     */

					/* CIBCA Register Offsets	     */
#define	CIBCA_PQBBASE	    0x00F0	/* PQB base register 		     */
#define	CIBCA_PFAR	    0x00F4	/* Port failing address register     */
#define	CIBCA_PPR	    0x00F8	/* Port parameter register	     */
#define	CIBCA_PESR	    0x00FC	/* Port error status register	     */

#define	CIBX_PSR	    0x1000	/* Port status register		     */
#define	CIBX_PMCSR	    0x1004	/* Port maintenance cntl & status reg*/
#define	CIBCA_MADR	    0x1008	/* Maintenance addr reg( CIBCA-AA )  */
#define	CIBCA_MDATR	    0x100C	/* Maintenance data reg( CIBCA-AA )  */
#define	CIBX_PCQ0CR	    0x1010	/* Port command queue 0 control reg  */
#define	CIBX_PCQ1CR	    0x1014	/* Port command queue 1 control reg  */
#define	CIBX_PCQ2CR	    0x1018	/* Port command queue 2 control reg  */
#define	CIBX_PCQ3CR	    0x101C	/* Port command queue 3 control reg  */
#define	CIBX_PSRCR	    0x1020	/* Port status release control reg   */
#define	CIBX_PECR	    0x1024	/* Port enable control register      */
#define	CIBX_PDCR	    0x1028	/* Port disable control register     */
#define	CIBX_PICR	    0x102C	/* Port initialization control reg   */
#define	CIBX_PDFQCR	    0x1030	/* Port dg free queue control reg    */
#define	CIBX_PMFQCR	    0x1034	/* Port msg free queue control reg   */
#define	CIBX_PMTCR	    0x1038	/* Port maintenance timer control reg*/

					/* CIXCD Register Offsets	     */
#define	CIXCD_XCOMM	    0x0010	/* XMI Comm. register    */
#define	CIXCD_PSCR	    0x0014	/* Port scan cntrl register	     */
#define	CIXCD_PSDR	    0x0018	/* Port scan data  reg */
#define	CIXCD_PMCSR	    0x001C	/* Port maintenance cntl & status reg*/