📄 trapov_.c
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case MULD2: case MULD3: case MULF2: case MULF3: case POLYD: case POLYF: case SUBD2: case SUBD3: case SUBF2: case SUBF3: case TSTD: case TSTF: return 1; default: return 0; }}/* * got_illegal_poly - handle an illegal POLY[DF] instruction. * * We don't do anything here yet. *//*ARGSUSED*/got_illegal_poly(opcode){ fprintf(units[STDERR].ufd, "Can't do 'poly' instructions yet\n"); f77_abort();}/* * got_illegal_emod - handle illegal EMOD[DF] instruction. * * We don't do anything here yet. *//*ARGSUSED*/got_illegal_emod(opcode){ fprintf(units[STDERR].ufd, "Can't do 'emod' instructions yet\n"); f77_abort();}/* * no_operands - determine the number of operands in this instruction. * */no_operands(opcode){ switch (opcode) { case ACBD: case ACBF: return 3; case MNEGD: case MNEGF: case MOVD: case MOVF: case TSTD: case TSTF: return 1; default: return 2; }}/* * operand_type - is the operand a D or an F? * * We are only descriminating between Floats and Doubles here. * Other operands may be possible on exotic instructions. *//*ARGSUSED*/operand_type(opcode, no){ if (opcode >= 0x40 && opcode <= 0x56) return F; if (opcode >= 0x60 && opcode <= 0x76) return D; return IDUNNO;}/* * advance_pc - Advance the program counter past an operand. * * We just bump the pc by the appropriate values. */advance_pc(type){ register int mode, reg; mode = fetch_byte(); reg = mode & 0xf; mode = (mode >> 4) & 0xf; switch (mode) { case LITERAL0: case LITERAL1: case LITERAL2: case LITERAL3: return; case INDEXED: advance_pc(type); return; case REGISTER: case REG_DEF: case AUTO_DEC: return; case AUTO_INC: if (reg == PC) { if (type == F) (void) fetch_long(); else if (type == D) { (void) fetch_long(); (void) fetch_long(); } else { fprintf(units[STDERR].ufd, "Bad type %d in advance\n", type); f77_abort(); } } return; case AUTO_INC_DEF: if (reg == PC) (void) fetch_long(); return; case BYTE_DISP: case BYTE_DISP_DEF: (void) fetch_byte(); return; case WORD_DISP: case WORD_DISP_DEF: (void) fetch_word(); return; case LONG_DISP: case LONG_DISP_DEF: (void) fetch_long(); return; default: fprintf(units[STDERR].ufd, "Bad mode 0x%x in op_length()\n", mode); f77_abort(); }}anyval *get_operand_address(type){ register int mode, reg, base; mode = fetch_byte() & 0xff; reg = mode & 0xf; mode = (mode >> 4) & 0xf; switch (mode) { case LITERAL0: case LITERAL1: case LITERAL2: case LITERAL3: return NULL; case INDEXED: base = (int) get_operand_address(type); if (base == NULL) return NULL; base += contents_of_reg(reg)*type_length(type); return (anyval *) base; case REGISTER: return addr_of_reg(reg); case REG_DEF: return (anyval *) contents_of_reg(reg); case AUTO_DEC: return (anyval *) (contents_of_reg(reg) - type_length(type)); case AUTO_INC: return (anyval *) contents_of_reg(reg); case AUTO_INC_DEF: return (anyval *) * (long *) contents_of_reg(reg); case BYTE_DISP: base = fetch_byte(); base += contents_of_reg(reg); return (anyval *) base; case BYTE_DISP_DEF: base = fetch_byte(); base += contents_of_reg(reg); return (anyval *) * (long *) base; case WORD_DISP: base = fetch_word(); base += contents_of_reg(reg); return (anyval *) base; case WORD_DISP_DEF: base = fetch_word(); base += contents_of_reg(reg); return (anyval *) * (long *) base; case LONG_DISP: base = fetch_long(); base += contents_of_reg(reg); return (anyval *) base; case LONG_DISP_DEF: base = fetch_long(); base += contents_of_reg(reg); return (anyval *) * (long *) base; default: fprintf(units[STDERR].ufd, "Bad mode 0x%x in get_addr()\n", mode); f77_abort(); } return NULL;}contents_of_reg(reg){ int value; if (reg == PC) value = (int) pc; else if (reg == SP) value = (int) ®s0t6[6]; else if (reg == FP) value = regs0t6[-2]; else if (reg == AP) value = regs0t6[-3]; else if (reg >= 0 && reg <= 6) value = regs0t6[reg]; else if (reg >= 7 && reg <= 11) value = regs7t11[reg]; else { fprintf(units[STDERR].ufd, "Bad register 0x%x to contents_of()\n", reg); f77_abort(); value = -1; } return value;}anyval *addr_of_reg(reg){ if (reg >= 0 && reg <= 6) { return (anyval *) ®s0t6[reg]; } if (reg >= 7 && reg <= 11) { return (anyval *) ®s7t11[reg]; } fprintf(units[STDERR].ufd, "Bad reg 0x%x to addr_of()\n", reg); f77_abort(); return NULL;}/* * fetch_{byte, word, long} - extract values from the PROGRAM area. * * These routines are used in the operand decoding to extract various * fields from where the program counter points. This is because the * addressing on the Vax is dynamic: the program counter advances * while we are grabbing operands, as well as when we pass instructions. * This makes things a bit messy, but I can't help it. */fetch_byte(){ return *pc++;}fetch_word(){ int *old_pc; old_pc = (int *) pc; pc += 2; return *old_pc;}fetch_long(){ long *old_pc; old_pc = (long *) pc; pc += 4; return *old_pc;}type_length(type){ if (type == F) return 4; if (type == D) return 8; fprintf(units[STDERR].ufd, "Bad type 0x%x in type_length()\n", type); f77_abort(); return -1;}char *opcode_name(opcode){ switch (opcode) { case ACBD: return "ACBD"; case ACBF: return "ACBF"; case ADDD2: return "ADDD2"; case ADDD3: return "ADDD3"; case ADDF2: return "ADDF2"; case ADDF3: return "ADDF3"; case CMPD: return "CMPD"; case CMPF: return "CMPF"; case CVTDB: return "CVTDB"; case CVTDF: return "CVTDF"; case CVTDL: return "CVTDL"; case CVTDW: return "CVTDW"; case CVTFB: return "CVTFB"; case CVTFD: return "CVTFD"; case CVTFL: return "CVTFL"; case CVTFW: return "CVTFW"; case CVTRDL: return "CVTRDL"; case CVTRFL: return "CVTRFL"; case DIVD2: return "DIVD2"; case DIVD3: return "DIVD3"; case DIVF2: return "DIVF2"; case DIVF3: return "DIVF3"; case EMODD: return "EMODD"; case EMODF: return "EMODF"; case MNEGD: return "MNEGD"; case MNEGF: return "MNEGF"; case MOVD: return "MOVD"; case MOVF: return "MOVF"; case MULD2: return "MULD2"; case MULD3: return "MULD3"; case MULF2: return "MULF2"; case MULF3: return "MULF3"; case POLYD: return "POLYD"; case POLYF: return "POLYF"; case SUBD2: return "SUBD2"; case SUBD3: return "SUBD3"; case SUBF2: return "SUBF2"; case SUBF3: return "SUBF3"; case TSTD: return "TSTD"; case TSTF: return "TSTF"; }}#endif vax
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