📄 commtype.hpp
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#if !defined(__COMMTYPE_HPP__)
#define __COMMTYPE_HPP__
#include "ntype.hpp" // variable argument list
#ifndef _MSC_VER
#include "dos.h"
unsigned char IN(WORD portid);
void OUT(WORD portid,unsigned char value);
#endif
// ******************************************************************** //
// //
// KEYS.H //
// Copyright (c) 1993, Michael Holmes and Bob Flanders //
// PC Magazine Digital and Fax Communications //
// //
// This file contains the definitions for extended keyboard //
// function and control keys. //
// //
// ******************************************************************** //
#define CURSOR() _setcursortype(_NORMALCURSOR) // normal text cursor
#define BIGCURSOR() _setcursortype(_SOLIDCURSOR) // insert mode cursor
#define NOCURSOR() _setcursortype(_NOCURSOR) // turn off cursor
#define COUNT(x) (sizeof(x) / sizeof(x[0])) // item count
#ifndef MAX_PATH
#define MAX_PATH 79 // maximum path length
#endif
#define MIX(x,y) ((x << 4) + (y)) // mix colors for fg and bg
#define FG(x) (unsigned char) x >> 4 // extract foreground color
#define BG(x) x & 0x07 // ..and background color
#define NULLPTR(x) &x ? x : "" // make null ptr point to null
#define LAST(s) s[strlen(s) - 1] // last character in string
#if defined(SERVER_NLM)
#define SECS(x) (long) (x * 2 ) // seconds to ticks conversion
#else
#define SECS(x) (long) (x ) // seconds to ticks conversion
#endif
#define SOH 1 // start of header
#define STX 2 // start of text
#define EOT 4 // end of transmission
#define ACK 6 // positive acknowledgment
#define XOFF 19 // flow control X-OFF
#define NAK 21 // negative acknowledgment
#define CAN 24 // cancel process
/* ******************************************************************** *
*
* UART Register Definitions
*
* ******************************************************************** */
// UART regs (base address +)
#define RBR 0 // receive buffer register
#define THR 0 // transmit holding register
#define DLL 0 // divisor latch LSB
#define DLM 1 // divisor latch MSB
#define IER 1 // interrupt enable register
#define IIR 2 // interrupt id register
#define FCR 2 // FIFO control register
#define AFR 2 // alternate function register
#define LCR 3 // line control register
#define MCR 4 // modem control register
#define LSR 5 // line status register
#define MSR 6 // modem status register
#define SCR 7 // scratch register
// interrupt enable register
#define IER_RBF 0x01 // receive buffer full
#define IER_TBE 0x02 // transmit buffer empty
#define IER_LSI 0x04 // line status interrupt
#define IER_MSI 0x08 // modem status interrupt
#define IER_ALL 0x0f // enable all interrupts
// interrupt id register
#define IIR_PEND 0x01 // interrupt pending = 0
#define IIR_II 0x06 // interrupt id bits
// 000 = modem status change
// 001 = trans holding empty
// 010 = receive buffer full
// 110 = receive fifo full
// 011 = line status change
#define IIR_MSI 0x00 // modem status interrupt
#define IIR_TBE 0x02 // transmit buffer empty
#define IIR_RBF 0x04 // receive buffer full
#define IIR_LSI 0x06 // line status interrupt
#define IIR_RFF 0x0c // receive fifo threshold
// fifo control register
#define FCR_FIFO 0x01 // fifo enable
#define FCR_RCVR 0x02 // receiver fifo reset
#define FCR_XMIT 0x04 // transmit fifo reset
#define FCR_DMA 0x08 // DMA mode select
#define FCR_TRIGGER 0xc0 // receiver trigger select
// 00 = 1 byte
// 01 = 4 bytes
// 10 = 8 bytes
// 11 = 14 bytes
#define FCR_16550 0xc7 // 16550 fifo enable/reset
// line control register
#define LCR_WLEN 0x03 // word length
// 10 = 7 bits
// 11 = 8 bits
#define LCR_STOP 0x04 // stop bits
// 0 = 1 stop bit
// 1 = 2 stop bits
#define LCR_PARITY 0x08 // parity enable
// 0 = no parity
// 1 = send/check parity
#define LCR_EVEN 0x10 // even/odd parity
// 0 = odd parity
// 1 = even parity
#define LCR_BREAK 0x40 // break, set to xmit break
#define LCR_DLAB 0x80 // divisor latch access bit
// modem control register
#define MCR_DTR 0x01 // DTR control
#define MCR_RTS 0x02 // RTS control
#define MCR_OUT2 0x08 // OUT2 control
#define MCR_DO 0x0b // dtr, rts & out2 enabled
// line status register
#define LSR_DR 0x01 // data ready
#define LSR_ORUN 0x02 // overrun error
#define LSR_PRTY 0x04 // parity error
#define LSR_FRM 0x08 // framing error
#define LSR_BRK 0x10 // break interrupt
#define LSR_THRE 0x20 // transmit holding reg empty
#define LSR_TSRE 0x40 // transmit shift reg empty
#define LSR_ERROR 0x1e // error conditions
// modem status register
#define MSR_DCTS 0x01 // delta clear to send
#define MSR_DDSR 0x02 // delta data set ready
#define MSR_TERI 0x04 // trailing edge ring indicator
#define MSR_DCD 0x08 // delta carrier detect
#define MSR_CTS 0x10 // clear to send
#define MSR_DSR 0x20 // data set ready (modem ready)
#define MSR_RI 0x40 // ring indicated
#define MSR_CD 0x80 // carrier detected
/*
#define IN(x) inp(base + x) // read a UART register
#define OUT(x,y) outp(base + x, y) // ..and write a register
*/
/* ******************************************************************** *
*
* 8259 Programmable Interrupt Controller Definitions
*
* ******************************************************************** */
#define I8259 0x20 // control register address
#define EOI 0x20 // end of interrupt command
#define I8259M 0x21 // mask register
enum port_type // port type
{
no_port, // not available
std_uart, // 8250/16450/16550
fifo_uart // 16550 w/FIFO queues
};
#define ALLOW_ALT 1 // allow alt key in get_key()
#define NO_ALT 0 // ..and supress alt key
short wait_for(void *,char *s1, // response string #1
char *s2, // ..and response string #2
long t); // seconds to wait
short wait_for1(void *__comm,
char *s1, // response string #1
char *s2, // ..and response string #2
char *s3, // ..and response string #3
long t);
#if defined(__WATCOMC__)
void clearsti();
#pragma aux clearsti="sti";
void clearcli();
#pragma aux clearcli="cli";
void write_8259port();
#pragma aux write_8259port="mov al,0x20"\
"out 0x20,al"; //EOI//I8259
#endif
#if defined(__BORLANDC__)
#define clearsti(); _asm sti;
#define clearcli(); _asm cli;
#endif
#define ETX 3 // end of text
#define DLE 16 // data link escape
#define NOT ! // shorthand logical
#define FAX_TX_HDLC "AT+FTH=3\r" // enter HDLC transmit mode
#define FAX_RX_HDLC "AT+FRH=3\r" // enter HDLC recieve mode
#define FAX_TX_DATA "AT+FTM=%d\r" // enter FAX transmit mode
#define FAX_RX_DATA "AT+FRM=%d\r" // enter FAX receive mode
#define FAX_TX_SPD "AT+FTM=?\r" // get FAX transmit speeds
#define FAX_RX_SPD "AT+FRM=?\r" // get FAX receive speeds
#define FAX_SILENT "AT+FRS=8\r" // 80 ms of silence
#define FAX_SILENT1 "AT+FRS=20\r" // 200 ms of silence
#define FAX_CLASS1 "AT+FCLASS=1\r" // enter FAX class 1 mode
#define FAX_MODEM "AT+FCLASS=0\r" // return to non-FAX mode
#define FAX_CONN "\r\nCONNECT\r\n" // CONNECT response
#define FAX_SETMDM "AT Q0 V1 E0\r" // set modem parameters
#define FAX_ANSWER "ATA\r" // answer an incoming call
#define FAX_HANGUP "ATH\r" // disconnect from line
#define FAX_DIAL "ATDT" // dial command
#define FAX_OK "\r\nOK\r\n" // OK response
#define FAX_ERR "\r\nERROR\r\n" // ERROR response
#define FAX_NO_CARR "\r\nNO CARRIER\r\n" // NO CARRIER response
#define FAX_RING "\r\nRING\r\n" // RING message
#define FAX_BUSY "\r\nBUSY\r\n"
#define FAX_RSTMDM "AT Z\r" // reset modem
#define TEL_ANSWER "ATA\r" // answer an incoming call
#define TEL_HANGUP "ATH\r" // disconnect from line
#define TEL_DIAL "ATDT" // dial command
#define TEL_OK "\r\nOK\r\n" // OK response
#define TEL_ERR "\r\nERROR\r\n" // ERROR response
#define TEL_NO_CARR "\r\nNO CARRIER\r\n" // NO CARRIER response
#define TEL_RING "\r\nRING\r\n" // RING message
#define TEL_BUSY "\r\nBUSY\r\n"
#define TEL_RSTMDM "AT Z\r" // reset modem
#define TEL_VCON "\r\nVCON\r\n" // reset modem
class Protocol
{
public:
short TimeOut(long *n); // check for timeout
WORD CheckSum(char *s, DWORD l); // checksum calculation
WORD CRC(char *s, DWORD l); // CRC calculation
DWORD CRC32(char *s, DWORD l);
};
#endif
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