init.s

三星S34510板子上移植的uCosII源码

;;; Copyright ARM Ltd 2001. All rights reserved.
;
; This module performs ROM/RAM remapping (if required), initializes stack 
; pointers and interrupts for each mode, and finally branches to __main in 
; the C library (which eventually calls main()).
;
; On reset, the ARM core starts up in Supervisor (SVC) mode, in ARM state, 
; with IRQ and FIQ disabled.


; --- Standard definitions of mode bits and interrupt (I & F) flags in PSRs


        AREA    Init, CODE, READONLY
		CODE32
		GET s3c4510b.s
				
        ENTRY
        
   
; Now fall into the LDR PC, Reset_Addr instruction which will continue
; execution at 'Reset_Handler'
  					;zero frame pointer
  					
              
        B       Reset_Handler
        B       SystemUndefinedHandler;Undefined_Handler
        B       SystemSwiHandler;SWI_Handler
        B       SystemPrefetchHandler;Prefetch_Handler
        B       SystemAbortHandler;Abort_Handler
        NOP     		; Reserved vector
        B       SystemIrqHandler;  IRQ_Handler
        B       SystemFiqHandler  ; FIQ_Handler 

;===========================================
; Exception Vector Function Definition
; Consist of function Call from C-Program.
;===========================================
SystemUndefinedHandler
      	
	IMPORT	ISR_UndefHandler
	STMFD	sp!, {r0-r12}
	B	ISR_UndefHandler
	LDMFD	sp!, {r0-r12, pc}^

SystemSwiHandler
    
	STMFD	sp!, {r0-r12,lr}
	LDR	r0, [lr, #-4]
	BIC	r0, r0, #0xff000000
	CMP	r0, #0xff
	BEQ	MakeSVC
	LDMFD	sp!, {r0-r12, pc}^
MakeSVC
      	
	MRS	r1, spsr
	BIC	r1, r1,  #MODE_MASK
	ORR	r2, r1,  #SUP_MODE
	MSR	spsr_cf, r2
	LDMFD	sp!, {r0-r12, pc}^

SystemPrefetchHandler
     
	IMPORT	ISR_PrefetchHandler
	STMFD	sp!, {r0-r12, lr}
	B	ISR_PrefetchHandler
	LDMFD	sp!, {r0-r12, lr}
	;ADD	sp, sp, #4
	SUBS	pc, lr, #4

SystemAbortHandler
  
	IMPORT	ISR_AbortHandler
	STMFD	sp!, {r0-r12, lr}
	
	B	ISR_AbortHandler
	
	LDMFD	sp!, {r0-r12, lr}
	;ADD	sp, sp, #4
	SUBS	pc, lr, #8

SystemReserv
      
	SUBS	pc, lr, #4

SystemIrqHandler
   
   	IMPORT	ISR_IrqHandler
	STMFD	sp!, {r0-r12, lr}
	BL	ISR_IrqHandler
	LDMFD	sp!, {r0-r12, lr}
	SUBS	pc, lr, #4

SystemFiqHandler
   	
	IMPORT	ISR_FiqHandler
	STMFD	sp!, {r0-r7, lr}
	BL	ISR_FiqHandler
	LDMFD	sp!, {r0-r7, lr}
	SUBS	pc, lr, #4
		

	AREA Main, CODE, READONLY

;==========================================================
; The Reset Entry Point
;==========================================================
          EXPORT	Reset_Handler
Reset_Handler  
                         ;/* Reset Entry Point */
   
INITIALIZE_STACK
		
	MRS	r0, cpsr
	BIC	r0, r0, #LOCKOUT | MODE_MASK
	ORR	r2, r0, #SYS_MODE

	ORR	r1, r0, #LOCKOUT | FIQ_MODE
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2 
	LDR	sp, =FIQ_STACK

	ORR	r1, r0, #LOCKOUT | IRQ_MODE
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2
	LDR	sp, =IRQ_STACK

	ORR	r1, r0, #LOCKOUT | ABT_MODE
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2
	LDR	sp, =ABT_STACK

	ORR	r1, r0, #LOCKOUT | UDF_MODE
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2
	LDR	sp, =UDF_STACK

	ORR	r1, r0, #LOCKOUT | SUP_MODE
	MSR	cpsr_cf, r1
	MSR	spsr_cf, r2
	LDR	sp, =SUP_STACK   ; Change CPSR to SVC mode
	
	MRS	r0, cpsr
	BIC	r0, r0, #MODE_MASK
	ORR	r0, r0, #SYS_MODE
	ORR r0, r0, #FBit
	BIC	r0, r0, #IBit
	MSR	cpsr_c, r0
	LDR	sp, =STACK_STAR_ADDR       			;设置堆栈起始地址在cofigall.h中定义的位置(本案为1M处)
	  
;disable interrupts in CPU and switch to SVC32 mode
start
	
;disable individual interrupts in the interrupt controller

	LDR	r2, =ARM7_INTMASK					 ;R2->interrupt controller
	MVN	r1, #0						 ;&FFFFFFFF
	STR	r1, [r2]					 ;disable all interrupt soucres

	LDR	r2, =ARM7_INTPEND			 ;R2->interrupt pend register.
	MVN	r1, #0						 ;&FFFFFFFF
	STR	r1, [r2]					 ;clear all interrupt flags.

SYNC_DRAM
	LDR	r0, =ARM7_SYSCFG
	;LDR	r1, =0x87ffff90				;config syscofig register.
	LDR	r1, =0xe7ffff90				;s3c4510b ,config syscofig register.
	STR	r1, [r0] 					;Cache,WB disable

;ROM and RAM Configuration(Multiple Load and Store).  Multiple load
;LDMIA instruction cannot be used as there is no way to load the
;address L$_SystemInitDataSDRAM into a register (LDR Rn,=sym is broken)
 

	LDR	r1, =rEXTDBWTH           ;根据snd100.h中的宏定义,初始化sysconfig,总线宽度及各组sdram和rom*/
	LDR	r2, =rROMCON0    ;配置bootrom地址从0开始,sdram从16M开始
	LDR	r3, =rROMCON1
	LDR	r4, =rROMCON2
	LDR	r5, =rROMCON3
	LDR	r6, =rROMCON4
	LDR	r7, =rROMCON5
	LDR	r8, =rSDRAMCON0
	LDR	r9, =rSDRAMCON1
	LDR	r10,=rSDRAMCON2
	LDR	r11,=rSDRAMCON3
	LDR	r12,=rSREFEXTCON
	LDR	r0, =ARM7_EXTDBWTH		 			; Extdbwth Offset : 0x3010
	STMIA	r0, {r1-r12}
                                   
; Initialize the stack pointer to just before where the
; uncompress code, copied from ROM to RAM, will run.
;=====================================
	; Initialise STACK 
	;=====================================

	
	
;jump to C entry point in ROM: routine - entry point + ROM base */
      
       IMPORT  main
    LDR	pc, =main       ;跳到C代码入口.
	
        END