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📄 main.lst

📁 C8051F320+Nrf24L01无线模块的实现
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C51 COMPILER V7.50   MAIN                                                                  05/25/2010 15:29:58 PAGE 1   


C51 COMPILER V7.50, COMPILATION OF MODULE MAIN
OBJECT MODULE PLACED IN .\Bin\main.obj
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE main.c DEBUG OBJECTEXTEND PRINT(.\Bin\main.lst) OBJECT(.\Bin\main.obj)

line level    source

   1          #include "c8051f320.h"
   2          #include "typedef.h"
   3          #include "misc.h"
   4          #include "io.h"
   5          //#include "reg51.H"
   6          #include "api.h"
   7          #define uchar unsigned char
   8          #define uint unsigned int
   9           void init_io();                //声明外部函数
  10           void RX_Mode();
  11           void init_int0();
  12           void CheckButtons();
  13           uchar SPI_RW_REG(BYTE reg,BYTE value);
  14           //extern  uchar SPI_RW_REG123(BYTE reg,BYTE value);
  15          uchar flag;
  16          #define uchar unsigned char
  17          #define TX_ADR_WIDTH    5   // 5 bytes TX(RX) address width
  18          #define TX_PLOAD_WIDTH  20  // 20 bytes TX payload
  19          
  20          uchar const TX_ADDRESS[TX_ADR_WIDTH]  = {0x34,0x43,0x10,0x10,0x01}; // Define a static TX address
  21          /*uchar Original_ADDRESS[TX_ADR_WIDTH] ={0x32,0x41,0x08,0x08,0x00};      //Define Original address 
  22          uchar OnePress_ADDRESS[TX_ADR_WIDTH] ={0x33,0x42,0x09,0x09,0x02};
  23          /*BYTE const TX_PAYLOAD[TX_PLOAD_WIDTH] = {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
  24                                                   0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f}; */
  25          uchar rx_buf[TX_PLOAD_WIDTH];
  26          uchar tx_buf[TX_PLOAD_WIDTH];
  27          
  28          
  29          sbit key=P3^0;
  30          sbit led=P2^4;
  31          /**************************************************/
  32          sbit CE =  P0^4;
  33          sbit CSN=  P0^3;
  34          sbit SCK=  P0^0;
  35          sbit MOSI= P0^2;
  36          sbit MISO= P0^1;
  37          sbit IRQ = P0^5;
  38          /**************************************************/
  39          uchar   bdata sta;
  40          sbit    RX_DR   =sta^6;
  41          sbit    TX_DS   =sta^5;
  42          sbit    MAX_RT  =sta^4;
  43          uchar tf=0; // Send interrut enabled flag
  44                  uchar t;   //record the number of times you press the button
  45                  uchar i;   //recond the number of times led shake
  46          /*void main(void)       // 主程序
  47          {
  48                  bit light;       //位变量
  49                  uint n;
  50                  PCA0MD &=  0xb9;
  51                  while(1) //程序循环
  52                  {
  53                          if(!K1)  //如果读到K1为0
  54                          {
  55                                  for(n=0;n<1000;n++); //等待按键稳定
C51 COMPILER V7.50   MAIN                                                                  05/25/2010 15:29:58 PAGE 2   

  56                                  light=~light;  //每按键一次,标记变化一次
  57                                  while(!K1);     //等待按键松开
  58                                  for(n=0;n<1000;n++);  //等待按键稳定松开
  59                          }
  60                          P0=light; //直接把位变量赋值给LED灯
  61                  }
  62          }        
  63          
  64          */      
  65          
  66          void delays(uchar n)
  67          {
  68   1              for(;n>0;n--)
  69   1                      _nop_();
  70   1      }
  71          void init_io(void)
  72          {
  73   1              delays(100);
  74   1              CE=0;                   // chip enable
  75   1              CSN=1;                  // Spi disable  
  76   1              SCK=0;          // Spi clock line init high
  77   1      
  78   1      }       
  79          void init_int0()
  80          {
  81   1              EA=1;
  82   1              EX0=1;                                          // Enable int0 interrupt.
  83   1      }       
  84          /*The following program is achieve by HardWare SPI*/
  85          void SPI_rf_write(uchar dat)
  86          {
  87   1              while(SPI0CFG&0x80);
  88   1              SPIF = 0;
  89   1              SPI0DAT = dat;
  90   1              while(!SPIF);   //wait spi transfer finish
  91   1      }
  92          uchar SPI_rf_read(void)
  93          {
  94   1              while(SPI0CFG&0x80);
  95   1              SPIF = 0;
  96   1              SPI0DAT = 0x00;
  97   1              while(!SPIF);   //wait spi transfer finish
  98   1              return (SPI0DAT);
  99   1      }
 100          void write_rf_reg(uchar address,uchar dat)
 101          {
 102   1              CSN=0;
 103   1              SPI_rf_write(address);
 104   1              SPI_rf_write(dat);
 105   1              CSN=1;
 106   1      }
 107          uchar read_rf_reg(uchar address)
 108          {       
 109   1              uchar status;
 110   1              CSN=0;
 111   1              SPI_rf_write(address);
 112   1              status = SPI_rf_read();
 113   1              CSN=1;
 114   1              return (status);
 115   1      }
 116          void write_rf_data(uchar reg,uchar *data_ptr,uchar nLength)
 117          {
C51 COMPILER V7.50   MAIN                                                                  05/25/2010 15:29:58 PAGE 3   

 118   1              uchar i;
 119   1              CSN=0;
 120   1              SPI_rf_write(reg);
 121   1              for(i=0;i<nLength;i++)
 122   1                      SPI_rf_write(*data_ptr++);
 123   1              CSN=1;
 124   1      }                       
 125          uchar read_rf_data(uchar reg,uchar *data_ptr,uchar nLength)
 126          {
 127   1              uchar i,status;
 128   1              CSN=0;
 129   1              SPI_rf_write(reg);
 130   1              for(i=0;i<nLength;i++)
 131   1              data_ptr[nLength]=SPI_rf_read();
 132   1              status=SPI_rf_read();
 133   1              CSN=1;
 134   1              return(status);
 135   1      }
 136          
 137                             /*
 138          uchar SPI_Read_Buf(BYTE reg, BYTE *pBuf, BYTE bytes)
 139          {
 140                  uchar status,byte_ctr;
 141          
 142                  CSN = 0;                                // Set CSN low, init SPI tranaction
 143                  status = SPI_RW(reg);                   // Select register to write to and read status byte
 144          
 145                  for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)
 146                  pBuf[byte_ctr] = SPI_RW(0);    // Perform SPI_RW to read byte from nRF24L01
 147          
 148                  CSN = 1;                           // Set CSN high again
 149          
 150                  return(status);                    // return nRF24L01 status byte
 151          }                        
 152          void Set_TX()
 153          {
 154                  CE=0;
 155          
 156                  write_rf_data(WRITE_REG + RX_ADDR_P0,TX_ADDRESS,TX_ADR_WIDTH);
 157                  write_rf_data(WR_TX_PLOAD,tx_buf,TX_PLOAD_WIDTH);
 158                  write_rf_reg(WRITE_REG + CONFIG,0x0e);
 159          
 160                  CE=1;
 161                  delays(130);            
 162          }       */        
 163                                                  
 164          void Set_RX()
 165          {
 166   1              CE=0;
 167   1      
 168   1              write_rf_reg(WRITE_REG + CONFIG,0x0f);
 169   1              write_rf_reg(WRITE_REG + RX_PW_P0,TX_PLOAD_WIDTH);
 170   1              
 171   1              CE=1;
 172   1              delays(130);
 173   1      }         
 174          void init_24L01()
 175          {        
 176   1              CE=0;
 177   1              
 178   1              write_rf_data(WRITE_REG + TX_ADDR,TX_ADDRESS,TX_ADR_WIDTH);             
 179   1              write_rf_data(WRITE_REG + RX_ADDR_P0,TX_ADDRESS,TX_ADR_WIDTH);
C51 COMPILER V7.50   MAIN                                                                  05/25/2010 15:29:58 PAGE 4   

 180   1              
 181   1              write_rf_reg(WRITE_REG + EN_AA,0x01);
 182   1              write_rf_reg(WRITE_REG + EN_RXADDR,0x01);
 183   1              write_rf_reg(WRITE_REG + SETUP_RETR,0x1a);
 184   1              write_rf_reg(WRITE_REG + RF_CH,40);
 185   1              write_rf_reg(WRITE_REG + RF_SETUP,0x0f);
 186   1              write_rf_reg(WRITE_REG + CONFIG,0x0f);
 187   1      
 188   1              CE=1;
 189   1              //delays(130);
 190   1      //      flush_rf_tx();
 191   1      //      flush_rf_rx();
 192   1      }                          
 193          /*The foregoing program is achieve by HardWare SPI*/
 194                  /*               
 195          uchar SPI_RW(uint  byte)
 196          {
 197                  uchar bit_ctr;
 198                  for(bit_ctr=0;bit_ctr<8;bit_ctr++)   // output 8-bit
 199                  {
 200                          MOSI = (byte & 0x80);         // output 'byte', MSB to MOSI
 201                          byte = (byte << 1);           // shift next bit into MSB..
 202                          SCK = 1;                      // Set SCK high..
 203                          byte |= MISO;                     // capture current MISO bit
 204                          SCK = 0;                          // ..then set SCK low again
 205                  }                                
 206              return(byte);                         // return read byte
 207          }  
 208          uchar SPI_RW_Reg(BYTE reg, BYTE value)
 209          {
 210                  uchar status;
 211           
 212                  CSN = 0;                   // CSN low, init SPI transaction
 213                  status = SPI_RW(reg);      // select register
 214                  SPI_RW(value);             // ..and write value to it..
 215                  CSN = 1;                   // CSN high again
 216          
 217                  return(status);            // return nRF24L01 status byte
 218          }        
 219          BYTE SPI_Read(BYTE reg)
 220          {
 221                  BYTE reg_val;
 222          
 223                  CSN = 0;                // CSN low, initialize SPI communication...
 224                  SPI_RW(reg);            // Select register to read from..
 225                  reg_val = SPI_RW(0);    // ..then read registervalue
 226                  CSN = 1;                // CSN high, terminate SPI communication
 227          
 228                  return(reg_val);        // return register value
 229          }
 230          
 231          
 232            
 233          uchar SPI_Read_Buf(BYTE reg, BYTE *pBuf, BYTE bytes)
 234          {
 235                  uchar status,byte_ctr;
 236          
 237                  CSN = 0;                                // Set CSN low, init SPI tranaction
 238                  status = SPI_RW(reg);                   // Select register to write to and read status byte
 239          
 240                  for(byte_ctr=0;byte_ctr<bytes;byte_ctr++)
 241                  pBuf[byte_ctr] = SPI_RW(0);    // Perform SPI_RW to read byte from nRF24L01
C51 COMPILER V7.50   MAIN                                                                  05/25/2010 15:29:58 PAGE 5   

 242          
 243                  CSN = 1;                           // Set CSN high again
 244          
 245                  return(status);                    // return nRF24L01 status byte
 246          }               
 247          uchar SPI_Write_Buf(BYTE reg, BYTE *pBuf, BYTE bytes)
 248          {
 249                  uchar status,byte_ctr;
 250          
 251                  CSN = 0;                   // Set CSN low, init SPI tranaction
 252                  status = SPI_RW(reg);    // Select register to write to and read status byte
 253                  for(byte_ctr=0; byte_ctr<bytes; byte_ctr++) // then write all byte in buffer(*pBuf)
 254                  SPI_RW(*pBuf++);
 255                  CSN = 1;                 // Set CSN high again
 256                  return(status);          // return nRF24L01 status byte
 257          } 
 258          void Set_RX()
 259          {
 260                  CE=0;
 261                  SPI_RW_Reg(WRITE_REG + CONFIG,0x0f);
 262                  SPI_RW_Reg(WRITE_REG + RX_PW_P0,TX_PLOAD_WIDTH);
 263                  CE=1;
 264                  delays(130);
 265          }  
 266          void Set_TX()
 267          {
 268                  CE=0;

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