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📄 main.lst

📁 C8051F320+Nrf24L01无线模块的实现
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 428   1              P1MDIN  = 0xff;                     // P1 are digital
 429   1              P1MDOUT = 0xff;                     //0:open-drain, 1:push pull 
 430   1              P2MDIN  = 0xff; 
 431   1              P2MDOUT = 0xff;                                 // P2.2 and P2.3 set to push-pull
 432   1              P3MDIN  = 0xff;
 433   1              P3MDOUT = 0x00;
 434   1      //      P0SKIP=0x3f;      (This is a question,Wait for answer    add by lsy)
 435   1              P0 = 0xff;
 436   1              P1 = 0xff;
 437   1              P2 = 0xff;
 438   1              P3 = 0xff;
 439   1              IT01CF = 0x65;
 440   1              XBR0 = 0x02;                                                
 441   1              XBR1 = 0x40;                         // Enable Crossbar
 442   1              TMOD = 0x11;    //T0,T1 as 16bits Timer mode
 443   1              PCON = 0;
 444   1              CKCON = 0x76;     //Clock Control Register
 445   1              TMR2CN = 0x00;    //Timer2 Control Register
 446   1              TMR3CN = 0xc0;    //Timer3 .......
 447   1              TMR3RLL = 0x00;   //Timer3 Reload Register Low Byte
 448   1              TMR3RLH = 0x00;   //.......................High..
 449   1              TMR2RLL = 0;
 450   1              TMR2RLH = 0;
 451   1              TR0 = 1;          //Enable Mcu Timer
 452   1              TR1 = 1;        
 453   1              TR2 = 1;
 454   1              ET2 = 1;          //Timer interrupt Enable flag
 455   1              EX0 = 1;
 456   1              EX1 = 1;
 457   1              IT0 = 1;      //Extern interrput Enable flag
 458   1              IT1 = 1;
 459   1              PX0 = 1; 
 460   1      }         
 461          /*To check the register value if the register value is ture,make sure the communication pipe */
 462          void CheckRS()
 463          {
 464   1              uchar reg_val;
 465   1              reg_val=read_rf_reg(EN_AA);
 466   1              reg_val=read_rf_reg(EN_RXADDR);
 467   1              reg_val=read_rf_reg(RF_CH);
 468   1              reg_val=read_rf_reg(RF_SETUP);
 469   1              reg_val=read_rf_reg(SETUP_RETR);
 470   1              reg_val=read_rf_reg(CONFIG);
 471   1              reg_val=read_rf_reg(RX_PW_P0);
 472   1      }
 473           
 474          /*经过测试,CE,CSN,IRQ三个引脚都可以成功的翻转,输出方波,MOSI输出锯齿波,SCK和MISO则无反应*/
 475          void main (void)
 476          {
 477   1              uchar d; 
 478   1              u16 i = 0;
 479   1      
 480   1              PCA0MD &= ~0x40;        // Disable Watchdog timer
 481   1          VDM0CN      = 0x80;      // Enable VDD Monitor
C51 COMPILER V7.50   MAIN                                                                  05/25/2010 11:46:57 PAGE 9   

 482   1          delay(100);         // wait for VDD Monitor stable
 483   1       //   RSTSRC |= 0x02;
 484   1        RSTSRC = 0x06;
 485   1              
 486   1              SYSCLK_Init();          //init System Clock                     //init mcu -_-!
 487   1              init_mcu();                                                              
 488   1              init_io();
 489   1              Init_SPI();
 490   1              init_int0();    
 491   1              init_24L01();   
 492   1              CheckRS();
 493   1      //      Set_RX();
 494   1              while(1)
 495   1               {
 496   2                              for(d=0;d<0xff;d++)
 497   2                                      {
 498   3                                              tx_buf[1]='d';
 499   3                                      }
 500   2                      Set_TX();
 501   2                      led=0;
 502   2                      delays(100);
 503   2                      led=1;
 504   2                      delays(100);
 505   2      /*              if(flag)
 506   2                      {
 507   2                              led=0;
 508   2                              delays(100);
 509   2                              led=1;
 510   2                              delays(100);
 511   2                      }       */
 512   2                      //CheckButtons();
 513   2               }
 514   1      }
 515          void ISR_int0(void) interrupt 0
 516          {
 517   1              sta=read_rf_reg(STATUS);        // read register STATUS's value
 518   1              if(RX_DR)                               // if receive data ready (RX_DR) interrupt
 519   1              {
 520   2                      CE=0;
 521   2                      SPI_rf_write(TX_PLOAD_WIDTH);
 522   2                  SPI_rf_read();
 523   2                      CE=1;                                                                   
 524   2                      flag=1;
 525   2              }
 526   1              if(MAX_RT) 
 527   1              {
 528   2                      write_rf_reg(FLUSH_TX,0);
 529   2              }
 530   1              
 531   1              write_rf_reg(STATUS,sta);// clear RX_DR or TX_DS or MAX_RT interrupt flag
 532   1      }                       
C51 COMPILER V7.50   MAIN                                                                  05/25/2010 11:46:57 PAGE 10  

NAME                                    CLASS   MSPACE  TYPE    OFFSET  SIZE
====                                    =====   ======  ====    ======  ====


SPI0CKR. . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00A2H  1
P0 . . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   0080H  1
P1 . . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   0090H  1
P2 . . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00A0H  1
P3 . . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00B0H  1
EA . . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00AFH  1
CheckRS. . . . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
  reg_val. . . . . . . . . . . . . . .  * REG *  DATA   U_CHAR   0007H  1
CE . . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0084H  1
IT01CF . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00E4H  1
rx_buf . . . . . . . . . . . . . . . .  PUBLIC   DATA   ARRAY    0000H  20
tx_buf . . . . . . . . . . . . . . . .  PUBLIC   DATA   ARRAY    0014H  20
P0MDOUT. . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00A4H  1
P1MDOUT. . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00A5H  1
TMR2RLH. . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00CBH  1
P2MDOUT. . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00A6H  1
P3MDOUT. . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00A7H  1
TMR3RLH. . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   0093H  1
TMR2RLL. . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00CAH  1
TMR3RLL. . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   0092H  1
init_int0. . . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
_SPI_rf_write. . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
  dat. . . . . . . . . . . . . . . . .  * REG *  DATA   U_CHAR   0007H  1
TX_ADDRESS . . . . . . . . . . . . . .  PUBLIC   DATA   ARRAY    0028H  5
PCA0MD . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00D9H  1
flag . . . . . . . . . . . . . . . . .  PUBLIC   DATA   U_CHAR   002DH  1
XBR0 . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00E1H  1
XBR1 . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00E2H  1
RX_DR. . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0006H  1
TX_DS. . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0005H  1
SPI_rf_read. . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
led_shake. . . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
main . . . . . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
  d. . . . . . . . . . . . . . . . . .  * REG *  DATA   U_CHAR   0007H  1
  i. . . . . . . . . . . . . . . . . .  AUTO     DATA   U_INT    0000H  2
VDM0CN . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00FFH  1
P0MDIN . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00F1H  1
init_24L01 . . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
P1MDIN . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00F2H  1
P2MDIN . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00F3H  1
u8 . . . . . . . . . . . . . . . . . .  TYPEDEF  -----  U_CHAR   -----  1
P3MDIN . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00F4H  1
SPI0CN . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00F8H  1
PCON . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   0087H  1
SPIF . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00FFH  1
BYTE . . . . . . . . . . . . . . . . .  TYPEDEF  -----  U_CHAR   -----  1
TMOD . . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   0089H  1
led. . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00A4H  1
Set_RX . . . . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
TMR2CN . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00C8H  1
TMR3CN . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   0091H  1
Set_TX . . . . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
_write_rf_data . . . . . . . . . . . .  PUBLIC   CODE   PROC     000BH  -----
  reg. . . . . . . . . . . . . . . . .  AUTO     DATA   U_CHAR   0007H  1
  data_ptr . . . . . . . . . . . . . .  AUTO     DATA   PTR      0001H  3
  nLength. . . . . . . . . . . . . . .  AUTO     DATA   U_CHAR   0004H  1
  i. . . . . . . . . . . . . . . . . .  * REG *  DATA   U_CHAR   0006H  1
C51 COMPILER V7.50   MAIN                                                                  05/25/2010 11:46:57 PAGE 11  

NAME                                    CLASS   MSPACE  TYPE    OFFSET  SIZE
====                                    =====   ======  ====    ======  ====


sta. . . . . . . . . . . . . . . . . .  PUBLIC   DATA   U_CHAR   0000H  1
key. . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00B0H  1
ET2. . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00ADH  1
ISR_int0 . . . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
EX0. . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00A8H  1
IT0. . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0088H  1
EX1. . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00AAH  1
IT1. . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      008AH  1
SYSCLK_Init. . . . . . . . . . . . . .  EXTERN   CODE   PROC     -----  -----
CheckButtons . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
TR0. . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      008CH  1
_read_rf_reg . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
  address. . . . . . . . . . . . . . .  * REG *  DATA   U_CHAR   0007H  1
  status . . . . . . . . . . . . . . .  * REG *  DATA   U_CHAR   0007H  1
TR1. . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      008EH  1
TR2. . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00CAH  1
PX0. . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      00B8H  1
tf . . . . . . . . . . . . . . . . . .  PUBLIC   DATA   U_CHAR   002EH  1
u32. . . . . . . . . . . . . . . . . .  TYPEDEF  -----  U_LONG   -----  4
u16. . . . . . . . . . . . . . . . . .  TYPEDEF  -----  U_INT    -----  2
init_mcu . . . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
SCK. . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0080H  1
Init_SPI . . . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
RSTSRC . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00EFH  1
CSN. . . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0083H  1
_delays. . . . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
  n. . . . . . . . . . . . . . . . . .  * REG *  DATA   U_CHAR   0007H  1
_write_rf_reg. . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
  address. . . . . . . . . . . . . . .  * REG *  DATA   U_CHAR   0007H  1
  dat. . . . . . . . . . . . . . . . .  * REG *  DATA   U_CHAR   0006H  1
i. . . . . . . . . . . . . . . . . . .  PUBLIC   DATA   U_CHAR   002FH  1
MAX_RT . . . . . . . . . . . . . . . .  ABSBIT   -----  BIT      0004H  1
SPI0CFG. . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00A1H  1
init_io. . . . . . . . . . . . . . . .  PUBLIC   CODE   PROC     0000H  -----
CKCON. . . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   008EH  1
_delay . . . . . . . . . . . . . . . .  EXTERN   CODE   PROC     -----  -----
SPI0DAT. . . . . . . . . . . . . . . .  SFR      DATA   U_CHAR   00A3H  1


MODULE INFORMATION:   STATIC OVERLAYABLE
   CODE SIZE        =    581    ----
   CONSTANT SIZE    =   ----    ----
   XDATA SIZE       =   ----    ----
   PDATA SIZE       =   ----    ----
   DATA SIZE        =     49       7
   IDATA SIZE       =   ----    ----
   BIT SIZE         =   ----    ----
END OF MODULE INFORMATION.


C51 COMPILATION COMPLETE.  0 WARNING(S),  0 ERROR(S)

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