📄 scsireg.h
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MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x16 = 24 Bytes */ u_char trk_per_zone[2]; u_char alt_sec_per_zone[2]; u_char alt_trk_per_zone[2]; u_char alt_trk_per_vol[2]; u_char sect_per_trk[2]; u_char bytes_per_phys_sect[2]; u_char interleave[2]; u_char trk_skew[2]; u_char cyl_skew[2]; Ucbit : 3; Ucbit inhibit_save : 1; Ucbit fmt_by_surface : 1; Ucbit removable : 1; Ucbit hard_sec : 1; Ucbit soft_sec : 1; u_char res[3];};#else /* Motorola byteorder */struct scsi_mode_page_03 { /* Direct access format Paramters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x16 = 24 Bytes */ u_char trk_per_zone[2]; u_char alt_sec_per_zone[2]; u_char alt_trk_per_zone[2]; u_char alt_trk_per_vol[2]; u_char sect_per_trk[2]; u_char bytes_per_phys_sect[2]; u_char interleave[2]; u_char trk_skew[2]; u_char cyl_skew[2]; Ucbit soft_sec : 1; Ucbit hard_sec : 1; Ucbit removable : 1; Ucbit fmt_by_surface : 1; Ucbit inhibit_save : 1; Ucbit : 3; u_char res[3];};#endif#if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */struct scsi_mode_page_04 { /* Rigid disk Geometry Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x16 = 24 Bytes */ u_char ncyl[3]; u_char nhead; u_char start_precomp[3]; u_char start_red_wcurrent[3]; u_char step_rate[2]; u_char landing_zone[3]; Ucbit rot_pos_locking : 2; /* Start SCSI-2 */ Ucbit : 6; /* Start SCSI-2 */ u_char rotational_off; u_char res1; u_char rotation_rate[2]; u_char res2[2];};#else /* Motorola byteorder */struct scsi_mode_page_04 { /* Rigid disk Geometry Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x16 = 24 Bytes */ u_char ncyl[3]; u_char nhead; u_char start_precomp[3]; u_char start_red_wcurrent[3]; u_char step_rate[2]; u_char landing_zone[3]; Ucbit : 6; /* Start SCSI-2 */ Ucbit rot_pos_locking : 2; /* Start SCSI-2 */ u_char rotational_off; u_char res1; u_char rotation_rate[2]; u_char res2[2];};#endif#if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */struct scsi_mode_page_05 { /* Flexible disk Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x1E = 32 Bytes */ u_char transfer_rate[2]; u_char nhead; u_char sect_per_trk; u_char bytes_per_phys_sect[2]; u_char ncyl[2]; u_char start_precomp[2]; u_char start_red_wcurrent[2]; u_char step_rate[2]; u_char step_pulse_width; u_char head_settle_delay[2]; u_char motor_on_delay; u_char motor_off_delay; Ucbit spc : 4; Ucbit : 4; Ucbit : 5; Ucbit mo : 1; Ucbit ssn : 1; Ucbit trdy : 1; u_char write_compensation; u_char head_load_delay; u_char head_unload_delay; Ucbit pin_2_use : 4; Ucbit pin_34_use : 4; Ucbit pin_1_use : 4; Ucbit pin_4_use : 4; u_char rotation_rate[2]; u_char res[2];};#else /* Motorola byteorder */struct scsi_mode_page_05 { /* Flexible disk Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x1E = 32 Bytes */ u_char transfer_rate[2]; u_char nhead; u_char sect_per_trk; u_char bytes_per_phys_sect[2]; u_char ncyl[2]; u_char start_precomp[2]; u_char start_red_wcurrent[2]; u_char step_rate[2]; u_char step_pulse_width; u_char head_settle_delay[2]; u_char motor_on_delay; u_char motor_off_delay; Ucbit trdy : 1; Ucbit ssn : 1; Ucbit mo : 1; Ucbit : 5; Ucbit : 4; Ucbit spc : 4; u_char write_compensation; u_char head_load_delay; u_char head_unload_delay; Ucbit pin_34_use : 4; Ucbit pin_2_use : 4; Ucbit pin_4_use : 4; Ucbit pin_1_use : 4; u_char rotation_rate[2]; u_char res[2];};#endif#if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */struct scsi_mode_page_07 { /* Verify Error recovery */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x0A = 12 Bytes */ Ucbit disa_correction : 1; /* Byte 2 */ Ucbit term_on_rec_err : 1; Ucbit report_rec_err : 1; Ucbit en_early_corr : 1; Ucbit res : 4; /* Byte 2 */ u_char ve_retry_count; /* Byte 3 */ u_char ve_correction_span; char res2[5]; /* Byte 5 */ u_char ve_recov_timelim[2]; /* Byte 10 */};#else /* Motorola byteorder */struct scsi_mode_page_07 { /* Verify Error recovery */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x0A = 12 Bytes */ Ucbit res : 4; /* Byte 2 */ Ucbit en_early_corr : 1; Ucbit report_rec_err : 1; Ucbit term_on_rec_err : 1; Ucbit disa_correction : 1; /* Byte 2 */ u_char ve_retry_count; /* Byte 3 */ u_char ve_correction_span; char res2[5]; /* Byte 5 */ u_char ve_recov_timelim[2]; /* Byte 10 */};#endif#if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */struct scsi_mode_page_08 { /* Caching Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x0A = 12 Bytes */ Ucbit disa_rd_cache : 1; /* Byte 2 */ Ucbit muliple_fact : 1; Ucbit en_wt_cache : 1; Ucbit res : 5; /* Byte 2 */ Ucbit wt_ret_pri : 4; /* Byte 3 */ Ucbit demand_rd_ret_pri: 4; /* Byte 3 */ u_char disa_pref_tr_len[2]; /* Byte 4 */ u_char min_pref[2]; /* Byte 6 */ u_char max_pref[2]; /* Byte 8 */ u_char max_pref_ceiling[2]; /* Byte 10 */};#else /* Motorola byteorder */struct scsi_mode_page_08 { /* Caching Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x0A = 12 Bytes */ Ucbit res : 5; /* Byte 2 */ Ucbit en_wt_cache : 1; Ucbit muliple_fact : 1; Ucbit disa_rd_cache : 1; /* Byte 2 */ Ucbit demand_rd_ret_pri: 4; /* Byte 3 */ Ucbit wt_ret_pri : 4; u_char disa_pref_tr_len[2]; /* Byte 4 */ u_char min_pref[2]; /* Byte 6 */ u_char max_pref[2]; /* Byte 8 */ u_char max_pref_ceiling[2]; /* Byte 10 */};#endifstruct scsi_mode_page_09 { /* Peripheral device Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* >= 0x06 = 8 Bytes */ u_char interface_id[2]; /* Byte 2 */ u_char res[4]; /* Byte 4 */ u_char vendor_specific[1]; /* Byte 8 */};#define PDEV_SCSI 0x0000 /* scsi interface */#define PDEV_SMD 0x0001 /* SMD interface */#define PDEV_ESDI 0x0002 /* ESDI interface */#define PDEV_IPI2 0x0003 /* IPI-2 interface */#define PDEV_IPI3 0x0004 /* IPI-3 interface */#if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */struct scsi_mode_page_0A { /* Common device Control Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x06 = 8 Bytes */ Ucbit rep_log_exeption: 1; /* Byte 2 */ Ucbit res : 7; /* Byte 2 */ Ucbit dis_queuing : 1; /* Byte 3 */ Ucbit queuing_err_man : 1; Ucbit res2 : 2; Ucbit queue_alg_mod : 4; /* Byte 3 */ Ucbit EAENP : 1; /* Byte 4 */ Ucbit UAENP : 1; Ucbit RAENP : 1; Ucbit res3 : 4; Ucbit en_ext_cont_all : 1; /* Byte 4 */ Ucbit res4 : 8; u_char ready_aen_hold_per[2]; /* Byte 6 */};#else /* Motorola byteorder */struct scsi_mode_page_0A { /* Common device Control Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x06 = 8 Bytes */ Ucbit res : 7; /* Byte 2 */ Ucbit rep_log_exeption: 1; /* Byte 2 */ Ucbit queue_alg_mod : 4; /* Byte 3 */ Ucbit res2 : 2; Ucbit queuing_err_man : 1; Ucbit dis_queuing : 1; /* Byte 3 */ Ucbit en_ext_cont_all : 1; /* Byte 4 */ Ucbit res3 : 4; Ucbit RAENP : 1; Ucbit UAENP : 1; Ucbit EAENP : 1; /* Byte 4 */ Ucbit res4 : 8; u_char ready_aen_hold_per[2]; /* Byte 6 */};#endif#define CTRL_QMOD_RESTRICT 0x0#define CTRL_QMOD_UNRESTRICT 0x1struct scsi_mode_page_0B { /* Medium Types Supported Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x06 = 8 Bytes */ u_char res[2]; /* Byte 2 */ u_char medium_one_supp; /* Byte 4 */ u_char medium_two_supp; /* Byte 5 */ u_char medium_three_supp; /* Byte 6 */ u_char medium_four_supp; /* Byte 7 */};#if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */struct scsi_mode_page_0C { /* Notch & Partition Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x16 = 24 Bytes */ Ucbit res : 6; /* Byte 2 */ Ucbit logical_notch : 1; Ucbit notched_drive : 1; /* Byte 2 */ u_char res2; /* Byte 3 */ u_char max_notches[2]; /* Byte 4 */ u_char active_notch[2]; /* Byte 6 */ u_char starting_boundary[4]; /* Byte 8 */ u_char ending_boundary[4]; /* Byte 12 */ u_char pages_notched[8]; /* Byte 16 */};#else /* Motorola byteorder */struct scsi_mode_page_0C { /* Notch & Partition Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x16 = 24 Bytes */ Ucbit notched_drive : 1; /* Byte 2 */ Ucbit logical_notch : 1; Ucbit res : 6; /* Byte 2 */ u_char res2; /* Byte 3 */ u_char max_notches[2]; /* Byte 4 */ u_char active_notch[2]; /* Byte 6 */ u_char starting_boundary[4]; /* Byte 8 */ u_char ending_boundary[4]; /* Byte 12 */ u_char pages_notched[8]; /* Byte 16 */};#endif#if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */struct scsi_mode_page_0D { /* CD-ROM Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x06 = 8 Bytes */ u_char res; /* Byte 2 */ Ucbit inact_timer_mult: 4; /* Byte 3 */ Ucbit res2 : 4; /* Byte 3 */ u_char s_un_per_m_un[2]; /* Byte 4 */ u_char f_un_per_s_un[2]; /* Byte 6 */};#else /* Motorola byteorder */struct scsi_mode_page_0D { /* CD-ROM Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x06 = 8 Bytes */ u_char res; /* Byte 2 */ Ucbit res2 : 4; /* Byte 3 */ Ucbit inact_timer_mult: 4; /* Byte 3 */ u_char s_un_per_m_un[2]; /* Byte 4 */ u_char f_un_per_s_un[2]; /* Byte 6 */};#endifstruct sony_mode_page_20 { /* Sony Format Mode Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x0A = 12 Bytes */ u_char format_mode; u_char format_type;#define num_bands user_band_size /* Gilt bei Type 1 */ u_char user_band_size[4]; /* Gilt bei Type 0 */ u_char spare_band_size[2]; u_char res[2];};#if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */struct toshiba_mode_page_20 { /* Toshiba Speed Control Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x01 = 3 Bytes */ Ucbit speed : 1; Ucbit res : 7;};#else /* Motorola byteorder */struct toshiba_mode_page_20 { /* Toshiba Speed Control Parameters */ MP_P_CODE; /* parsave & pagecode */ u_char p_len; /* 0x01 = 3 Bytes */ Ucbit res : 7; Ucbit speed : 1;};#endif#if defined(_BIT_FIELDS_LTOH) /* Intel byteorder */
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