compare

共 79 篇文章
compare 相关的电子技术资料,包括技术文档、应用笔记、电路设计、代码示例等,共 79 篇文章,持续更新中。

compare the web framework

compare the web framework

ATMEL XMEGA ADC Compare Function program.

ATMEL XMEGA ADC Compare Function program.

The FPGA can realize a more optimized Digital controller in DC/DC Converters when compare to DSPs. I

The FPGA can realize a more optimized Digital controller in DC/DC Converters when compare to DSPs. In this paper, based on the FPGA platform, The theoretical analysis, characteristics, simulation and

This program is compare the data in sql server. And you can syncronize the table and views this is v

This program is compare the data in sql server. And you can syncronize the table and views this is very beautiful program.

In computer vision, sets of data acquired by sampling the same scene or object at different times, o

In computer vision, sets of data acquired by sampling the same scene or object at different times, or from different perspectives, will be in different coordinate systems. Image registration is the pr

windiff compare different files

windiff compare different files

这个程序是编译程序的一部分

这个程序是编译程序的一部分,用于阅读源代码,并识别其中的标记符、关键词(以字母开头)、数(以数字开头)。其中数按其是否以0开头分为10进制和8/16进制,而16进制的第二位是“x”。将上述所有识别的内容分类显示在屏幕和文件result.txt中。 函数scan负责整个识别、输出过程,compare1负责识别单个字符,compare2识别词。

Windowed-Burg method is made in order to improve the Clasical Burg method. Previously, I send the PB

Windowed-Burg method is made in order to improve the Clasical Burg method. Previously, I send the PBURGW.m file, but now I include also the ARBURGW.m algorithm and some NOTES-EXAMPLES to explain it an

have recently become very interested in the area of genetic algorithms and Ant Colony Optimization t

have recently become very interested in the area of genetic algorithms and Ant Colony Optimization techniques. I was determined to write a complete program demonstrating these two techniques. In parti

本例展示了如何设置TIM工作在输出比较-非主动模式(Output Compare Inactive mode)

本例展示了如何设置TIM工作在输出比较-非主动模式(Output Compare Inactive mode),并产生相应的中断。 TIM2时钟设置为36MHz,预分频设置为35999,TIM2计数器时钟可表达为: TIM2 counter clock = TIMxCLK / (Prescaler +1) = 1 KHz 设置TIM2_CCR1寄存器值为1000, CCR1寄存器值1

AVL Tree implementation: I also included a test function to compare the AVL Tree performance with S

AVL Tree implementation: I also included a test function to compare the AVL Tree performance with STL Set and Map. Compile the source mavltree.cpp and run it to see the result!

1.kruscal_CDT: 在Eclipse里面的CDT和MinGW(提供gcc)的环境下所编写的。 2.kruscal_VC2005: 在VC2005里面编写的。 3.以上两个的代码有点不同,

1.kruscal_CDT: 在Eclipse里面的CDT和MinGW(提供gcc)的环境下所编写的。 2.kruscal_VC2005: 在VC2005里面编写的。 3.以上两个的代码有点不同,区别主要在于compare函数 4.kruscal算法里面,我有两个不同的实现,一个是最小化堆里面放EdgeNode的指针,一个是最小化堆里面放EdgeNode的Object实例。前者使用了co

nand nor flash description and compare document.

nand nor flash description and compare document.

The radially averaged power spectrum (RAPS) is the direction-independent mean spectrum, i.e. the ave

The radially averaged power spectrum (RAPS) is the direction-independent mean spectrum, i.e. the average of all possible directional power spectra. This function computes and plots the RAPS of an inpu

The C++ Editor is a text editor for C++ programmers. The editor have color syntax highlighting. Ed

The C++ Editor is a text editor for C++ programmers. The editor have color syntax highlighting. Editor s main purpose is to edit source code files outside the IDE (Integrated Development Environme

SPMC65系列单片机编程指南(中文版)

SPMC65系列单片机编程指南(中文版):SPMC65X系列是由凌阳公司设计开发的8位微控制器。每款芯片都独具特色,同时凌阳公司还开发了一款仿真芯片ECMC653,专门用于SPMC65X系列的仿真。采用 SPMC65 CPU 核,凌阳公司新开发了功能强大的8位SPMC65系列CPU。该系列CPU 具有可编程的通用I/O端口、不同大小的ROM 和RAM 区、8位/16位定时/计数器、强大的CCP (

将您的微控制器ADC升级至真正的12位性能

<p> &nbsp;</p> <div> Many 8-bit and 16-bit microcontrollers feature 10-bitinternal ADCs. A few include 12-bit ADCs, but these oftenhave poor or nonexistent AC specifi cations, and certainlylack the

音频数模转换器DAC抖动的灵敏度分析

<div> Abstract: This application note describes how sampling clock jitter (time interval error or &quot;TIE jitter&quot;) affectsthe performance of delta-sigma digital-to-analog converters (DACs). Ne

C8051F020

<p> HIGH SPEED 8051 &mu;C CORE<br /> - Pipe-lined Instruction Architecture; Executes 70% of Instructions in 1 or 2<br /> System Clocks<br /> - Up to 25MIPS Throughput with 25MHz System Clock<br />