Synthesis
共 117 篇文章
Synthesis 相关的电子技术资料，包括技术文档、应用笔记、电路设计、代码示例等，共 117 篇文章，持续更新中。
A digital sinusoid synthesis based on the postscaled cordic
A digital sinusoid synthesis based on the postscaled cordic
本系统分电压测量和信号产生输出两大部分
本系统分电压测量和信号产生输出两大部分，电压测量部分以模拟电路为主，配合放大模块、A/D转化模块、显示模块；通过凌阳单片机进行数据处理，在误差允许范围内显示测量电压值。信号产生以直接数字式频率合成器(Direct Digital Frequency Synthesis,简称DDS或DDFS)为核心，经过AT89S52对DDS芯片内部进行控制，使之输出标准正弦波形，利用编程实现频率预置、步进，达到电
VHDL for synthesis for vhdl coding ....
VHDL for synthesis for vhdl coding ....
Simulation and Synthesis Techniques for Asynchronous FIFO Design with Asynchronous Pointer Comparis
Simulation and Synthesis Techniques for Asynchronous
FIFO Design with Asynchronous Pointer Comparisons
The emphasis of this book is on real-time application of Synopsys tools, used to combat various pro
The emphasis of this book is on real-time application of Synopsys tools, used
to combat various problems seen at VDSM geometries. Readers will be
exposed to an effective design methodology for handl
arm vhdl rtl code,can synthesis
arm vhdl rtl code,can synthesis
Leon on Altera Boarsds. This shows how to synthesis leon processor to altera boards through the use
Leon on Altera Boarsds. This shows how to synthesis leon processor to altera boards through the use of quartus 3.
Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book descr
Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book describes the advanced concepts and
techniques used towards ASIC chip synthesis, physical synthesis, fo
1. Learn the basic constructs of VHDL 2. Learn the modeling structure of VHDL 3. Understand the de
1. Learn the basic constructs of VHDL
2. Learn the modeling structure of VHDL
3. Understand the design environments
– Simulation
– Synthesis
ECE345, Visual-to-Audio Electronic Travel Aid Code for TM320C54x (v2a.asm) download This project
ECE345, Visual-to-Audio Electronic Travel Aid
Code for TM320C54x (v2a.asm) download
This project involves the design and implementation of a audio synthesis device that converts moving images into
編譯器設計 Analysis-Synthesis Model 分析Analysis: 原始程式轉換成階層結構稱為樹(tree)
編譯器設計 Analysis-Synthesis Model
分析Analysis: 原始程式轉換成階層結構稱為樹(tree)，語法樹(syntax tree)
合成Synthesis: 產生目標碼
_Wiley_Synthesis_of_Arithmetic_Circuits_-_FPGA_ASIC_and_Embedded_Systems_(2006)_-_DDU一些硬體設計教學文件
_Wiley_Synthesis_of_Arithmetic_Circuits_-_FPGA_ASIC_and_Embedded_Systems_(2006)_-_DDU一些硬體設計教學文件
This file contains a selection of VHDL source files which serve to illustrate the diversity and powe
This file contains a selection of VHDL source files which serve to illustrate the diversity and power of the language when used to describe various types of hardware. The examp
terms of basic logic g
This paper presents the key circuits of a 1MHz bandwidth, 750kb/s GMSK transmitter. The fractional-N
This paper presents the key circuits of a 1MHz bandwidth, 750kb/s GMSK transmitter. The fractional-N synthesizer forming the basis of the transmitter uses a combined phasefrequency
detector (PFD) and
Mc68000 rtl code Simulation and Synthesis
Mc68000 rtl code Simulation and Synthesis
A Guide To Digital Design And Synthesis - 2Nd Ed 2003A Guide To Digital Design And Synthesis - 2Nd E
A Guide To Digital Design And Synthesis - 2Nd Ed 2003A Guide To Digital Design And Synthesis - 2Nd Ed 2003
直接数字频率合成（Direct Digital Fraquency Synthesis,即DDFS
直接数字频率合成（Direct Digital Fraquency Synthesis,即DDFS，一般简称DDS）是从相位概念出发直接合成所需要波形的一种新的频率合成技术。
Verilog HDL Synthesis, A Practical Primer 学习Verilog HDL一本很不错的英文书
Verilog HDL Synthesis, A Practical Primer
学习Verilog HDL一本很不错的英文书，比较透彻
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) d
The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip
(SOC) development. The IP cores are centered around a common on-chip bus, and use a coherent
method for si
Writing Analytically ( 6th Edition )
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