Register
共 177 篇文章
Register 相关的电子技术资料，包括技术文档、应用笔记、电路设计、代码示例等，共 177 篇文章，持续更新中。
XAPP719 -利用USR_ACCESS寄存器实现PowerPC高速缓存配置
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The Virtex™-4 user access register (USR_ACCESS_VIRTEX4) is a 32-bit register thatprovides direct access to bitstream data by the FPGA fabric. It is useful for loadingPowerPC™ 405 (P
VHDL实现SPI功能源代码 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register betw
VHDL实现SPI功能源代码
-- The SPI bus is a 3 wire bus that in effect links a serial shift
-- register between the "master" and the "slave". Typically both the
-- master and slave have an 8 bit shift regist
Please place this entire folder (complete with contents) into your System32 directory folder D
Please place this entire folder (complete with contents) into your System32 directory folder
Double click on the Register .bat file to Register
Double click on the UnRegister .bat file to UnReg
JILRuntime A general purpose, register based virtual machine (VM) that supports object-oriented feat
JILRuntime A general purpose, register based virtual machine (VM) that supports object-oriented features, reference counting (auto destruction of data as soon as it is no longer used, no garbage colle
IEEE Std 1364.1-2002 IEEE Std. 1364.1 - 2002 IEEE Standard for Verilog Register Transfer Level Synth
IEEE Std 1364.1-2002 IEEE Std. 1364.1 - 2002 IEEE Standard for Verilog Register Transfer Level Synthesis.rar
This assessment creates an initial version of the auction project that allows user to register, logi
This assessment creates an initial version of the auction project that allows user to register, login, and logout. Registered users can post items (advertisements) for auction.
This application note gives an example for microcontroller C code. It includes code for: Readout
This application note gives an example for microcontroller C code. It includes code for:
Readout of Humidity (RH) or Temperature (T) with basic error handling
Calculation of RH linearization a
display the register value in vb
display the register value in vb
EDB (Evan s Debugger) is a QT4 based binary mode debugger with the goal of having usability on par w
EDB (Evan s Debugger) is a QT4 based binary mode debugger with the goal of having usability on par with OllyDbg. It uses a plugin architecture, so adding new features can be done with ease. The curren
This project is created using the Keil ARM CA Compiler. The Logic Analyzer built into the simula
This project is created using the Keil ARM CA Compiler.
The Logic Analyzer built into the simulator may be used to monitor and display any variable or peripheral I/O register. It is already config
Shift Register. VHDL code and its testbench.
Shift Register. VHDL code and its testbench.
和register对应的解密机的源码,VC。
和register对应的解密机的源码,VC。
In this paper, the feasibility of replacing a chaos source by an equivalent digital pseudo-random ge
In this paper, the feasibility of replacing a chaos source by an equivalent digital pseudo-random generator realized using Linear Feedback Shift Register (LFSR) is studied. Particular emphasis is give
iccavr v6.31a破解版下载
<p>
ICCAVR V6.31A下载，ICCAVR专业版，AVR单片机C语言开发软件。目前国内用的最广泛的AVR单片机开发软件。<br />
推荐大家使用：ICCAVR V6.31A。</p>
<p>
1、运行iccavr6.31A进行软件安装，注此注册机只支持这此版本。</p>
<p>
2、打开安装完的软件，在HELP选项下选Register software,会弹出注册窗口。</p>
uart全功能实现.实现如下函数: U_Open, U_Close, U_GetBytes, U_PutBytes, U_GetBytesAvail, U_GetTxRoomL
uart全功能实现.实现如下函数:
U_Open,
U_Close,
U_GetBytes,
U_PutBytes,
U_GetBytesAvail,
U_GetTxRoomLeft,
U_PutISRBytes,
U_GetTxISRRoomLeft,
U_Purge,
U_SetOwner,
U_SetFlowCtrl,
U_ConfigEsc
PCA9542A 2channel I2C bus mult
<P>The PCA9542A is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus.<BR>The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.<BR>Only one SCx/SDx c
-- DESCRIPTION : Shift register -- Type : univ -- Width : 4 -- Shift direction: right/left (right
-- DESCRIPTION : Shift register
-- Type : univ
-- Width : 4
-- Shift direction: right/left (right active high)
--
-- CLK active : high
-- CLR active : high
-- CLR type : synchronous
-- SET act
This project shows how to use the IOKit notification mechanism to register to be notified when devic
This project shows how to use the IOKit notification mechanism to register to be notified when devices come and go. It uses the Cypress/Anchor EZ-USB chip. (Look at the following example for another w
Verilog_HDL的基本语法详解（夏宇闻版）
Verilog_HDL的基本语法详解（夏宇闻版）:Verilog HDL是一种用于数字逻辑电路设计的语言。用Verilog HDL描述的电路设计就是该电路的Verilog HDL模型。Verilog HDL既是一种行为描述的语言也是一种结构描述的语言。这也就是说，既可以用电路的功能描述也可以用元器件和它
MAXQUSBJTAGOW评估板软件
MAXQUSBJTAGOW评估板软件:关键特性 Easily Load and Debug Code Interface Provides In-Application Debugging Features Step-by-Step Execution Tracing Breakpointing by Code Address, Data Memory Address, or Register A