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通讯编程文档 Communication and Diagnostic Protocol of Control System on Heavy-duty Vehicle 你可以了解各种和汽车通讯的协议
Communication and Diagnostic Protocol of Control System on Heavy-duty Vehicle
你可以了解各种和汽车通讯的协议
微处理器开发 The purpose of this document is to define the format of the messages and data being communicated be
The purpose of this document is to define the format of the messages and data being
communicated between microprocessors used in heavy-duty vehicle applications. It is meant to serve as a
guide toward a standard practice to promote software compatibility among microcomputer based modules.
This docum ...
驱动编程 DKW Heavy Industries VPN network driver
DKW Heavy Industries VPN network driver
J2ME call of duty,射击类游戏 j2me编写。能在s60系统下运行。
call of duty,射击类游戏 j2me编写。能在s60系统下运行。
嵌入式/单片机编程 240x128 graphic mode/Driver ic:t6963C writed by hawk liu 2001 Aug. 22 1/128 duty 1/12.3 bia
240x128 graphic mode/Driver ic:t6963C
writed by hawk liu
2001 Aug. 22
1/128 duty 1/12.3 bias
Vop=20V
STN GRAY Trasflective mode
character/Graphic mode demo program
Java编程 Very Nice library for using ActiveX controls directly from java without heavy knowledge of JNI, simp
Very Nice library for using ActiveX controls directly from java without heavy knowledge of JNI, simple activeX control usage like in VB, for windows platform, I always used this java library for activeX controls
其他书籍 linux内核各文件解析 作者：赵炯 Linux 内核0.11 详细注释 A Heavy Commented Linux Kernel Source Code Linux Version 0.
linux内核各文件解析
作者：赵炯
Linux 内核0.11 详细注释
A Heavy Commented Linux Kernel Source Code
Linux Version 0.11
单片机开发 富士通单片机MB902420系列The internal LCD-cotroller will be initialised (1/2 bias, 1/2 duty). The internal R
富士通单片机MB902420系列The internal LCD-cotroller will be initialised (1/2 bias, 1/2 duty).
The internal Resistor devider is used.
Some different methods are shown, how segments can be swicthed on/off.
DSP编程 This demo shows the use of the PWM block in generating the pulse waveform whose duty cycle is changi
This demo shows the use of the PWM block in generating the pulse waveform whose duty cycle is changing regularly. The PWM waveform period is variable, while the width of the pulse remains constant.
VHDL/FPGA/Verilog VHDL code for a clock divider by 27 circuit with a resulting waveform with 50％ duty cycle..
VHDL code for a clock divider by 27 circuit with a resulting waveform with 50％ duty cycle..