Guidelines
共 115 篇文章
Guidelines 相关的电子技术资料，包括技术文档、应用笔记、电路设计、代码示例等，共 115 篇文章，持续更新中。
MAX7060的ASK_FSK的ISM射频发射机
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Abstract: This application note illustrates the flexibility of the MAX7060 ASK/FSK transmitter. While the currently available evaluationkit (EV kit) has been optimized for the device's use
EDGE信道分配原则
<P> Contents</P>
<P> 1 Introduction 1</P>
<P> 2 Glosary 1</P>
<P> 2.1 Concepts 1</P>
<P> 2.2 Abbreviations and acronyms 4</P>
<P> 3 Capabilities 6</P>
<P> 4 Technical Description 6</P>
<P> 4.1
开关电源EMI设计(英文版)
<P>Integrated EMI/Thermal Design for<BR>Switching Power Supplies<BR>Wei Zhang<BR>Thesis submitted to the Faculty of the<BR>Virginia Polytechnic Institute and State University<BR>in partial fulfillment
PCB Design Considerations and Guidelines for 0.4mm and 0.5mm WLPs
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Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and
Verilog编码中的非阻塞性赋值
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One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingass
pcb layout规则
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用于信号调理的微电路
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Low power operation of electronic apparatus has becomeincreasingly desirable. Medical, remote data acquisition,power monitoring and other applications are good candidatesfor bat
MPLAB C30用户指南(英文)
<P><STRONG>MPLAB C30用户指南(英文)</STRONG></P>
<P><STRONG>HIGHLIGHTS</STRONG><BR>The information covered in this chapter is as follows:<BR>• About this Guide<BR>• Recommended Reading<BR>•
LTM4601 DC/DC微型模块性能
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The LTM4601 DC/DC μModule regulator is a completehigh power density stepdown regulator for up to 12Acontinuous (14A peak) loads. The device is housed ina small 15mm ¥ 15m
Verilog编码中的非阻塞性赋值
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One of the most misunderstood constructs in the Verilog language is the nonblockingassignment. Even very experienced Verilog designers do not fully understand how nonblockingass
pci e PCB设计规范
<p>This document provides practical, common guidelines for incorporating PCI Express interconnect<br />
layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10-<
PCB Design Considerations and Guidelines for 0.4mm and 0.5mm WLPs
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Abstract: Using a wafer-level package (WLP) can reduce the overall size and cost of your solution.However when using a WLP IC, the printed circuit board (PCB) layout can become more complex and
使用Nios II紧耦合存储器教程
使用Nios II紧耦合存储器教程<br />
Chapter 1. Using Tightly Coupled Memory with the Nios II Processor<br />
Reasons for Using Tightly Coup
SM320 PCB LAYOUT GUIDELINES
Silicon Motion, Inc. has made best efforts to ensure that the information contained in this document is accurate and<BR>reliable. However, the information is subject to change without notice. No respo
VGA时序标准08版
有最新高清标准1920*1080，Proposed VESA and Industry Standards and Guidelines for Computer Display Monitor Timing (DMT) Version 1.0, Revision 12p, Draft 3