GATES
共 66 篇文章
GATES 相关的电子技术资料，包括技术文档、应用笔记、电路设计、代码示例等，共 66 篇文章，持续更新中。
7405 TTL集电极开路六反相器
<P>This device contains six independent gates each of which<BR>performs the logic INVERT function. T
7450 TTL 2-3、2-2输入端双与或非门
<P>This device contains two independent combinations of<BR>gates, each of which perform the logic AN
7438 TTL开路输出2输入端四与非缓冲器
<P>This device contains four independent gates each of which<BR>performs the logic NAND function. Th
7414 TTL六反相施密特触发器
<P>This device contains six independent gates each of which<BR>performs the logic INVERT function. E
4002 CMOS 双4输入或非门
<P>These NOR and NAND gates are monolithic complementary<BR>MOS (CMOS) integrated circuits. The N- a
7427 TTL3输入端三或非门
<P>This device contains three independent gates each of which<BR>performs the logic NOR function.
7416 TTL开路输出六反相缓冲、驱动器
<P>This device contains six independent gates each of which<BR>performs the logic INVERT function. T
7403 TTL集电极开路2输入端四与非门
<P>This device contains four independent gates each of which<BR>performs the logic NAND function. Th
7409 TTL集电极开路2输入端四与门
<P>This device contains four independent gates each of which<BR>performs the logic AND function. The
4030 CMOS 四异或门
<P>The CD4030C EXCLUSIVE-OR gates are monolithic complementary<BR>MOS (CMOS) integrated circuits con
7404 TTL六反相器
<P>This device contains six independent gates each of which<BR>performs the logic INVERT function.
基于FPGA的信道均衡器的设计与实现
在无线通信系统中,信号在传输过程中由于多径效应和信道带宽的有限性以及信道特性的不完善性导致不可避免地产生码间串扰(Intersymbol Interference).为了克服码间串扰所带来的信号畸变,则必须在接收端增加均衡器,以补偿信道特性,正确恢复发送序列.盲均衡器由于不需要训练序列,仅利用接收信号的统计特性就能对信道特性进行均衡,消除码间串扰,成为近年来通信领域研究的热点课题.本课题采用已经取
基于FPGA的计算机可编程外围接口芯片的设计与实现
随着电子技术和EDA技术的发展,大规模可编程逻辑器件PLD(Programmable Logic Device)、现场可编程门阵列FPGA(Field Programmable Gates Array)完全可以取代大规模集成电路芯片,实现计算机可编程接口芯片的功能,并可将若干接口电路的功能集成到一片PLD或FPGA中.基于大规模PLD或FPGA的计算机接口电路不仅具有集成度高、体积小和功耗低等优点
基于FPGA的JPEG图像压缩芯片设计
该文探讨了以FPGA(Field Programmable Gates Array)为平台,使用HDL(Hardware Description Language)语言设计并实现符合JPEG静态图象压缩算法基本模式标准的图象压缩芯片.在简要介绍JPEG基本模式标准和FPGA设计流程的基础上,针对JPEG基本模式硬件编码器传统结构的缺点,提出了一种新的改进结构.JPEG基本模式硬件编码器改进结构的设
4001 CMOS 四2输入或非门
<P>The CD4001BC and CD4011BC quad gates are monolithic<BR>complementary MOS (CMOS) integrated circui
74132 TTL 2输入端四与非施密特触发器
<P>This device contains four independent gates each of which<BR>performs the logic NAND function. Ea
7432 TTL2输入端四或门
<P>This device contains four independent gates each of which<BR>performs the logic OR function.</P>
4012 CMOS 双4输入与非门
<P>These NOR and NAND gates are monolithic complementary<BR>MOS (CMOS) integrated circuits. The N- a
7442 TTL BCD—十进制代码转换器
<P>These BCD-to-decimal decoders consist of eight inverters<BR>and ten, four-input NAND gates. The i
4023 CMOS 三3输入与非门
<P>These triple gates are monolithic complementary MOS<BR>(CMOS) integrated circuits constructed wit