Arithmetic
共 94 篇文章
Arithmetic 相关的电子技术资料，包括技术文档、应用笔记、电路设计、代码示例等，共 94 篇文章，持续更新中。
这是06年4月刚刚完成的程序
这是06年4月刚刚完成的程序，从opencore.org下载而来。用vhdl语言描写，以及matlab仿真，testbench，以及在xinlinx上的综合。
The MDCT core is two dimensional discrete cosine transform implementation designed for use in compression systems like
Topics Practices: Programming and Numerical Methods Practice 1: Introduction to C Practice 2
Topics Practices:
Programming and Numerical Methods
Practice 1: Introduction to C
Practice 2: Cycles and functions
First part cycles
Part Two: Roles
Practice 3 - Floating point arithmeti
Designand Analysisof Fast Text Compression Basedon Quasi-Arithmetic Coding.
Designand Analysisof Fast Text Compression Basedon Quasi-Arithmetic Coding.
TI MSC121x This example uses floating point arithmetic to convert the A/D result.
TI MSC121x This example uses floating point arithmetic to convert
the A/D result.
this is the vhdl code of arithmetic and logic unit of 16 bit microprocessor.
this is the vhdl code of arithmetic and logic unit of 16 bit microprocessor.
自适应算术编码 C语言This package was adapted from the program in "Arithmetic Coding for Data Compression", b
自适应算术编码 C语言This package was adapted from the program in "Arithmetic Coding for
Data Compression", by Ian H. Witten
This zip contains a simple paper of SPIHT generated streams run length encoded ... later i ll be pos
This zip contains a simple paper of SPIHT generated streams run length encoded ... later i ll be posting the MATLAB source code also and also SPIHT with Arithmetic coding
the adaboosting arithmetic
the adaboosting arithmetic
the datestrut and arithmetic with 贪心算法概论
the datestrut and arithmetic with 贪心算法概论
基于单DSP的VoIP模拟电话适配器研究与实现
<P>基于单DSP的VoIP模拟电话适配器研究与实现:提出和实现了一种新颖的基于单个通用数字信号处理器(DSP)的VoIP模拟电话适配器方案。DSP的I/O和存储资源非常有限，通常适于运算密集型应用，不适宜控制密集型应用[5]。该系统高效利用单DSP的I/O和片内外存储器资源，采用μC/OS-II嵌入式实时操作系统，支持SIP和TCP-UDP/IP协议，通过LAN或者宽带接入，使普通电话机成为In
如何提高模幂运算速度应用笔记
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Abstract: This application note describes how to improve the speed of modular exponentiation by more than 50% whenusing MAXQ® microcontrollers that have a modular arithmetic accelerator (MA
Nios II定制指令用户指南
Nios II定制指令用户指南：With the Altera Nios II embedded processor, you as the system designer can accelerate time-critical software algorithms by adding custom instructions to the Ni
_Wiley_Synthesis_of_Arithmetic_Circuits_-_FPGA_ASIC_and_Embedded_Systems_(2006)
_Wiley_Synthesis_of_Arithmetic_Circuits_-_FPGA_ASIC_and_Embedded_Systems_(2006)_-_DDU一些硬體設計教學文件
高效的CABAC解码器设计及FPGA实现
H.264/AVC是ITU与ISO/IEC(International Standard Organization/Intemational Electrotechnical Commission国际标准化组织/国际电工委员会)联合推出的活动图像编码标准。作为最新的国际视频编码标准，H.264/AVC与MPEG-4、H.263等视频编码标准相比，性能有了很大提高，并已在流媒体、数字电视、电话会议、