ALWAYS
共 93 篇文章
ALWAYS 相关的电子技术资料，包括技术文档、应用笔记、电路设计、代码示例等，共 93 篇文章，持续更新中。
多相DC/DC控制器精度和带宽限制
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Speed and accuracy don’t always go hand-in-handin DC/DC converter systems—that is, until now. TheLTC3811 is a dual output, fi xed frequency current modeDC/DC switchi
模拟IC性能的权衡 模拟到数字化设计的挑战
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Abstract: Many digital devices incorporate analog circuits. For instance, microprocessors, applicationspecificintegrated circuits (ASICs), and field-programmable gate arrays (FPGAs) may have in
测量和控制的实用电路分析
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This collection of circuits was worked out between June1991 and July of 1994. Most were designed at customerrequest or are derivatives of such efforts. All representsubstantial
X-tal oscillators on 8-bit mic
<P><Almost since the introduction of microcontrollers as electronic components there always has been an oscillatorcircuit on the device to make it work. From application point of view only some ext
陶瓷电容器的温度和电压的变化
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Abstract: The reality of modern, small form-factor ceramic capacitors is a good reminder to always readthe data sheet. This tutorial explains how ceramic capacitor type designations, such as X7
LS7266R1在电子式万能材料试验机中的应用
针对材料试验机等设备中要求测量或控制材料拉伸或压缩的位移，一般采用光电轴角编码器检测位置信号，输出正交编码脉冲信号。若采用其他方法检测位置信号，必然导致电路设计复杂，可靠性降低。因此，提出一种基于LS7266R1的电子式万能材料试验机设计方案。给出了试验机中的控制器工作原理，LS7266R1与单片机的接口硬件设计，以及主程序软件流程图。巧妙地把力量传感器，位移传感器等机械运动状态的压力或拉力以及位
HITECH与电脑的通信协议
1 Communication Protocol (Computer as master)<br />
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The communication protocol describes here allows your computer to 
Input Signal Rise and Fall Tim
All inputs of the C16x family have Schmitt-Trigger input characteristics. These Schmitt-<BR>Triggers are intended to always provide proper internal low and high levels, even if an<BR>undefined voltage
状态机学习心得
<P> FSM 分两大类：米里型和摩尔型。</P>
<P> 组成要素有输入(包括复位)，状态(包括当前状态的操作)，状态转移条件，状态的输出条件。</P>
<P> 设计FSM 的方法和技巧多种多样，但是总结起来有两大类：第一种，将状态转移和状态的操作和判断等写到一个模块(process、block)中。另一种是将状态转移单独写成一个模块，将状态的操作和判断等写到另一个模块中(在Verilog
3-V TO 5.5-V MULTICHANNEL RS-2
<P>The MAX3243E device consists of three line drivers, five line receivers, and a dual charge-pump circuit with±15-kV ESD (HBM and IEC61000-4-2, Air-Gap Discharge) and ±8-kV ESD (IEC61000-4-2, Contact
FREERTOS的官方移植文档
<STRONG>Features<BR></STRONG>The following standard features are provided.<BR>• Choice of RTOS scheduling policy<BR>1. Pre-emptive:<BR>Always runs the highest available task. Tasks of identical
Many CAD users dismiss schematic capture as a necessary evil in the process of creating
Many CAD users dismiss schematic capture as a necessary evil in the process of creating\r\nPCB layout but we have always disputed this point of view. With PCB layout now offering\r\nautomation of both
FPGA Verilog
FPGA Verilog,双向端口的研究,比较全,由ASSIGN和ALWAYS模块组成,测试可用