This device contains four independent gates each of which
performs the logic AND function.

This device contains four independent gates each of which
performs the logic OR function.

This device contains six independent gates each of which
performs the logic INVERT function.

This device contains three independent gates each of which
performs the logic NOR function.

This device contains three independent gates each of which
performs the logic NAND function.

This device contains six independent buffers each of which
performs the logic INVERT function.

This device contains three independent gates with three
data inputs each which perform the log

This device contains four independent gates with two data
inputs, each which performs the logi

This device contains four independent gates each of which
performs the logic NAND function. Ea

This device contains four independent gates each of which
performs the logic NAND function. Th

This device contains six independent gates each of which
performs the logic INVERT function. T

This device contains six independent gates each of which
performs the logic INVERT function. E

This device contains four independent gates each of which
performs the logic NAND function. Th

This device contains six independent gates each of which
performs the logic INVERT function. T