ADS 集成开发环境是ARM 公司推出的ARM 核微控制器集成开发工具，英文全称为ARM Developer suite，成熟版本为ADS1.2。ADS1.2 支持ARM10 之前的所有ARM 系列微控制器，支持软件调试及JTAG 硬件仿真调试，支持汇编、C、C++源程序，具有编译效率高、系统库功能强等特点，可以在Windows98、Windows XP、Windows2000 以及RedHat Linux上运行。这里将简单介绍使用 ADS1.2 建立工程，编译连接设置，调试操作等等。最后还介绍了基于LPC2100 系列ARM7 微控制器的工程模板的使用，EasyJTAG 仿真器的安装与使用。
上传时间： 2013-11-18
上传用户：pol123
Multisim11.0
标签： Multisim Circuit Design suite
上传时间： 2013-11-18
上传用户：彭玖华
Multisim11.0
标签： Multisim Circuit Design suite
上传时间： 2013-10-28
上传用户：不懂夜的黑
中文版详情浏览：http://www.elecfans.com/emb/fpga/20130715324029.html Xilinx UltraScale:The Next-Generation Architecture for Your Next-Generation Architecture The Xilinx® UltraScale™ architecture delivers unprecedented levels of integration and capability with ASIC-class system- level performance for the most demanding applications. The UltraScale architecture is the industr y's f irst application of leading-edge ASIC architectural enhancements in an All Programmable architecture that scales from 20 nm planar through 16 nm FinFET technologies and beyond, in addition to scaling from monolithic through 3D ICs. Through analytical co-optimization with the X ilinx V ivado® Design suite, the UltraScale architecture provides massive routing capacity while intelligently resolving typical bottlenecks in ways never before possible. This design synergy achieves greater than 90% utilization with no performance degradation. Some of the UltraScale architecture breakthroughs include: • Strategic placement (virtually anywhere on the die) of ASIC-like system clocks, reducing clock skew by up to 50% • Latency-producing pipelining is virtually unnecessary in systems with massively parallel bus architecture, increasing system speed and capability • Potential timing-closure problems and interconnect bottlenecks are eliminated, even in systems requiring 90% or more resource utilization • 3D IC integration makes it possible to build larger devices one process generation ahead of the current industr y standard • Greatly increased system performance, including multi-gigabit serial transceivers, I/O, and memor y bandwidth is available within even smaller system power budgets • Greatly enhanced DSP and packet handling The Xilinx UltraScale architecture opens up whole new dimensions for designers of ultra-high-capacity solutions.
标签： UltraScale Xilinx 架构
上传时间： 2013-11-21
上传用户：wxqman
ADS教程 在这一章里，将介绍ARM 开发软件ADS(ARM Developer suite)。通过学习如何在CodeWarrior IDE 集成开发环境下编写，编译一个工程的例子，使读者能够掌握在ADS 软件平台下开发用户应用 程序。本章还描述了如何使用AXD 调试工程，使读者对于调试工程有个初步的理解，为进一步的 使用和掌握调试工具起到抛砖引玉的作用
上传时间： 2013-12-24
上传用户：小宝爱考拉
简易手机软件系统，具有话音，短信等基本业务处理功能，用Telelogic Tau SDL and TTCN suite 4.4完成，含完整开发文档，已编译通过
标签： 手机软件
上传时间： 2015-03-29
上传用户：rocketrevenge
ADS1.2是一个使用方便的集成开发环境，全称是ARM developer suite v1.2。它是由arm公司提供的专门用于arm相关应用开发和调试的综合性软件。
上传时间： 2013-12-24
上传用户：c12228
Nucleus GRAFIX Porting Guide，本文档包括Toolset Errors and Warnings 、 Display Device Initialization Display Device Drivers、 Test suite and Demo Program Modifications
标签： Nucleus Porting GRAFIX Guide
上传时间： 2013-12-20
上传用户：sk5201314
A complete business intelligence platform that includes reporting, analysis (OLAP), dashboards, data mining and data integration (ETL). Use it as a full suite or as individual components that are accessible via web services. Ranked #1 in open source BI.
标签： intelligence dashboards reporting complete
上传时间： 2015-09-11
上传用户：离殇
This document describes the uIP TCP/IP stack. The uIP TCP/IP stack is an extremely small implementation of the TCP/IP protocol suite intended for embedded systems running low-end 8 or 16-bit microcon-trollers. The code size and RAM requirements of uIP is an order of magnitude smaller than other generic TCP/IP stacks today.
标签： stack implementat TCP describes
上传时间： 2015-09-17
上传用户：zsjinju
