Demonstration circuit 1562A is an engineering toolto design and evaluate the LTC699X-X family ofTimerBlox circuits. The center section of the boardcontains a pre-configured TimerBlox function.DC1562A comes in twelve timing function variationsas outlined in Table 1.Surrounding the center board is a ”playground”prototyping area. The prototyping area has padsfor Dip-8, S8, MS8, or S6 packages with breadboarding connections to each pin and two convenientpower buses and ground bus surrounding theentire area. This area is for conditioning signals tocontrol the timer function and for adding loads controlled in time.
上传时间： 2013-10-18
上传用户：如果你也听说
The data plane of the reference design consists of a configurable multi-channel XBERT modulethat generates and checks high-speed serial data transmitted and received by the MGTs. Eachchannel in the XBERT module consists of two MGTs (MGTA and MGTB), which physicallyoccupy one MGT tile in the Virtex-4 FPGA. Each MGT has its own pattern checker, but bothMGTs in a channel share the same pattern generator. Each channel can load a differentpattern. The MGT serial rate depends on the reference clock frequency and the internal PMAdivider settings. The reference design can be scaled anywhere from one channel (two MGTs)to twelve channels (twenty-four MGTs).
上传时间： 2013-12-25
上传用户：jkhjkh1982
A collection of LDPC(Low-Density Parity-Codes) tools. Including: Code construction Density Evolution Decoding Algorithm Girth average Counter Stopping set and error Floor,etc
标签： Parity-Codes construction Low-Density collection
上传时间： 2016-05-10
上传用户：liglechongchong
已知LDPC码的稀疏交验矩阵H，计算girth和local girth
上传时间： 2016-09-01
上传用户：yuchunhai1990
The algorith divides rows in to four equal groups. The rows are then used to from a distance graph which is then transformed into a matrix. girth of eight is maintained by avoiding six-cycles in the graph construction
标签： rows The algorith distance
上传时间： 2014-01-14
上传用户：kelimu
读取支票的一个数值金额，并输出其文字表示。例如，数字112.43 应该写为：ONE HUNDRED TWELVE and 43/1
上传时间： 2016-11-10
上传用户：wendy15
