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  • 基于555定时器的双音门铃电路设计

    1.设计任务分析 原理: 当按下开关,NE555计时器,4引脚于高电平,元件工作,电容C1充电,且2、6引脚达到高电平,此时输出端3为低电平,扬声器发出响声;开关松开后,电容C1放电,在2、6引脚大于1/3Vcc前,3端为低电平,扬声器工作;当放电使2、6端电平小于1/3Vcc,3端为高电平,扬声器不工作。电容C2与滑动变阻器一起控制引脚4的状态,使置零输入端呈不同的临界电压,从而控制扬声器响音时间的长短。当电路转换时,2、6端电压不同,使得输出端3低电平电压也不同,从而实现扬声器的双音。

    标签: 555 定时器 双音 门铃电路

    上传时间: 2013-10-08

    上传用户:懒龙1988

  • 单片机控制交通灯程序及设计

    近年来随着科技的飞速发展,单片机的应用正在不断深入,同时带动传统控制检测技术日益更新。在实时检测和自动控制的单片机应用系统中,单片机往往作为一个核心部件来使用,仅单片机方面知识是不够的,还应根据具体硬件结构软硬件结合,加以完善。 十字路口车辆穿梭,行人熙攘,车行车道,人行人道,有条不紊。那么靠什么来实现这井然秩序呢?靠的就是交通信号灯的自动指挥系统。交通信号灯控制方式很多。本系统采用MSC-51系列单片机ATSC51和可编程并行I/O接口芯片8255A为中心器件来设计交通灯控制器,实现了能根据实际车流量通过8051芯片的P1口设置红、绿灯燃亮时间的功能;红绿灯循环点亮,倒计时剩5秒时黄灯闪烁警示(交通灯信号通过PA口输出,显示时间直接通过8255的PC口输出至双位数码管);车辆闯红灯报警;绿灯时间可检测车流量并可通过双位数码管显示。本系统实用性强、操作简单、扩展功能强。 程序源代码              ORG 0000H         ;主程序的入口地址        LJMP MAIN         ;跳转到主程序的开始处        ORG 0003H         ;外部中断0的中断程序入口地址                 ORG 000BH         ;定时器0的中断程序入口地址  

    标签: 单片机控制 交通灯 程序

    上传时间: 2013-12-21

    上传用户:1234321@q

  • WP401-FPGA设计的DO-254

    The standard that governs the design of avioniccomponents and systems, DO-254, is one of the mostpoorly understood but widely applicable standardsin the avionic industry. While information on thegeneral aspects of the standard is easy to obtain, thedetails of exactly how to implement the standard aresketchy. And once an entity develops a process thatachieves compliance, the details of how compliancewas achieved become part of the intellectualproperty of that entity. This white paper focuses onthe details of developing a DO-254 compliantprocess for the design of FPGAs.

    标签: FPGA 401 254 WP

    上传时间: 2013-11-11

    上传用户:q123321

  • 通信的数学理论

    The fundamental problem of communication is that of reproducing at one point either exactly or approximately a message selected at another point. Frequently the messages have meaning; that is they refer to or are correlated according to some system with certain physical or conceptual entities.

    标签: 通信

    上传时间: 2013-10-31

    上传用户:liuxinyu2016

  • 基于CPLD的QDPSK调制解调电路设计

    为了在CDMA系统中更好地应用QDPSK数字调制方式,在分析四相相对移相(QDPSK)信号调制解调原理的基础上,设计了一种QDPSK调制解调电路,它包括串并转换、差分编码、四相载波产生和选相、相干解调、差分译码和并串转换电路。在MAX+PLUSⅡ软件平台上,进行了编译和波形仿真。综合后下载到复杂可编程逻辑器件EPM7128SLC84-15中,测试结果表明,调制电路能正确选相,解调电路输出数据与QDPSK调制输入数据完全一致,达到了预期的设计要求。 Abstract:  In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase,and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.

    标签: QDPSK CPLD 调制解调 电路设计

    上传时间: 2014-01-12

    上传用户:qoovoop

  • 室内分布系统设计指导书(最终版)

    移动通信的网络覆盖、容量、质量是运营商获取竞争优势的关键因素。网络覆盖、网络容量、网络质量从根本上体现了移动网络的服务水平,是所有网络优化工作的主题。室内分布系统是针对室内用户群、用于改善建筑物内移动通信环境的一种成功的方案,其原理是利用室内覆盖式天馈系统将基站的信号均匀分布在室内每个角落,从而保证室内区域拥有理想的信号覆盖。 室内分布系统的建设,可完善大中型建筑物、重要地下公共场所及高层建筑的室内覆盖,较为全面地改善建筑物内的通话质量,提高移动电话接通率,开辟出高质量的室内移动通信区域;同时,使用微蜂窝系统可以分担室外宏蜂窝话务,扩大网络容量,从而保证良好的通信质量,整体上提高移动网络的服务水平,是移动通信网路发展的需要。

    标签: 室内分布系统 设计指导

    上传时间: 2013-10-16

    上传用户:yulg

  • XAPP444 - CPLD配件,技巧和窍门

    Most designers wish to utilize as much of a device as possible in order to enhance the overallproduct performance, or extend a feature set. As a design grows, inevitably it will exceed thearchitectural limitations of the device. exactly why a design does not fit can sometimes bedifficult to determine. Programmable logic devices can be configured in almost an infinitenumber of ways. The same design may fit when you use certain implementation switches, andfail to fit when using other switches. This application note attempts to clarify the CPLD softwareimplementation (CPLDFit) options, as well as discuss implementation tips in CoolRunnerTM-IIdesigns in order to maximize CPLD utilization.

    标签: XAPP CPLD 444 配件

    上传时间: 2014-01-10

    上传用户:a471778

  • WP401-FPGA设计的DO-254

    The standard that governs the design of avioniccomponents and systems, DO-254, is one of the mostpoorly understood but widely applicable standardsin the avionic industry. While information on thegeneral aspects of the standard is easy to obtain, thedetails of exactly how to implement the standard aresketchy. And once an entity develops a process thatachieves compliance, the details of how compliancewas achieved become part of the intellectualproperty of that entity. This white paper focuses onthe details of developing a DO-254 compliantprocess for the design of FPGAs.

    标签: FPGA 401 254 WP

    上传时间: 2013-11-03

    上传用户:ysystc670

  • 通信的数学理论

    The fundamental problem of communication is that of reproducing at one point either exactly or approximately a message selected at another point. Frequently the messages have meaning; that is they refer to or are correlated according to some system with certain physical or conceptual entities.

    标签: 通信

    上传时间: 2013-11-10

    上传用户:xy@1314

  • 基于CPLD的QDPSK调制解调电路设计

    为了在CDMA系统中更好地应用QDPSK数字调制方式,在分析四相相对移相(QDPSK)信号调制解调原理的基础上,设计了一种QDPSK调制解调电路,它包括串并转换、差分编码、四相载波产生和选相、相干解调、差分译码和并串转换电路。在MAX+PLUSⅡ软件平台上,进行了编译和波形仿真。综合后下载到复杂可编程逻辑器件EPM7128SLC84-15中,测试结果表明,调制电路能正确选相,解调电路输出数据与QDPSK调制输入数据完全一致,达到了预期的设计要求。 Abstract:  In order to realize the better application of digital modulation mode QDPSK in the CDMA system, a sort of QDPSK modulation-demodulation circuit was designed based on the analysis of QDPSK signal modulation-demodulation principles. It included serial/parallel conversion circuit, differential encoding circuit, four-phase carrier wave produced and phase chosen circuit, coherent demodulation circuit, difference decoding circuit and parallel/serial conversion circuit. And it was compiled and simulated on the MAX+PLUSⅡ software platform,and downloaded into the CPLD of EPM7128SLC84-15.The test result shows that the modulation circuit can exactly choose the phase,and the output data of the demodulator circuit is the same as the input data of the QDPSK modulate. The circuit achieves the prospective requirement of the design.

    标签: QDPSK CPLD 调制解调 电路设计

    上传时间: 2013-10-27

    上传用户:jyycc